arm64: zynqmp: Add QSPI flash mini u-boot configuration

Add configuration files/dtses for mini u-boot configuration
which runs on smaller footprint of internal memory. This
configuration has only required qspi flash support and it
uses DCC as serial.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
lime2-spi
Siva Durga Prasad Paladugu 6 years ago committed by Michal Simek
parent bb8920ed77
commit 14ed50a4bf
  1. 1
      arch/arm/dts/Makefile
  2. 79
      arch/arm/dts/zynqmp-mini-qspi.dts
  3. 61
      configs/xilinx_zynqmp_mini_qspi_defconfig
  4. 21
      include/configs/xilinx_zynqmp_mini_qspi.h

@ -152,6 +152,7 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \
zynqmp-mini-emmc0.dtb \ zynqmp-mini-emmc0.dtb \
zynqmp-mini-emmc1.dtb \ zynqmp-mini-emmc1.dtb \
zynqmp-mini-nand.dtb \ zynqmp-mini-nand.dtb \
zynqmp-mini-qspi.dtb \
zynqmp-zcu100-revC.dtb \ zynqmp-zcu100-revC.dtb \
zynqmp-zcu102-revA.dtb \ zynqmp-zcu102-revA.dtb \
zynqmp-zcu102-revB.dtb \ zynqmp-zcu102-revB.dtb \

@ -0,0 +1,79 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP Mini Configuration
*
* (C) Copyright 2015 - 2018, Xilinx, Inc.
*
* Siva Durga Prasad <siva.durga.paladugu@xilinx.com>
* Michal Simek <michal.simek@xilinx.com>
*/
/dts-v1/;
/ {
model = "ZynqMP MINI QSPI";
compatible = "xlnx,zynqmp";
#address-cells = <2>;
#size-cells = <1>;
aliases {
serial0 = &dcc;
spi0 = &qspi;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@fffc0000 {
device_type = "memory";
reg = <0x0 0xfffc0000 0x40000>;
};
dcc: dcc {
compatible = "arm,dcc";
status = "disabled";
u-boot,dm-pre-reloc;
};
amba: amba {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <1>;
ranges;
qspi: spi@ff0f0000 {
compatible = "xlnx,zynqmp-qspi-1.0";
status = "disabled";
clock-names = "ref_clk", "pclk";
clocks = <&misc_clk &misc_clk>;
num-cs = <1>;
reg = <0x0 0xff0f0000 0x1000 0x0 0xc0000000 0x8000000>;
#address-cells = <1>;
#size-cells = <0>;
};
misc_clk: misc_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <125000000>;
};
};
};
&qspi {
status = "okay";
flash@0 {
compatible = "n25q512a11";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
spi-max-frequency = <10000000>;
};
};
&dcc {
status = "okay";
};

@ -0,0 +1,61 @@
CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_qspi"
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_TEXT_BASE=0xFFFC0000
CONFIG_SYS_MEM_RSVD_FOR_MMU=y
CONFIG_ZYNQMP_NO_DDR=y
# CONFIG_CMD_ZYNQMP is not set
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-qspi"
# CONFIG_IMAGE_FORMAT_LEGACY is not set
CONFIG_BOOTDELAY=-1
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_PROMPT="ZynqMP> "
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_BOOTM is not set
# CONFIG_CMD_BOOTI is not set
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_FDT is not set
# CONFIG_CMD_GO is not set
# CONFIG_CMD_RUN is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_SAVEENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
# CONFIG_CMD_CRC32 is not set
# CONFIG_CMD_DM is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_SF=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_MISC is not set
CONFIG_MP=y
# CONFIG_PARTITIONS is not set
CONFIG_OF_EMBED=y
# CONFIG_NET is not set
# CONFIG_DM_WARN is not set
# CONFIG_DM_DEVICE_REMOVE is not set
# CONFIG_MMC is not set
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SF_DUAL_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_ZYNQMP_GQSPI=y
# CONFIG_EFI_LOADER is not set

@ -0,0 +1,21 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Configuration for Xilinx ZynqMP QSPI Flash utility
*
* (C) Copyright 2018 Xilinx, Inc.
* Michal Simek <michal.simek@xilinx.com>
* Siva Durga Prasad Paladugu <sivadur@xilinx.com>
*/
#ifndef __CONFIG_ZYNQMP_MINI_QSPI_H
#define __CONFIG_ZYNQMP_MINI_QSPI_H
#include <configs/xilinx_zynqmp_mini.h>
#define CONFIG_SYS_ICACHE_OFF
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_ENV_SIZE 1400
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x20000)
#define CONFIG_SYS_MALLOC_LEN 0x2000
#endif /* __CONFIG_ZYNQMP_MINI_QSPI_H */
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