@ -196,7 +196,6 @@
+ ( 8 * 1024 * 1024 ) )
+ ( 8 * 1024 * 1024 ) )
# define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */
# define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */
# define CONFIG_SYS_HZ 1000 /* 1ms clock */
# define CONFIG_MMC
# define CONFIG_MMC
# define CONFIG_GENERIC_MMC
# define CONFIG_GENERIC_MMC
@ -260,12 +259,11 @@
/* Platform/Board specific defs */
/* Platform/Board specific defs */
# define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
# define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
# define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
# define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
# define CONFIG_SYS_HZ 1000
# define CONFIG_SYS_HZ 1000 /* 1ms clock */
/* NS16550 Configuration */
/* NS16550 Configuration */
# define CONFIG_SYS_NS16550
# define CONFIG_SYS_NS16550
# define CONFIG_SYS_NS16550_SERIAL
# define CONFIG_SYS_NS16550_SERIAL
# define CONFIG_SERIAL_MULTI
# define CONFIG_SYS_NS16550_REG_SIZE (-4)
# define CONFIG_SYS_NS16550_REG_SIZE (-4)
# define CONFIG_SYS_NS16550_CLK (48000000)
# define CONFIG_SYS_NS16550_CLK (48000000)
# define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
# define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
@ -360,11 +358,7 @@
# define CONFIG_SYS_NAND_ECCSIZE 512
# define CONFIG_SYS_NAND_ECCSIZE 512
# define CONFIG_SYS_NAND_ECCBYTES 14
# define CONFIG_SYS_NAND_ECCBYTES 14
# define CONFIG_SYS_NAND_ECCSTEPS 4
# define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
# define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
CONFIG_SYS_NAND_ECCSTEPS )
# define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
# define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
# define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000