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@ -20,11 +20,6 @@ |
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#define SPI_FLASH_CFI_MFR_MACRONIX 0xc2 |
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#define SPI_FLASH_CFI_MFR_MACRONIX 0xc2 |
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#define SPI_FLASH_CFI_MFR_WINBOND 0xef |
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#define SPI_FLASH_CFI_MFR_WINBOND 0xef |
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/* SECT flags */ |
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#define SECT_4K (1 << 1) |
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#define SECT_32K (1 << 2) |
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#define E_FSR (1 << 3) |
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/* Erase commands */ |
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/* Erase commands */ |
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#define CMD_ERASE_4K 0x20 |
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#define CMD_ERASE_4K 0x20 |
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#define CMD_ERASE_32K 0x52 |
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#define CMD_ERASE_32K 0x52 |
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@ -60,10 +55,10 @@ |
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#endif |
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#endif |
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/* Common status */ |
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/* Common status */ |
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#define STATUS_WIP 0x01 |
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#define STATUS_WIP (1 << 0) |
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#define STATUS_QEB_WINSPAN (1 << 1) |
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#define STATUS_QEB_WINSPAN (1 << 1) |
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#define STATUS_QEB_MXIC (1 << 6) |
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#define STATUS_QEB_MXIC (1 << 6) |
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#define STATUS_PEC 0x80 |
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#define STATUS_PEC (1 << 7) |
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/* Flash timeout values */ |
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/* Flash timeout values */ |
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#define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ) |
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#define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ) |
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@ -105,7 +100,7 @@ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len); |
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int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs); |
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int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs); |
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/* Program the status register */ |
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/* Program the status register */ |
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int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr); |
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int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws); |
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/* Read the config register */ |
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/* Read the config register */ |
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int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc); |
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int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc); |
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