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@ -169,6 +169,7 @@ static struct pci_device_id supported[] = { |
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int pcnet_initialize (bd_t * bis) |
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{ |
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<<<<<<< HEAD:drivers/net/pcnet.c |
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pci_dev_t devbusfn; |
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struct eth_device *dev; |
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u16 command, status; |
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@ -197,6 +198,7 @@ int pcnet_initialize (bd_t * bis) |
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*/ |
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pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0, |
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(unsigned int *) &dev->iobase); |
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dev->iobase=pci_io_to_phys (devbusfn, dev->iobase); |
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dev->iobase &= ~0xf; |
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PCNET_DEBUG1 ("%s: devbusfn=0x%x iobase=0x%x: ", |
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@ -230,6 +232,59 @@ int pcnet_initialize (bd_t * bis) |
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dev->recv = pcnet_recv; |
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eth_register (dev); |
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======= |
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pci_dev_t devbusfn; |
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struct eth_device* dev; |
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u16 command, status; |
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int dev_nr = 0; |
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PCNET_DEBUG1("\npcnet_initialize...\n"); |
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for (dev_nr = 0; ; dev_nr++) { |
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/*
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* Find the PCnet PCI device(s). |
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*/ |
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if ((devbusfn = pci_find_devices(supported, dev_nr)) < 0) { |
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break; |
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} |
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/*
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* Allocate and pre-fill the device structure. |
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*/ |
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dev = (struct eth_device*) malloc(sizeof *dev); |
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dev->priv = (void *)devbusfn; |
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sprintf(dev->name, "pcnet#%d", dev_nr); |
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/*
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* Setup the PCI device. |
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*/ |
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pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_0, (unsigned int *)&dev->iobase); |
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dev->iobase=pci_io_to_phys(devbusfn,dev->iobase); |
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dev->iobase &= ~0xf; |
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PCNET_DEBUG1("%s: devbusfn=0x%x iobase=0x%x: ", |
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dev->name, devbusfn, dev->iobase); |
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command = PCI_COMMAND_IO | PCI_COMMAND_MASTER; |
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pci_write_config_word(devbusfn, PCI_COMMAND, command); |
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pci_read_config_word(devbusfn, PCI_COMMAND, &status); |
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if ((status & command) != command) { |
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printf("%s: Couldn't enable IO access or Bus Mastering\n", |
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dev->name); |
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free(dev); |
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continue; |
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} |
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pci_write_config_byte(devbusfn, PCI_LATENCY_TIMER, 0x40); |
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/*
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* Probe the PCnet chip. |
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*/ |
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if (pcnet_probe(dev, bis, dev_nr) < 0) { |
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free(dev); |
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continue; |
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>>>>>>> Fixed pcnet io_base:drivers/net/pcnet.c |
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} |
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udelay (10 * 1000); |
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