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@ -359,3 +359,67 @@ my_usage: |
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puts("For example: reset cf 40 2.5 10\n"); |
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puts("For example: reset cf 40 2.5 10\n"); |
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puts("See MPC8641HPCN Design Workbook for valid values of command line parameters.\n"); |
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puts("See MPC8641HPCN Design Workbook for valid values of command line parameters.\n"); |
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} |
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} |
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/*
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* get_board_sys_clk |
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* Reads the FPGA on board for CONFIG_SYS_CLK_FREQ |
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*/ |
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unsigned long get_board_sys_clk(ulong dummy) |
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{ |
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u8 i, go_bit, rd_clks; |
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ulong val = 0; |
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go_bit = in8(PIXIS_BASE + PIXIS_VCTL); |
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go_bit &= 0x01; |
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rd_clks = in8(PIXIS_BASE + PIXIS_VCFGEN0); |
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rd_clks &= 0x1C; |
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/*
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* Only if both go bit and the SCLK bit in VCFGEN0 are set |
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* should we be using the AUX register. Remember, we also set the |
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* GO bit to boot from the alternate bank on the on-board flash |
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*/ |
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if (go_bit) { |
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if (rd_clks == 0x1c) |
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i = in8(PIXIS_BASE + PIXIS_AUX); |
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else |
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i = in8(PIXIS_BASE + PIXIS_SPD); |
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} else { |
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i = in8(PIXIS_BASE + PIXIS_SPD); |
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} |
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i &= 0x07; |
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switch (i) { |
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case 0: |
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val = 33000000; |
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break; |
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case 1: |
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val = 40000000; |
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break; |
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case 2: |
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val = 50000000; |
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break; |
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case 3: |
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val = 66000000; |
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break; |
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case 4: |
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val = 83000000; |
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break; |
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case 5: |
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val = 100000000; |
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break; |
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case 6: |
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val = 134000000; |
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break; |
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case 7: |
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val = 166000000; |
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break; |
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} |
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return val; |
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} |
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