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riscv: ae350: Clean up mixed tabs and spaces in the dts

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There are quite a lot of mixed tabs and spaces in the ae350.dts.
Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
lime2-spi
Bin Meng 6 years ago committed by Andes
parent b5369c5813
commit 4694c93fef
1 changed files with 90 additions and 87 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
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  1. 177
      arch/riscv/dts/ae350.dts

177
arch/riscv/dts/ae350.dts
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@ -1,144 +1,147 @@
/dts-v1/; /dts-v1/;
/ { / {
#address-cells = <2>; #address-cells = <2>;
#size-cells = <2>; #size-cells = <2>;
compatible = "andestech,ax25"; compatible = "andestech,ax25";
model = "andestech,ax25"; model = "andestech,ax25";
aliases { aliases {
uart0 = &serial0; uart0 = &serial0;
spi0 = &spi; spi0 = &spi;
} ; };
chosen { chosen {
bootargs = "console=ttyS0,38400n8 earlyprintk=uart8250-32bit,0xf0300000 debug loglevel=7"; bootargs = "console=ttyS0,38400n8 earlyprintk=uart8250-32bit,0xf0300000 debug loglevel=7";
stdout-path = "uart0:38400n8"; stdout-path = "uart0:38400n8";
}; };
cpus { cpus {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
timebase-frequency = <10000000>; timebase-frequency = <10000000>;
CPU0: cpu@0 {
device_type = "cpu"; CPU0: cpu@0 {
reg = <0>; device_type = "cpu";
status = "okay"; reg = <0>;
compatible = "riscv"; status = "okay";
riscv,isa = "rv64imafdc"; compatible = "riscv";
mmu-type = "riscv,sv39"; riscv,isa = "rv64imafdc";
clock-frequency = <60000000>; mmu-type = "riscv,sv39";
CPU0_intc: interrupt-controller { clock-frequency = <60000000>;
#interrupt-cells = <1>;
interrupt-controller; CPU0_intc: interrupt-controller {
compatible = "riscv,cpu-intc"; #interrupt-cells = <1>;
}; interrupt-controller;
}; compatible = "riscv,cpu-intc";
};
};
}; };
memory@0 { memory@0 {
device_type = "memory"; device_type = "memory";
reg = <0x0 0x00000000 0x0 0x40000000>; reg = <0x0 0x00000000 0x0 0x40000000>;
}; };
soc { soc {
#address-cells = <2>; #address-cells = <2>;
#size-cells = <2>; #size-cells = <2>;
compatible = "andestech,riscv-ae350-soc"; compatible = "andestech,riscv-ae350-soc";
ranges; ranges;
}; };
plmt0@e6000000 { plmt0@e6000000 {
compatible = "riscv,plmt0"; compatible = "riscv,plmt0";
interrupts-extended = <&CPU0_intc 7>; interrupts-extended = <&CPU0_intc 7>;
reg = <0x0 0xe6000000 0x0 0x100000>; reg = <0x0 0xe6000000 0x0 0x100000>;
}; };
plic0: interrupt-controller@e4000000 { plic0: interrupt-controller@e4000000 {
compatible = "riscv,plic0"; compatible = "riscv,plic0";
#address-cells = <2>; #address-cells = <2>;
#interrupt-cells = <2>; #interrupt-cells = <2>;
interrupt-controller; interrupt-controller;
reg = <0x0 0xe4000000 0x0 0x2000000>; reg = <0x0 0xe4000000 0x0 0x2000000>;
riscv,ndev=<31>; riscv,ndev=<31>;
interrupts-extended = <&CPU0_intc 11 &CPU0_intc 9>; interrupts-extended = <&CPU0_intc 11 &CPU0_intc 9>;
}; };
plic1: interrupt-controller@e6400000 { plic1: interrupt-controller@e6400000 {
compatible = "riscv,plic1"; compatible = "riscv,plic1";
#address-cells = <2>; #address-cells = <2>;
#interrupt-cells = <2>; #interrupt-cells = <2>;
interrupt-controller; interrupt-controller;
reg = <0x0 0xe6400000 0x0 0x400000>; reg = <0x0 0xe6400000 0x0 0x400000>;
riscv,ndev=<1>; riscv,ndev=<1>;
interrupts-extended = <&CPU0_intc 3>; interrupts-extended = <&CPU0_intc 3>;
}; };
spiclk: virt_100mhz { spiclk: virt_100mhz {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "fixed-clock"; compatible = "fixed-clock";
clock-frequency = <100000000>; clock-frequency = <100000000>;
}; };
timer0: timer@f0400000 { timer0: timer@f0400000 {
compatible = "andestech,atcpit100"; compatible = "andestech,atcpit100";
reg = <0x0 0xf0400000 0x0 0x1000>; reg = <0x0 0xf0400000 0x0 0x1000>;
clock-frequency = <40000000>; clock-frequency = <40000000>;
interrupts = <3 4>; interrupts = <3 4>;
interrupt-parent = <&plic0>; interrupt-parent = <&plic0>;
}; };
serial0: serial@f0300000 { serial0: serial@f0300000 {
compatible = "andestech,uart16550", "ns16550a"; compatible = "andestech,uart16550", "ns16550a";
reg = <0x0 0xf0300000 0x0 0x1000>; reg = <0x0 0xf0300000 0x0 0x1000>;
interrupts = <9 4>; interrupts = <9 4>;
clock-frequency = <19660800>; clock-frequency = <19660800>;
reg-shift = <2>; reg-shift = <2>;
reg-offset = <32>; reg-offset = <32>;
no-loopback-test = <1>; no-loopback-test = <1>;
interrupt-parent = <&plic0>; interrupt-parent = <&plic0>;
}; };
mac0: mac@e0100000 { mac0: mac@e0100000 {
compatible = "andestech,atmac100"; compatible = "andestech,atmac100";
reg = <0x0 0xe0100000 0x0 0x1000>; reg = <0x0 0xe0100000 0x0 0x1000>;
interrupts = <19 4>; interrupts = <19 4>;
interrupt-parent = <&plic0>; interrupt-parent = <&plic0>;
}; };
mmc0: mmc@f0e00000 { mmc0: mmc@f0e00000 {
compatible = "andestech,atfsdc010"; compatible = "andestech,atfsdc010";
max-frequency = <100000000>; max-frequency = <100000000>;
clock-freq-min-max = <400000 100000000>; clock-freq-min-max = <400000 100000000>;
fifo-depth = <0x10>; fifo-depth = <0x10>;
reg = <0x0 0xf0e00000 0x0 0x1000>; reg = <0x0 0xf0e00000 0x0 0x1000>;
interrupts = <18 4>; interrupts = <18 4>;
cap-sd-highspeed; cap-sd-highspeed;
interrupt-parent = <&plic0>; interrupt-parent = <&plic0>;
}; };
smc0: smc@e0400000 { smc0: smc@e0400000 {
compatible = "andestech,atfsmc020"; compatible = "andestech,atfsmc020";
reg = <0x0 0xe0400000 0x0 0x1000>; reg = <0x0 0xe0400000 0x0 0x1000>;
}; };
nor@0,0 { nor@0,0 {
compatible = "cfi-flash"; compatible = "cfi-flash";
reg = <0x0 0x88000000 0x0 0x1000>; reg = <0x0 0x88000000 0x0 0x1000>;
bank-width = <2>; bank-width = <2>;
device-width = <1>; device-width = <1>;
}; };
spi: spi@f0b00000 { spi: spi@f0b00000 {
compatible = "andestech,atcspi200"; compatible = "andestech,atcspi200";
reg = <0x0 0xf0b00000 0x0 0x1000>; reg = <0x0 0xf0b00000 0x0 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
num-cs = <1>; num-cs = <1>;
clocks = <&spiclk>; clocks = <&spiclk>;
interrupts = <3 4>; interrupts = <3 4>;
interrupt-parent = <&plic0>; interrupt-parent = <&plic0>;
flash@0 {
flash@0 {
compatible = "spi-flash"; compatible = "spi-flash";
spi-max-frequency = <50000000>; spi-max-frequency = <50000000>;
reg = <0>; reg = <0>;

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