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@ -391,7 +391,7 @@ |
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#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) |
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#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) |
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#define CFG_NAND_CS 3 /* NAND chip connected to CSx */ |
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#define CFG_NAND_CS 3 /* NAND chip connected to CSx */ |
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/* Memory Bank 0 (NOR-FLASH) initialization */ |
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/* Memory Bank 0 (NOR-FLASH) initialization */ |
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#define CFG_EBC_PB0AP 0x03017300 |
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#define CFG_EBC_PB0AP 0x03017200 |
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#define CFG_EBC_PB0CR (CFG_FLASH | 0xda000) |
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#define CFG_EBC_PB0CR (CFG_FLASH | 0xda000) |
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/* Memory Bank 3 (NAND-FLASH) initialization */ |
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/* Memory Bank 3 (NAND-FLASH) initialization */ |
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@ -400,7 +400,7 @@ |
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#else |
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#else |
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#define CFG_NAND_CS 0 /* NAND chip connected to CSx */ |
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#define CFG_NAND_CS 0 /* NAND chip connected to CSx */ |
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/* Memory Bank 3 (NOR-FLASH) initialization */ |
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/* Memory Bank 3 (NOR-FLASH) initialization */ |
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#define CFG_EBC_PB3AP 0x03017300 |
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#define CFG_EBC_PB3AP 0x03017200 |
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#define CFG_EBC_PB3CR (CFG_FLASH | 0xda000) |
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#define CFG_EBC_PB3CR (CFG_FLASH | 0xda000) |
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/* Memory Bank 0 (NAND-FLASH) initialization */ |
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/* Memory Bank 0 (NAND-FLASH) initialization */ |
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