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@ -4,7 +4,7 @@ |
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* |
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* |
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* (C) Copyright 2006 |
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* (C) Copyright 2006 |
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* Jacqueline Pira-Ferriol, AMCC/IBM, jpira-ferriol@fr.ibm.com |
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* Jacqueline Pira-Ferriol, AMCC/IBM, jpira-ferriol@fr.ibm.com |
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* Alain Saurel, AMCC/IBM, alain.saurel@fr.ibm.com |
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* Alain Saurel, AMCC/IBM, alain.saurel@fr.ibm.com |
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* |
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* |
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* This program is free software; you can redistribute it and/or |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* modify it under the terms of the GNU General Public License as |
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@ -123,12 +123,12 @@ int board_early_init_f(void) |
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/* setup NAND FLASH */ |
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/* setup NAND FLASH */ |
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mfsdr(SDR0_CUST0, sdr0_cust0); |
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mfsdr(SDR0_CUST0, sdr0_cust0); |
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sdr0_cust0 = SDR0_CUST0_MUX_NDFC_SEL | |
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sdr0_cust0 = SDR0_CUST0_MUX_NDFC_SEL | |
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SDR0_CUST0_NDFC_ENABLE | |
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SDR0_CUST0_NDFC_ENABLE | |
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SDR0_CUST0_NDFC_BW_8_BIT | |
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SDR0_CUST0_NDFC_BW_8_BIT | |
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SDR0_CUST0_NDFC_ARE_MASK | |
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SDR0_CUST0_NDFC_ARE_MASK | |
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(0x80000000 >> (28 + CFG_NAND_CS)); |
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(0x80000000 >> (28 + CFG_NAND_CS)); |
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mtsdr(SDR0_CUST0, sdr0_cust0); |
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mtsdr(SDR0_CUST0, sdr0_cust0); |
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return 0; |
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return 0; |
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} |
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} |
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@ -216,38 +216,38 @@ int misc_init_r(void) |
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#ifdef CONFIG_440EPX |
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#ifdef CONFIG_440EPX |
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if (act == NULL || strcmp(act, "hostdev") == 0) { |
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if (act == NULL || strcmp(act, "hostdev") == 0) { |
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/* SDR Setting */ |
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/* SDR Setting */ |
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mfsdr(SDR0_PFC1, sdr0_pfc1); |
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mfsdr(SDR0_PFC1, sdr0_pfc1); |
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mfsdr(SDR0_USB0, usb2d0cr); |
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mfsdr(SDR0_USB0, usb2d0cr); |
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mfsdr(SDR0_USB2PHY0CR, usb2phy0cr); |
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mfsdr(SDR0_USB2PHY0CR, usb2phy0cr); |
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mfsdr(SDR0_USB2H0CR, usb2h0cr); |
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mfsdr(SDR0_USB2H0CR, usb2h0cr); |
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_XOCLK_MASK; |
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_XOCLK_MASK; |
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_XOCLK_EXTERNAL; /*0*/ |
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_XOCLK_EXTERNAL; /*0*/ |
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_WDINT_MASK; |
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_WDINT_MASK; |
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_WDINT_16BIT_30MHZ; /*1*/ |
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_WDINT_16BIT_30MHZ; /*1*/ |
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DVBUS_MASK; |
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DVBUS_MASK; |
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DVBUS_PURDIS; /*0*/ |
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DVBUS_PURDIS; /*0*/ |
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DWNSTR_MASK; |
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DWNSTR_MASK; |
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DWNSTR_HOST; /*1*/ |
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DWNSTR_HOST; /*1*/ |
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_UTMICN_MASK; |
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_UTMICN_MASK; |
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_UTMICN_HOST; /*1*/ |
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_UTMICN_HOST; /*1*/ |
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/* An 8-bit/60MHz interface is the only possible alternative
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/* An 8-bit/60MHz interface is the only possible alternative
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when connecting the Device to the PHY */ |
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when connecting the Device to the PHY */ |
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usb2h0cr = usb2h0cr &~SDR0_USB2H0CR_WDINT_MASK; |
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usb2h0cr = usb2h0cr &~SDR0_USB2H0CR_WDINT_MASK; |
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usb2h0cr = usb2h0cr | SDR0_USB2H0CR_WDINT_16BIT_30MHZ; /*1*/ |
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usb2h0cr = usb2h0cr | SDR0_USB2H0CR_WDINT_16BIT_30MHZ; /*1*/ |
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/* To enable the USB 2.0 Device function through the UTMI interface */ |
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/* To enable the USB 2.0 Device function through the UTMI interface */ |
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usb2d0cr = usb2d0cr &~SDR0_USB2D0CR_USB2DEV_EBC_SEL_MASK; |
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usb2d0cr = usb2d0cr &~SDR0_USB2D0CR_USB2DEV_EBC_SEL_MASK; |
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usb2d0cr = usb2d0cr | SDR0_USB2D0CR_USB2DEV_SELECTION; /*1*/ |
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usb2d0cr = usb2d0cr | SDR0_USB2D0CR_USB2DEV_SELECTION; /*1*/ |
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sdr0_pfc1 = sdr0_pfc1 &~SDR0_PFC1_UES_MASK; |
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sdr0_pfc1 = sdr0_pfc1 &~SDR0_PFC1_UES_MASK; |
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sdr0_pfc1 = sdr0_pfc1 | SDR0_PFC1_UES_USB2D_SEL; /*0*/ |
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sdr0_pfc1 = sdr0_pfc1 | SDR0_PFC1_UES_USB2D_SEL; /*0*/ |
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mtsdr(SDR0_PFC1, sdr0_pfc1); |
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mtsdr(SDR0_PFC1, sdr0_pfc1); |
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mtsdr(SDR0_USB0, usb2d0cr); |
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mtsdr(SDR0_USB0, usb2d0cr); |
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mtsdr(SDR0_USB2PHY0CR, usb2phy0cr); |
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mtsdr(SDR0_USB2PHY0CR, usb2phy0cr); |
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mtsdr(SDR0_USB2H0CR, usb2h0cr); |
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mtsdr(SDR0_USB2H0CR, usb2h0cr); |
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/*clear resets*/ |
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/*clear resets*/ |
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udelay (1000); |
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udelay (1000); |
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@ -264,11 +264,11 @@ int misc_init_r(void) |
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_XOCLK_MASK; |
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_XOCLK_MASK; |
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_XOCLK_EXTERNAL; /*0*/ |
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_XOCLK_EXTERNAL; /*0*/ |
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DVBUS_MASK; |
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DVBUS_MASK; |
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DVBUS_PURDIS; /*0*/ |
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DVBUS_PURDIS; /*0*/ |
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DWNSTR_MASK; |
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DWNSTR_MASK; |
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DWNSTR_HOST; /*1*/ |
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DWNSTR_HOST; /*1*/ |
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_UTMICN_MASK; |
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_UTMICN_MASK; |
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_UTMICN_HOST; /*1*/ |
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_UTMICN_HOST; /*1*/ |
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mtsdr(SDR0_USB2PHY0CR, usb2phy0cr); |
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mtsdr(SDR0_USB2PHY0CR, usb2phy0cr); |
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udelay (1000); |
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udelay (1000); |
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@ -287,33 +287,33 @@ int misc_init_r(void) |
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/*-------------------PATCH-------------------------------*/ |
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/*-------------------PATCH-------------------------------*/ |
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/* SDR Setting */ |
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/* SDR Setting */ |
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mfsdr(SDR0_USB2PHY0CR, usb2phy0cr); |
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mfsdr(SDR0_USB2PHY0CR, usb2phy0cr); |
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mfsdr(SDR0_USB2H0CR, usb2h0cr); |
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mfsdr(SDR0_USB2H0CR, usb2h0cr); |
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mfsdr(SDR0_USB0, usb2d0cr); |
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mfsdr(SDR0_USB0, usb2d0cr); |
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mfsdr(SDR0_PFC1, sdr0_pfc1); |
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mfsdr(SDR0_PFC1, sdr0_pfc1); |
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_XOCLK_MASK; |
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_XOCLK_MASK; |
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_XOCLK_EXTERNAL; /*0*/ |
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_XOCLK_EXTERNAL; /*0*/ |
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_WDINT_MASK; |
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_WDINT_MASK; |
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_WDINT_8BIT_60MHZ; /*0*/ |
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_WDINT_8BIT_60MHZ; /*0*/ |
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DVBUS_MASK; |
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DVBUS_MASK; |
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DVBUS_PUREN; /*1*/ |
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DVBUS_PUREN; /*1*/ |
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DWNSTR_MASK; |
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DWNSTR_MASK; |
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DWNSTR_DEV; /*0*/ |
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DWNSTR_DEV; /*0*/ |
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_UTMICN_MASK; |
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_UTMICN_MASK; |
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_UTMICN_DEV; /*0*/ |
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_UTMICN_DEV; /*0*/ |
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usb2h0cr = usb2h0cr &~SDR0_USB2H0CR_WDINT_MASK; |
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usb2h0cr = usb2h0cr &~SDR0_USB2H0CR_WDINT_MASK; |
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usb2h0cr = usb2h0cr | SDR0_USB2H0CR_WDINT_8BIT_60MHZ; /*0*/ |
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usb2h0cr = usb2h0cr | SDR0_USB2H0CR_WDINT_8BIT_60MHZ; /*0*/ |
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usb2d0cr = usb2d0cr &~SDR0_USB2D0CR_USB2DEV_EBC_SEL_MASK; |
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usb2d0cr = usb2d0cr &~SDR0_USB2D0CR_USB2DEV_EBC_SEL_MASK; |
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usb2d0cr = usb2d0cr | SDR0_USB2D0CR_EBC_SELECTION; /*0*/ |
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usb2d0cr = usb2d0cr | SDR0_USB2D0CR_EBC_SELECTION; /*0*/ |
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sdr0_pfc1 = sdr0_pfc1 &~SDR0_PFC1_UES_MASK; |
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sdr0_pfc1 = sdr0_pfc1 &~SDR0_PFC1_UES_MASK; |
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sdr0_pfc1 = sdr0_pfc1 | SDR0_PFC1_UES_EBCHR_SEL; /*1*/ |
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sdr0_pfc1 = sdr0_pfc1 | SDR0_PFC1_UES_EBCHR_SEL; /*1*/ |
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mtsdr(SDR0_USB2H0CR, usb2h0cr); |
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mtsdr(SDR0_USB2H0CR, usb2h0cr); |
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mtsdr(SDR0_USB2PHY0CR, usb2phy0cr); |
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mtsdr(SDR0_USB2PHY0CR, usb2phy0cr); |
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mtsdr(SDR0_USB0, usb2d0cr); |
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mtsdr(SDR0_USB0, usb2d0cr); |
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mtsdr(SDR0_PFC1, sdr0_pfc1); |
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mtsdr(SDR0_PFC1, sdr0_pfc1); |
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