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@ -55,15 +55,7 @@ |
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#endif |
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#undef CONFIG_BOOTARGS |
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#define CONFIG_RAMBOOTCOMMAND \ |
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"setenv bootargs root=/dev/ram rw nfsroot=$(serverip):$(rootpath) " \
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"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off;" \
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"bootm ffc00000 ffca0000" |
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#define CONFIG_NFSBOOTCOMMAND \ |
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"setenv bootargs root=/dev/nfs rw nfsroot=$(serverip):$(rootpath) " \
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"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off;" \
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"bootm ffc00000" |
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#define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND |
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#define CONFIG_BOOTCOMMAND "bootm 100000" /* default boot command */ |
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ |
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#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ |
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@ -73,12 +65,7 @@ |
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#define CONFIG_RTC_M48T35A 1 /* ST Electronics M48 timekeeper */ |
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#if 0 /* test-only */
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#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \ |
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CONFIG_BOOTP_VENDOREX) |
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#else |
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#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT) |
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#endif |
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#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ |
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CFG_CMD_DHCP | \
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@ -147,6 +134,8 @@ |
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#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */ |
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#define CFG_RX_ETH_BUFFER 16 /* use 16 rx buffer on 405 emac */ |
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/*-----------------------------------------------------------------------
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* PCI stuff |
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*----------------------------------------------------------------------- |
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@ -202,7 +191,7 @@ |
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#define CFG_FLASH_BASE 0xFFFC0000 |
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#define CFG_MONITOR_BASE CFG_FLASH_BASE |
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#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Monitor */ |
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#define CFG_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */ |
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#define CFG_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */ |
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/*
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* For booting Linux, the board info and command line data |
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@ -360,7 +349,7 @@ |
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#define CFG_FPGA_STATUS_TS_IRQ 0x1000 |
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#define CFG_FPGA_SPARTAN2 1 /* using Xilinx Spartan 2 now */ |
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#define CFG_FPGA_MAX_SIZE 64*1024 /* 64kByte is enough for XC2S15 */ |
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#define CFG_FPGA_MAX_SIZE 128*1024 /* 128kByte is enough for XC2S30 */ |
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/* FPGA program pin configuration */ |
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#define CFG_FPGA_PRG 0x04000000 /* FPGA program pin (ppc output) */ |
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