Add initial DTS support for AM437x-IDK evm. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>master
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7dd1283048
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/* |
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* Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License version 2 as |
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* published by the Free Software Foundation. |
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*/ |
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/dts-v1/; |
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#include "am4372.dtsi" |
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#include <dt-bindings/pinctrl/am43xx.h> |
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#include <dt-bindings/pwm/pwm.h> |
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#include <dt-bindings/gpio/gpio.h> |
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#include <dt-bindings/input/input.h> |
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/ { |
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model = "TI AM437x Industrial Development Kit"; |
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compatible = "ti,am437x-idk-evm","ti,am4372","ti,am43"; |
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chosen { |
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stdout-path = &uart0; |
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tick-timer = &timer2; |
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}; |
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v24_0d: fixed-regulator-v24_0d { |
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compatible = "regulator-fixed"; |
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regulator-name = "V24_0D"; |
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regulator-min-microvolt = <24000000>; |
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regulator-max-microvolt = <24000000>; |
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regulator-always-on; |
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regulator-boot-on; |
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}; |
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v3_3d: fixed-regulator-v3_3d { |
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compatible = "regulator-fixed"; |
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regulator-name = "V3_3D"; |
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regulator-min-microvolt = <3300000>; |
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regulator-max-microvolt = <3300000>; |
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regulator-always-on; |
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regulator-boot-on; |
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vin-supply = <&v24_0d>; |
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}; |
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vdd_corereg: fixed-regulator-vdd_corereg { |
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compatible = "regulator-fixed"; |
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regulator-name = "VDD_COREREG"; |
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regulator-min-microvolt = <1100000>; |
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regulator-max-microvolt = <1100000>; |
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regulator-always-on; |
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regulator-boot-on; |
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vin-supply = <&v24_0d>; |
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}; |
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vdd_core: fixed-regulator-vdd_core { |
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compatible = "regulator-fixed"; |
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regulator-name = "VDD_CORE"; |
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regulator-min-microvolt = <1100000>; |
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regulator-max-microvolt = <1100000>; |
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regulator-always-on; |
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regulator-boot-on; |
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vin-supply = <&vdd_corereg>; |
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}; |
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v1_8dreg: fixed-regulator-v1_8dreg{ |
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compatible = "regulator-fixed"; |
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regulator-name = "V1_8DREG"; |
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regulator-min-microvolt = <1800000>; |
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regulator-max-microvolt = <1800000>; |
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regulator-always-on; |
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regulator-boot-on; |
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vin-supply = <&v24_0d>; |
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}; |
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v1_8d: fixed-regulator-v1_8d{ |
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compatible = "regulator-fixed"; |
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regulator-name = "V1_8D"; |
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regulator-min-microvolt = <1800000>; |
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regulator-max-microvolt = <1800000>; |
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regulator-always-on; |
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regulator-boot-on; |
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vin-supply = <&v1_8dreg>; |
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}; |
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v1_5dreg: fixed-regulator-v1_5dreg{ |
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compatible = "regulator-fixed"; |
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regulator-name = "V1_5DREG"; |
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regulator-min-microvolt = <1500000>; |
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regulator-max-microvolt = <1500000>; |
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regulator-always-on; |
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regulator-boot-on; |
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vin-supply = <&v24_0d>; |
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}; |
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v1_5d: fixed-regulator-v1_5d{ |
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compatible = "regulator-fixed"; |
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regulator-name = "V1_5D"; |
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regulator-min-microvolt = <1500000>; |
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regulator-max-microvolt = <1500000>; |
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regulator-always-on; |
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regulator-boot-on; |
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vin-supply = <&v1_5dreg>; |
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}; |
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gpio_keys: gpio_keys { |
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compatible = "gpio-keys"; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&gpio_keys_pins_default>; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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switch@0 { |
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label = "power-button"; |
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linux,code = <KEY_POWER>; |
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gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; |
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}; |
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}; |
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/* fixed 32k external oscillator clock */ |
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clk_32k_rtc: clk_32k_rtc { |
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#clock-cells = <0>; |
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compatible = "fixed-clock"; |
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clock-frequency = <32768>; |
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}; |
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}; |
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&am43xx_pinmux { |
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gpio_keys_pins_default: gpio_keys_pins_default { |
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pinctrl-single,pins = < |
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AM4372_IOPAD(0x9b8, PIN_INPUT | MUX_MODE7) /* cam0_field.gpio4_2 */ |
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>; |
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}; |
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i2c0_pins_default: i2c0_pins_default { |
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pinctrl-single,pins = < |
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AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */ |
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AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */ |
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>; |
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}; |
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i2c0_pins_sleep: i2c0_pins_sleep { |
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pinctrl-single,pins = < |
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AM4372_IOPAD(0x988, PIN_INPUT_PULLDOWN | MUX_MODE7) |
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AM4372_IOPAD(0x98c, PIN_INPUT_PULLDOWN | MUX_MODE7) |
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>; |
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}; |
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i2c2_pins_default: i2c2_pins_default { |
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pinctrl-single,pins = < |
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AM4372_IOPAD(0x9e8, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data1.i2c2_scl */ |
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AM4372_IOPAD(0x9ec, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data0.i2c2_sda */ |
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>; |
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}; |
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i2c2_pins_sleep: i2c2_pins_sleep { |
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pinctrl-single,pins = < |
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AM4372_IOPAD(0x9e8, PIN_INPUT_PULLDOWN | MUX_MODE7) |
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AM4372_IOPAD(0x9ec, PIN_INPUT_PULLDOWN | MUX_MODE7) |
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>; |
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}; |
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mmc1_pins_default: pinmux_mmc1_pins_default { |
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pinctrl-single,pins = < |
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AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */ |
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AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ |
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AM4372_IOPAD(0x9f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ |
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AM4372_IOPAD(0x9f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ |
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AM4372_IOPAD(0x9f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ |
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AM4372_IOPAD(0x9fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ |
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AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ |
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>; |
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}; |
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mmc1_pins_sleep: pinmux_mmc1_pins_sleep { |
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pinctrl-single,pins = < |
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AM4372_IOPAD(0x900, PIN_INPUT_PULLDOWN | MUX_MODE7) |
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AM4372_IOPAD(0x904, PIN_INPUT_PULLDOWN | MUX_MODE7) |
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AM4372_IOPAD(0x9f0, PIN_INPUT_PULLDOWN | MUX_MODE7) |
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AM4372_IOPAD(0x9f4, PIN_INPUT_PULLDOWN | MUX_MODE7) |
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AM4372_IOPAD(0x9f8, PIN_INPUT_PULLDOWN | MUX_MODE7) |
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AM4372_IOPAD(0x9fc, PIN_INPUT_PULLDOWN | MUX_MODE7) |
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AM4372_IOPAD(0x960, PIN_INPUT_PULLDOWN | MUX_MODE7) |
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>; |
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}; |
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ecap0_pins_default: backlight_pins_default { |
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pinctrl-single,pins = < |
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AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* ecap0_in_pwm0_out.ecap0_in_pwm0_out */ |
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>; |
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}; |
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cpsw_default: cpsw_default { |
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pinctrl-single,pins = < |
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AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ |
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AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ |
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AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ |
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AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ |
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AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */ |
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AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */ |
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AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */ |
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AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ |
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AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ |
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AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ |
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AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */ |
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AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */ |
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>; |
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}; |
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cpsw_sleep: cpsw_sleep { |
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pinctrl-single,pins = < |
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AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7) |
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AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7) |
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AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7) |
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AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7) |
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AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7) |
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AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7) |
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AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7) |
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AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7) |
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AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7) |
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AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7) |
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AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7) |
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AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7) |
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>; |
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}; |
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davinci_mdio_default: davinci_mdio_default { |
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pinctrl-single,pins = < |
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/* MDIO */ |
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AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ |
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AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ |
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>; |
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}; |
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davinci_mdio_sleep: davinci_mdio_sleep { |
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pinctrl-single,pins = < |
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/* MDIO reset value */ |
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AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7) |
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AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7) |
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>; |
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}; |
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qspi_pins_default: qspi_pins_default { |
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pinctrl-single,pins = < |
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AM4372_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_csn0.qspi_csn */ |
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AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */ |
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AM4372_IOPAD(0x890, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */ |
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AM4372_IOPAD(0x894, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */ |
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AM4372_IOPAD(0x898, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wen.qspi_d2 */ |
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AM4372_IOPAD(0x89c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */ |
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>; |
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}; |
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qspi_pins_sleep: qspi_pins_sleep{ |
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pinctrl-single,pins = < |
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AM4372_IOPAD(0x87c, PIN_INPUT_PULLDOWN | MUX_MODE7) |
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AM4372_IOPAD(0x888, PIN_INPUT_PULLDOWN | MUX_MODE7) |
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AM4372_IOPAD(0x890, PIN_INPUT_PULLDOWN | MUX_MODE7) |
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AM4372_IOPAD(0x894, PIN_INPUT_PULLDOWN | MUX_MODE7) |
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AM4372_IOPAD(0x898, PIN_INPUT_PULLDOWN | MUX_MODE7) |
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AM4372_IOPAD(0x89c, PIN_INPUT_PULLDOWN | MUX_MODE7) |
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>; |
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}; |
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}; |
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&i2c0 { |
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status = "okay"; |
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pinctrl-names = "default", "sleep"; |
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pinctrl-0 = <&i2c0_pins_default>; |
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pinctrl-1 = <&i2c0_pins_sleep>; |
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clock-frequency = <400000>; |
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at24@50 { |
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compatible = "at24,24c256"; |
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pagesize = <64>; |
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reg = <0x50>; |
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}; |
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tps: tps62362@60 { |
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compatible = "ti,tps62362"; |
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reg = <0x60>; |
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regulator-name = "VDD_MPU"; |
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regulator-min-microvolt = <950000>; |
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regulator-max-microvolt = <1330000>; |
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regulator-boot-on; |
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regulator-always-on; |
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ti,vsel0-state-high; |
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ti,vsel1-state-high; |
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vin-supply = <&v3_3d>; |
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}; |
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}; |
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&i2c2 { |
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status = "okay"; |
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pinctrl-names = "default", "sleep"; |
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pinctrl-0 = <&i2c2_pins_default>; |
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pinctrl-1 = <&i2c2_pins_sleep>; |
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clock-frequency = <100000>; |
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}; |
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&epwmss0 { |
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status = "okay"; |
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}; |
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&ecap0 { |
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status = "okay"; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&ecap0_pins_default>; |
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}; |
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&gpio0 { |
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status = "okay"; |
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}; |
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&gpio1 { |
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status = "okay"; |
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}; |
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&gpio4 { |
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status = "okay"; |
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}; |
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&gpio5 { |
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status = "okay"; |
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}; |
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&mmc1 { |
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status = "okay"; |
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pinctrl-names = "default", "sleep"; |
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pinctrl-0 = <&mmc1_pins_default>; |
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pinctrl-1 = <&mmc1_pins_sleep>; |
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vmmc-supply = <&v3_3d>; |
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bus-width = <4>; |
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cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; |
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}; |
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&qspi { |
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status = "okay"; |
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pinctrl-names = "default", "sleep"; |
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pinctrl-0 = <&qspi_pins_default>; |
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pinctrl-1 = <&qspi_pins_sleep>; |
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spi-max-frequency = <48000000>; |
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m25p80@0 { |
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compatible = "mx66l51235l"; |
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spi-max-frequency = <48000000>; |
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reg = <0>; |
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spi-cpol; |
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spi-cpha; |
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spi-tx-bus-width = <1>; |
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spi-rx-bus-width = <4>; |
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|
#address-cells = <1>; |
||||||
|
#size-cells = <1>; |
||||||
|
|
||||||
|
/* |
||||||
|
* MTD partition table. The ROM checks the first 512KiB for a |
||||||
|
* valid file to boot(XIP). |
||||||
|
*/ |
||||||
|
partition@0 { |
||||||
|
label = "QSPI.U_BOOT"; |
||||||
|
reg = <0x00000000 0x000080000>; |
||||||
|
}; |
||||||
|
partition@1 { |
||||||
|
label = "QSPI.U_BOOT.backup"; |
||||||
|
reg = <0x00080000 0x00080000>; |
||||||
|
}; |
||||||
|
partition@2 { |
||||||
|
label = "QSPI.U-BOOT-SPL_OS"; |
||||||
|
reg = <0x00100000 0x00010000>; |
||||||
|
}; |
||||||
|
partition@3 { |
||||||
|
label = "QSPI.U_BOOT_ENV"; |
||||||
|
reg = <0x00110000 0x00010000>; |
||||||
|
}; |
||||||
|
partition@4 { |
||||||
|
label = "QSPI.U-BOOT-ENV.backup"; |
||||||
|
reg = <0x00120000 0x00010000>; |
||||||
|
}; |
||||||
|
partition@5 { |
||||||
|
label = "QSPI.KERNEL"; |
||||||
|
reg = <0x00130000 0x0800000>; |
||||||
|
}; |
||||||
|
partition@6 { |
||||||
|
label = "QSPI.FILESYSTEM"; |
||||||
|
reg = <0x00930000 0x36D0000>; |
||||||
|
}; |
||||||
|
}; |
||||||
|
}; |
||||||
|
|
||||||
|
&mac { |
||||||
|
pinctrl-names = "default", "sleep"; |
||||||
|
pinctrl-0 = <&cpsw_default>; |
||||||
|
pinctrl-1 = <&cpsw_sleep>; |
||||||
|
status = "okay"; |
||||||
|
}; |
||||||
|
|
||||||
|
&davinci_mdio { |
||||||
|
pinctrl-names = "default", "sleep"; |
||||||
|
pinctrl-0 = <&davinci_mdio_default>; |
||||||
|
pinctrl-1 = <&davinci_mdio_sleep>; |
||||||
|
status = "okay"; |
||||||
|
}; |
||||||
|
|
||||||
|
&cpsw_emac0 { |
||||||
|
phy_id = <&davinci_mdio>, <0>; |
||||||
|
phy-mode = "rgmii"; |
||||||
|
}; |
||||||
|
|
||||||
|
&rtc { |
||||||
|
clocks = <&clk_32k_rtc>, <&clk_32768_ck>; |
||||||
|
clock-names = "ext-clk", "int-clk"; |
||||||
|
status = "okay"; |
||||||
|
}; |
||||||
|
|
||||||
|
&wdt { |
||||||
|
status = "okay"; |
||||||
|
}; |
||||||
|
|
||||||
|
&cpu { |
||||||
|
cpu0-supply = <&tps>; |
||||||
|
}; |
Loading…
Reference in new issue