Fixing coding style issues

- Fixing leading white spaces
 - Fixing indentation where 4 spaces are used instead of tab
 - Removing C++ comments (//), wherever I introduced them

Signed-off-by: William Juul <william.juul@tandberg.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
master
William Juul 17 years ago committed by Scott Wood
parent 4cbb651b29
commit 5e1dae5c3d
  1. 2
      board/bf537-stamp/nand.c
  2. 4
      board/dave/PPChameleonEVB/nand.c
  3. 2
      board/delta/nand.c
  4. 6
      board/esd/common/esd405ep_nand.c
  5. 8
      board/nc650/nand.c
  6. 2
      board/netstar/nand.c
  7. 2
      board/prodrive/alpr/nand.c
  8. 2
      board/prodrive/pdnb3/nand.c
  9. 6
      board/sc3/sc3nand.c
  10. 2
      board/tqc/tqm8272/tqm8272.c
  11. 2
      board/zylonite/nand.c
  12. 110
      common/cmd_nand.c
  13. 18
      cpu/arm926ejs/davinci/nand.c
  14. 14
      cpu/ppc4xx/ndfc.c
  15. 10
      drivers/mtd/nand/diskonchip.c
  16. 2
      drivers/mtd/nand/nand_base.c
  17. 6
      include/linux/mtd/compat.h
  18. 7
      include/linux/mtd/nand.h

@ -40,7 +40,7 @@
static void bfin_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) static void bfin_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{ {
register struct nand_chip *this = mtd->priv; register struct nand_chip *this = mtd->priv;
u32 IO_ADDR_W = (u32) this->IO_ADDR_W; u32 IO_ADDR_W = (u32) this->IO_ADDR_W;
if (ctrl & NAND_CTRL_CHANGE) { if (ctrl & NAND_CTRL_CHANGE) {
if( ctrl & NAND_CLE ) if( ctrl & NAND_CLE )

@ -36,7 +36,7 @@ static void ppchameleonevb_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int
struct nand_chip *this = mtd->priv; struct nand_chip *this = mtd->priv;
ulong base = (ulong) this->IO_ADDR_W; ulong base = (ulong) this->IO_ADDR_W;
if (ctrl & NAND_CTRL_CHANGE) { if (ctrl & NAND_CTRL_CHANGE) {
if ( ctrl & NAND_CLE ) if ( ctrl & NAND_CLE )
MACRO_NAND_CTL_SETCLE((unsigned long)base); MACRO_NAND_CTL_SETCLE((unsigned long)base);
else else
@ -51,7 +51,7 @@ static void ppchameleonevb_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int
MACRO_NAND_DISABLE_CE((unsigned long)base); MACRO_NAND_DISABLE_CE((unsigned long)base);
} }
if (cmd != NAND_CMD_NONE) if (cmd != NAND_CMD_NONE)
writeb(cmd, this->IO_ADDR_W); writeb(cmd, this->IO_ADDR_W);
} }

@ -549,7 +549,7 @@ int board_nand_init(struct nand_chip *nand)
nand->write_buf = dfc_write_buf; nand->write_buf = dfc_write_buf;
nand->cmdfunc = dfc_cmdfunc; nand->cmdfunc = dfc_cmdfunc;
// nand->autooob = &delta_oob; /* nand->autooob = &delta_oob; */
nand->badblock_pattern = &delta_bbt_descr; nand->badblock_pattern = &delta_bbt_descr;
return 0; return 0;
} }

@ -32,8 +32,8 @@
*/ */
static void esd405ep_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) static void esd405ep_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{ {
struct nand_chip *this = mtd->priv; struct nand_chip *this = mtd->priv;
if (ctrl & NAND_CTRL_CHANGE) { if (ctrl & NAND_CTRL_CHANGE) {
if ( ctrl & NAND_CLE ) if ( ctrl & NAND_CLE )
out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CFG_NAND_CLE); out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CFG_NAND_CLE);
else else
@ -48,7 +48,7 @@ static void esd405ep_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int
out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CFG_NAND_CE); out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CFG_NAND_CE);
} }
if (cmd != NAND_CMD_NONE) if (cmd != NAND_CMD_NONE)
writeb(cmd, this->IO_ADDR_W); writeb(cmd, this->IO_ADDR_W);
} }

@ -36,7 +36,7 @@ static void nc650_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{ {
struct nand_chip *this = mtd->priv; struct nand_chip *this = mtd->priv;
if (ctrl & NAND_CTRL_CHANGE) { if (ctrl & NAND_CTRL_CHANGE) {
if ( ctrl & NAND_CLE ) if ( ctrl & NAND_CLE )
this->IO_ADDR_W += 2; this->IO_ADDR_W += 2;
else else
@ -47,7 +47,7 @@ static void nc650_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
this->IO_ADDR_W -= 1; this->IO_ADDR_W -= 1;
} }
if (cmd != NAND_CMD_NONE) if (cmd != NAND_CMD_NONE)
writeb(cmd, this->IO_ADDR_W); writeb(cmd, this->IO_ADDR_W);
} }
#elif defined(CONFIG_IDS852_REV2) #elif defined(CONFIG_IDS852_REV2)
@ -58,7 +58,7 @@ static void nc650_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{ {
struct nand_chip *this = mtd->priv; struct nand_chip *this = mtd->priv;
if (ctrl & NAND_CTRL_CHANGE) { if (ctrl & NAND_CTRL_CHANGE) {
if ( ctrl & NAND_CLE ) if ( ctrl & NAND_CLE )
writeb(0, (volatile __u8 *) this->IO_ADDR_W + 0xa); writeb(0, (volatile __u8 *) this->IO_ADDR_W + 0xa);
else else
@ -73,7 +73,7 @@ static void nc650_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
writeb(0, (volatile __u8 *) this->IO_ADDR_W) + 0xc); writeb(0, (volatile __u8 *) this->IO_ADDR_W) + 0xc);
} }
if (cmd != NAND_CMD_NONE) if (cmd != NAND_CMD_NONE)
writeb(cmd, this->IO_ADDR_W); writeb(cmd, this->IO_ADDR_W);
} }
#else #else

@ -47,7 +47,7 @@ static void netstar_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int c
} }
this->IO_ADDR_W = (void __iomem *) IO_ADDR_W; this->IO_ADDR_W = (void __iomem *) IO_ADDR_W;
if (cmd != NAND_CMD_NONE) if (cmd != NAND_CMD_NONE)
writeb(cmd, this->IO_ADDR_W); writeb(cmd, this->IO_ADDR_W);
} }

@ -58,7 +58,7 @@ static struct alpr_ndfc_regs *alpr_ndfc = NULL;
*/ */
static void alpr_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) static void alpr_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{ {
struct nand_chip *this = mtd->priv; struct nand_chip *this = mtd->priv;
if (ctrl & NAND_CTRL_CHANGE) { if (ctrl & NAND_CTRL_CHANGE) {
if ( ctrl & NAND_CLE ) if ( ctrl & NAND_CLE )

@ -54,7 +54,7 @@ static struct pdnb3_ndfc_regs *pdnb3_ndfc;
*/ */
static void pdnb3_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) static void pdnb3_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{ {
struct nand_chip *this = mtd->priv; struct nand_chip *this = mtd->priv;
if (ctrl & NAND_CTRL_CHANGE) { if (ctrl & NAND_CTRL_CHANGE) {
if ( ctrl & NAND_CLE ) if ( ctrl & NAND_CLE )

@ -41,8 +41,8 @@ static void *sc3_control_base = (void *)0xEF600700;
static void sc3_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) static void sc3_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{ {
struct nand_chip *this = mtd->priv; struct nand_chip *this = mtd->priv;
if (ctrl & NAND_CTRL_CHANGE) { if (ctrl & NAND_CTRL_CHANGE) {
if ( ctrl & NAND_CLE ) if ( ctrl & NAND_CLE )
set_bit (SC3_NAND_CLE, sc3_control_base); set_bit (SC3_NAND_CLE, sc3_control_base);
else else
@ -57,7 +57,7 @@ static void sc3_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
clear_bit (SC3_NAND_CE, sc3_control_base); clear_bit (SC3_NAND_CE, sc3_control_base);
} }
if (cmd != NAND_CMD_NONE) if (cmd != NAND_CMD_NONE)
writeb(cmd, this->IO_ADDR_W); writeb(cmd, this->IO_ADDR_W);
} }

@ -1070,7 +1070,7 @@ static u8 hwctl = 0;
static void upmnand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) static void upmnand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{ {
struct nand_chip *this = mtd->priv; struct nand_chip *this = mtd->priv;
if (ctrl & NAND_CTRL_CHANGE) { if (ctrl & NAND_CTRL_CHANGE) {
if ( ctrl & NAND_CLE ) if ( ctrl & NAND_CLE )

@ -553,7 +553,7 @@ int board_nand_init(struct nand_chip *nand)
nand->write_buf = dfc_write_buf; nand->write_buf = dfc_write_buf;
nand->cmdfunc = dfc_cmdfunc; nand->cmdfunc = dfc_cmdfunc;
// nand->autooob = &delta_oob; /* nand->autooob = &delta_oob; */
nand->badblock_pattern = &delta_bbt_descr; nand->badblock_pattern = &delta_bbt_descr;
return 0; return 0;
} }

@ -35,7 +35,7 @@
int mtdparts_init(void); int mtdparts_init(void);
int id_parse(const char *id, const char **ret_id, u8 *dev_type, u8 *dev_num); int id_parse(const char *id, const char **ret_id, u8 *dev_type, u8 *dev_num);
int find_dev_and_part(const char *id, struct mtd_device **dev, int find_dev_and_part(const char *id, struct mtd_device **dev,
u8 *part_num, struct part_info **part); u8 *part_num, struct part_info **part);
#endif #endif
static int nand_dump_oob(nand_info_t *nand, ulong off) static int nand_dump_oob(nand_info_t *nand, ulong off)
@ -340,7 +340,7 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
opts.length = size; opts.length = size;
opts.offset = off; opts.offset = off;
opts.quiet = quiet; opts.quiet = quiet;
// ret = nand_read_opts(nand, &opts); /* ret = nand_read_opts(nand, &opts); */
} else { } else {
/* write */ /* write */
mtd_oob_ops_t opts; mtd_oob_ops_t opts;
@ -406,44 +406,48 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
} }
if (status) { if (status) {
// ulong block_start = 0;
ulong off; ulong off;
// int last_status = -1; /* ulong block_start = 0;
int last_status = -1;
*/
struct nand_chip *nand_chip = nand->priv; struct nand_chip *nand_chip = nand->priv;
/* check the WP bit */ /* check the WP bit */
nand_chip->cmdfunc (nand, NAND_CMD_STATUS, -1, -1); nand_chip->cmdfunc (nand, NAND_CMD_STATUS, -1, -1);
printf("device is %swrite protected\n", printf("device is %swrite protected\n",
(nand_chip->read_byte(nand) & 0x80 ? (nand_chip->read_byte(nand) & 0x80 ?
"NOT " : "" ) ); "NOT " : ""));
for (off = 0; off < nand->size; off += nand->writesize) { for (off = 0; off < nand->size; off += nand->writesize) {
// int s = nand_get_lock_status(nand, off); #if 0 /* must be fixed */
// int s = nand_get_lock_status(nand, off);
// /* print message only if status has changed
// * or at end of chip /* print message only if status has changed
// */ * or at end of chip
// if (off == nand->size - nand->writesize */
// || (s != last_status && off != 0)) { if (off == nand->size - nand->writesize
// || (s != last_status && off != 0)) {
// printf("%08lx - %08lx: %8d pages %s%s%s\n",
// block_start, printf("%08lx - %08lx: %8d pages %s%s%s\n",
// off-1, block_start,
// (off-block_start)/nand->writesize, off-1,
// ((last_status & NAND_LOCK_STATUS_TIGHT) ? "TIGHT " : ""), (off-block_start)/nand->writesize,
// ((last_status & NAND_LOCK_STATUS_LOCK) ? "LOCK " : ""), ((last_status & NAND_LOCK_STATUS_TIGHT) ? "TIGHT " : ""),
// ((last_status & NAND_LOCK_STATUS_UNLOCK) ? "UNLOCK " : "")); ((last_status & NAND_LOCK_STATUS_LOCK) ? "LOCK " : ""),
// } ((last_status & NAND_LOCK_STATUS_UNLOCK) ? "UNLOCK " : ""));
// }
// last_status = s;
last_status = s;
#endif
} }
} else { } else {
// if (!nand_lock(nand, tight)) { #if 0 /* must be fixed */
// puts("NAND flash successfully locked\n"); if (!nand_lock(nand, tight)) {
// } else { puts("NAND flash successfully locked\n");
// puts("Error locking NAND flash\n"); } else {
// return 1; puts("Error locking NAND flash\n");
// } return 1;
}
#endif
} }
return 0; return 0;
} }
@ -452,13 +456,15 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
if (arg_off_size(argc - 2, argv + 2, nand, &off, &size) < 0) if (arg_off_size(argc - 2, argv + 2, nand, &off, &size) < 0)
return 1; return 1;
// if (!nand_unlock(nand, off, size)) { #if 0 /* must be fixed */
// puts("NAND flash successfully unlocked\n"); if (!nand_unlock(nand, off, size)) {
// } else { puts("NAND flash successfully unlocked\n");
// puts("Error unlocking NAND flash, " } else {
// "write and erase will probably fail\n"); puts("Error unlocking NAND flash, "
// return 1; "write and erase will probably fail\n");
// } return 1;
}
#endif
return 0; return 0;
} }
@ -691,7 +697,7 @@ U_BOOT_CMD(nboot, 4, 1, do_nandboot,
void archflashwp(void *archdata, int wp); void archflashwp(void *archdata, int wp);
#endif #endif
#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1))) #define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1)))
#undef NAND_DEBUG #undef NAND_DEBUG
#undef PSYCHO_DEBUG #undef PSYCHO_DEBUG
@ -715,9 +721,9 @@ void archflashwp(void *archdata, int wp);
#define CONFIG_MTD_NAND_ECC_JFFS2 #define CONFIG_MTD_NAND_ECC_JFFS2
/* bits for nand_legacy_rw() `cmd'; or together as needed */ /* bits for nand_legacy_rw() `cmd'; or together as needed */
#define NANDRW_READ 0x01 #define NANDRW_READ 0x01
#define NANDRW_WRITE 0x00 #define NANDRW_WRITE 0x00
#define NANDRW_JFFS2 0x02 #define NANDRW_JFFS2 0x02
#define NANDRW_JFFS2_SKIP 0x04 #define NANDRW_JFFS2_SKIP 0x04
/* /*
@ -726,15 +732,15 @@ void archflashwp(void *archdata, int wp);
extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE]; extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
extern int curr_device; extern int curr_device;
extern int nand_legacy_erase(struct nand_chip *nand, size_t ofs, extern int nand_legacy_erase(struct nand_chip *nand, size_t ofs,
size_t len, int clean); size_t len, int clean);
extern int nand_legacy_rw(struct nand_chip *nand, int cmd, size_t start, extern int nand_legacy_rw(struct nand_chip *nand, int cmd, size_t start,
size_t len, size_t *retlen, u_char *buf); size_t len, size_t *retlen, u_char *buf);
extern void nand_print(struct nand_chip *nand); extern void nand_print(struct nand_chip *nand);
extern void nand_print_bad(struct nand_chip *nand); extern void nand_print_bad(struct nand_chip *nand);
extern int nand_read_oob(struct nand_chip *nand, size_t ofs, extern int nand_read_oob(struct nand_chip *nand, size_t ofs,
size_t len, size_t *retlen, u_char *buf); size_t len, size_t *retlen, u_char *buf);
extern int nand_write_oob(struct nand_chip *nand, size_t ofs, extern int nand_write_oob(struct nand_chip *nand, size_t ofs,
size_t len, size_t *retlen, const u_char *buf); size_t len, size_t *retlen, const u_char *buf);
int do_nand (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) int do_nand (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
@ -828,11 +834,11 @@ int do_nand (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
if (strncmp (argv[1], "read", 4) == 0 || if (strncmp (argv[1], "read", 4) == 0 ||
strncmp (argv[1], "write", 5) == 0) { strncmp (argv[1], "write", 5) == 0) {
ulong addr = simple_strtoul (argv[2], NULL, 16); ulong addr = simple_strtoul (argv[2], NULL, 16);
off_t off = simple_strtoul (argv[3], NULL, 16); off_t off = simple_strtoul (argv[3], NULL, 16);
size_t size = simple_strtoul (argv[4], NULL, 16); size_t size = simple_strtoul (argv[4], NULL, 16);
int cmd = (strncmp (argv[1], "read", 4) == 0) ? int cmd = (strncmp (argv[1], "read", 4) == 0) ?
NANDRW_READ : NANDRW_WRITE; NANDRW_READ : NANDRW_WRITE;
size_t total; size_t total;
int ret; int ret;
char *cmdtail = strchr (argv[1], '.'); char *cmdtail = strchr (argv[1], '.');
@ -923,9 +929,9 @@ U_BOOT_CMD(
"nand device [dev] - show or set current device\n" "nand device [dev] - show or set current device\n"
"nand read[.jffs2[s]] addr off size\n" "nand read[.jffs2[s]] addr off size\n"
"nand write[.jffs2] addr off size - read/write `size' bytes starting\n" "nand write[.jffs2] addr off size - read/write `size' bytes starting\n"
" at offset `off' to/from memory address `addr'\n" " at offset `off' to/from memory address `addr'\n"
"nand erase [clean] [off size] - erase `size' bytes from\n" "nand erase [clean] [off size] - erase `size' bytes from\n"
" offset `off' (entire device if not specified)\n" " offset `off' (entire device if not specified)\n"
"nand bad - show bad blocks\n" "nand bad - show bad blocks\n"
"nand read.oob addr off size - read out-of-band data\n" "nand read.oob addr off size - read out-of-band data\n"
"nand write.oob addr off size - read out-of-band data\n" "nand write.oob addr off size - read out-of-band data\n"

@ -68,7 +68,7 @@ static void nand_davinci_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int c
this->IO_ADDR_W = (void __iomem *) IO_ADDR_W; this->IO_ADDR_W = (void __iomem *) IO_ADDR_W;
} }
if (cmd != NAND_CMD_NONE) if (cmd != NAND_CMD_NONE)
writeb(cmd, this->IO_ADDR_W); writeb(cmd, this->IO_ADDR_W);
} }
@ -363,22 +363,22 @@ int board_nand_init(struct nand_chip *nand)
#endif #endif
#ifdef CFG_NAND_HW_ECC #ifdef CFG_NAND_HW_ECC
#ifdef CFG_NAND_LARGEPAGE #ifdef CFG_NAND_LARGEPAGE
nand->ecc.mode = NAND_ECC_HW; nand->ecc.mode = NAND_ECC_HW;
nand->ecc.size = 2048; nand->ecc.size = 2048;
nand->ecc.bytes = 12; nand->ecc.bytes = 12;
#elif defined(CFG_NAND_SMALLPAGE) #elif defined(CFG_NAND_SMALLPAGE)
nand->ecc.mode = NAND_ECC_HW; nand->ecc.mode = NAND_ECC_HW;
nand->ecc.size = 512; nand->ecc.size = 512;
nand->ecc.bytes = 3; nand->ecc.bytes = 3;
#else #else
#error "Either CFG_NAND_LARGEPAGE or CFG_NAND_SMALLPAGE must be defined!" #error "Either CFG_NAND_LARGEPAGE or CFG_NAND_SMALLPAGE must be defined!"
#endif #endif
// nand->autooob = &davinci_nand_oobinfo; /* nand->autooob = &davinci_nand_oobinfo; */
nand->ecc.calculate = nand_davinci_calculate_ecc; nand->ecc.calculate = nand_davinci_calculate_ecc;
nand->ecc.correct = nand_davinci_correct_data; nand->ecc.correct = nand_davinci_correct_data;
nand->ecc.hwctl = nand_davinci_enable_hwecc; nand->ecc.hwctl = nand_davinci_enable_hwecc;
#else #else
nand->ecc.mode = NAND_ECC_SOFT; nand->ecc.mode = NAND_ECC_SOFT;
#endif #endif
/* Set address of hardware control function */ /* Set address of hardware control function */

@ -48,7 +48,7 @@ static u8 hwctl = 0;
static void ndfc_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) static void ndfc_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{ {
struct nand_chip *this = mtd->priv; struct nand_chip *this = mtd->priv;
if (ctrl & NAND_CTRL_CHANGE) { if (ctrl & NAND_CTRL_CHANGE) {
if ( ctrl & NAND_CLE ) if ( ctrl & NAND_CLE )
@ -183,12 +183,12 @@ int board_nand_init(struct nand_chip *nand)
nand->read_buf = ndfc_read_buf; nand->read_buf = ndfc_read_buf;
nand->dev_ready = ndfc_dev_ready; nand->dev_ready = ndfc_dev_ready;
nand->ecc.correct = nand_correct_data; nand->ecc.correct = nand_correct_data;
nand->ecc.hwctl = ndfc_enable_hwecc; nand->ecc.hwctl = ndfc_enable_hwecc;
nand->ecc.calculate = ndfc_calculate_ecc; nand->ecc.calculate = ndfc_calculate_ecc;
nand->ecc.mode = NAND_ECC_HW; nand->ecc.mode = NAND_ECC_HW;
nand->ecc.size = 256; nand->ecc.size = 256;
nand->ecc.bytes = 3; nand->ecc.bytes = 3;
#ifndef CONFIG_NAND_SPL #ifndef CONFIG_NAND_SPL
nand->write_buf = ndfc_write_buf; nand->write_buf = ndfc_write_buf;

@ -500,11 +500,11 @@ static u_char doc2001_read_byte(struct mtd_info *mtd)
struct doc_priv *doc = this->priv; struct doc_priv *doc = this->priv;
void __iomem *docptr = doc->virtadr; void __iomem *docptr = doc->virtadr;
//ReadDOC(docptr, CDSNSlowIO); /*ReadDOC(docptr, CDSNSlowIO); */
/* 11.4.5 -- delay twice to allow extended length cycle */ /* 11.4.5 -- delay twice to allow extended length cycle */
DoC_Delay(doc, 2); DoC_Delay(doc, 2);
ReadDOC(docptr, ReadPipeInit); ReadDOC(docptr, ReadPipeInit);
//return ReadDOC(docptr, Mil_CDSN_IO); /*return ReadDOC(docptr, Mil_CDSN_IO); */
return ReadDOC(docptr, LastDataRead); return ReadDOC(docptr, LastDataRead);
} }
@ -1051,7 +1051,7 @@ static int doc200x_correct_data(struct mtd_info *mtd, u_char *dat,
return ret; return ret;
} }
//u_char mydatabuf[528]; /*u_char mydatabuf[528]; */
/* The strange out-of-order .oobfree list below is a (possibly unneeded) /* The strange out-of-order .oobfree list below is a (possibly unneeded)
* attempt to retain compatibility. It used to read: * attempt to retain compatibility. It used to read:
@ -1623,11 +1623,11 @@ static int __init doc_probe(unsigned long physadr)
if (ChipID == DOC_ChipID_DocMilPlus16) { if (ChipID == DOC_ChipID_DocMilPlus16) {
WriteDOC(~newval, virtadr, Mplus_AliasResolution); WriteDOC(~newval, virtadr, Mplus_AliasResolution);
oldval = ReadDOC(doc->virtadr, Mplus_AliasResolution); oldval = ReadDOC(doc->virtadr, Mplus_AliasResolution);
WriteDOC(newval, virtadr, Mplus_AliasResolution); // restore it WriteDOC(newval, virtadr, Mplus_AliasResolution); /* restore it */
} else { } else {
WriteDOC(~newval, virtadr, AliasResolution); WriteDOC(~newval, virtadr, AliasResolution);
oldval = ReadDOC(doc->virtadr, AliasResolution); oldval = ReadDOC(doc->virtadr, AliasResolution);
WriteDOC(newval, virtadr, AliasResolution); // restore it WriteDOC(newval, virtadr, AliasResolution); /* restore it */
} }
newval = ~newval; newval = ~newval;
if (oldval == newval) { if (oldval == newval) {

@ -2557,7 +2557,7 @@ int nand_scan_tail(struct mtd_info *mtd)
default: default:
printk(KERN_WARNING "No oob scheme defined for " printk(KERN_WARNING "No oob scheme defined for "
"oobsize %d\n", mtd->oobsize); "oobsize %d\n", mtd->oobsize);
// BUG(); /* BUG(); */
} }
} }

@ -18,10 +18,10 @@
#define KERN_DEBUG #define KERN_DEBUG
#define kmalloc(size, flags) malloc(size) #define kmalloc(size, flags) malloc(size)
#define kzalloc(size, flags) calloc(size, 1) #define kzalloc(size, flags) calloc(size, 1)
#define vmalloc(size) malloc(size) #define vmalloc(size) malloc(size)
#define kfree(ptr) free(ptr) #define kfree(ptr) free(ptr)
#define vfree(ptr) free(ptr) #define vfree(ptr) free(ptr)
#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) #define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c))

@ -236,11 +236,12 @@ struct nand_chip;
* used instead of the per chip wait queue when a hw controller is available * used instead of the per chip wait queue when a hw controller is available
*/ */
struct nand_hw_control { struct nand_hw_control {
/* XXX U-BOOT XXX */
#if 0 #if 0
spinlock_t lock; spinlock_t lock;
wait_queue_head_t wq; wait_queue_head_t wq;
#endif #endif
struct nand_chip *active; struct nand_chip *active;
}; };
/** /**

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