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@ -148,35 +148,20 @@ static int __maybe_unused omap_correct_data(struct mtd_info *mtd, uint8_t *dat, |
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} |
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/*
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* Generic BCH interface |
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* Driver configurations |
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*/ |
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struct nand_bch_priv { |
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uint8_t mode; |
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uint8_t type; |
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uint8_t nibbles; |
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struct omap_nand_info { |
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struct bch_control *control; |
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enum omap_ecc ecc_scheme; |
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}; |
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/* bch types */ |
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#define ECC_BCH4 0 |
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#define ECC_BCH8 1 |
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#define ECC_BCH16 2 |
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/* BCH nibbles for diff bch levels */ |
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#define ECC_BCH4_NIBBLES 13 |
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#define ECC_BCH8_NIBBLES 26 |
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#define ECC_BCH16_NIBBLES 52 |
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/*
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* This can be a single instance cause all current users have only one NAND |
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* with nearly the same setup (BCH8, some with ELM and others with sw BCH |
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* library). |
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* When some users with other BCH strength will exists this have to change! |
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*/ |
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static __maybe_unused struct nand_bch_priv bch_priv = { |
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.type = ECC_BCH8, |
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.nibbles = ECC_BCH8_NIBBLES, |
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static __maybe_unused struct omap_nand_info omap_nand_info = { |
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.control = NULL |
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}; |
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@ -206,7 +191,7 @@ __maybe_unused |
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static void omap_enable_hwecc(struct mtd_info *mtd, int32_t mode) |
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{ |
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struct nand_chip *nand = mtd->priv; |
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struct nand_bch_priv *bch = nand->priv; |
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struct omap_nand_info *info = nand->priv; |
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unsigned int dev_width = (nand->options & NAND_BUSWIDTH_16) ? 1 : 0; |
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unsigned int ecc_algo = 0; |
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unsigned int bch_type = 0; |
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@ -215,7 +200,7 @@ static void omap_enable_hwecc(struct mtd_info *mtd, int32_t mode) |
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u32 ecc_config_val = 0; |
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/* configure GPMC for specific ecc-scheme */ |
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switch (bch->ecc_scheme) { |
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switch (info->ecc_scheme) { |
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case OMAP_ECC_HAM1_CODE_SW: |
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return; |
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case OMAP_ECC_HAM1_CODE_HW: |
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@ -239,6 +224,19 @@ static void omap_enable_hwecc(struct mtd_info *mtd, int32_t mode) |
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eccsize1 = 2; /* non-ECC bits in nibbles per sector */ |
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} |
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break; |
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case OMAP_ECC_BCH16_CODE_HW: |
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ecc_algo = 0x1; |
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bch_type = 0x2; |
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if (mode == NAND_ECC_WRITE) { |
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bch_wrapmode = 0x01; |
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eccsize0 = 0; /* extra bits in nibbles per sector */ |
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eccsize1 = 52; /* OOB bits in nibbles per sector */ |
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} else { |
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bch_wrapmode = 0x01; |
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eccsize0 = 52; /* ECC bits in nibbles per sector */ |
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eccsize1 = 0; /* non-ECC bits in nibbles per sector */ |
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} |
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break; |
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default: |
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return; |
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} |
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@ -277,11 +275,11 @@ static int omap_calculate_ecc(struct mtd_info *mtd, const uint8_t *dat, |
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uint8_t *ecc_code) |
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{ |
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struct nand_chip *chip = mtd->priv; |
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struct nand_bch_priv *bch = chip->priv; |
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struct omap_nand_info *info = chip->priv; |
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uint32_t *ptr, val = 0; |
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int8_t i = 0, j; |
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switch (bch->ecc_scheme) { |
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switch (info->ecc_scheme) { |
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case OMAP_ECC_HAM1_CODE_HW: |
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val = readl(&gpmc_cfg->ecc1_result); |
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ecc_code[0] = val & 0xFF; |
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@ -305,11 +303,34 @@ static int omap_calculate_ecc(struct mtd_info *mtd, const uint8_t *dat, |
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ptr--; |
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} |
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break; |
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case OMAP_ECC_BCH16_CODE_HW: |
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val = readl(&gpmc_cfg->bch_result_4_6[0].bch_result_x[2]); |
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ecc_code[i++] = (val >> 8) & 0xFF; |
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ecc_code[i++] = (val >> 0) & 0xFF; |
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val = readl(&gpmc_cfg->bch_result_4_6[0].bch_result_x[1]); |
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ecc_code[i++] = (val >> 24) & 0xFF; |
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ecc_code[i++] = (val >> 16) & 0xFF; |
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ecc_code[i++] = (val >> 8) & 0xFF; |
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ecc_code[i++] = (val >> 0) & 0xFF; |
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val = readl(&gpmc_cfg->bch_result_4_6[0].bch_result_x[0]); |
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ecc_code[i++] = (val >> 24) & 0xFF; |
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ecc_code[i++] = (val >> 16) & 0xFF; |
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ecc_code[i++] = (val >> 8) & 0xFF; |
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ecc_code[i++] = (val >> 0) & 0xFF; |
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for (j = 3; j >= 0; j--) { |
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val = readl(&gpmc_cfg->bch_result_0_3[0].bch_result_x[j] |
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); |
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ecc_code[i++] = (val >> 24) & 0xFF; |
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ecc_code[i++] = (val >> 16) & 0xFF; |
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ecc_code[i++] = (val >> 8) & 0xFF; |
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ecc_code[i++] = (val >> 0) & 0xFF; |
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} |
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break; |
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default: |
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return -EINVAL; |
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} |
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/* ECC scheme specific syndrome customizations */ |
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switch (bch->ecc_scheme) { |
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switch (info->ecc_scheme) { |
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case OMAP_ECC_HAM1_CODE_HW: |
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break; |
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#ifdef CONFIG_BCH |
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@ -323,6 +344,8 @@ static int omap_calculate_ecc(struct mtd_info *mtd, const uint8_t *dat, |
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case OMAP_ECC_BCH8_CODE_HW: |
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ecc_code[chip->ecc.bytes - 1] = 0x00; |
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break; |
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case OMAP_ECC_BCH16_CODE_HW: |
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break; |
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default: |
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return -EINVAL; |
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} |
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@ -345,16 +368,17 @@ static int omap_correct_data_bch(struct mtd_info *mtd, uint8_t *dat, |
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uint8_t *read_ecc, uint8_t *calc_ecc) |
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{ |
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struct nand_chip *chip = mtd->priv; |
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struct nand_bch_priv *bch = chip->priv; |
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uint32_t eccbytes = chip->ecc.bytes; |
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struct omap_nand_info *info = chip->priv; |
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struct nand_ecc_ctrl *ecc = &chip->ecc; |
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uint32_t error_count = 0, error_max; |
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uint32_t error_loc[8]; |
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uint32_t error_loc[ELM_MAX_ERROR_COUNT]; |
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enum bch_level bch_type; |
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uint32_t i, ecc_flag = 0; |
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uint8_t count, err = 0; |
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uint32_t byte_pos, bit_pos; |
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/* check calculated ecc */ |
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for (i = 0; i < chip->ecc.bytes && !ecc_flag; i++) { |
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for (i = 0; i < ecc->bytes && !ecc_flag; i++) { |
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if (calc_ecc[i] != 0x00) |
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ecc_flag = 1; |
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} |
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@ -363,7 +387,7 @@ static int omap_correct_data_bch(struct mtd_info *mtd, uint8_t *dat, |
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/* check for whether its a erased-page */ |
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ecc_flag = 0; |
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for (i = 0; i < chip->ecc.bytes && !ecc_flag; i++) { |
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for (i = 0; i < ecc->bytes && !ecc_flag; i++) { |
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if (read_ecc[i] != 0xff) |
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ecc_flag = 1; |
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} |
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@ -374,25 +398,33 @@ static int omap_correct_data_bch(struct mtd_info *mtd, uint8_t *dat, |
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* while reading ECC result we read it in big endian. |
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* Hence while loading to ELM we have rotate to get the right endian. |
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*/ |
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switch (bch->ecc_scheme) { |
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switch (info->ecc_scheme) { |
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case OMAP_ECC_BCH8_CODE_HW: |
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omap_reverse_list(calc_ecc, eccbytes - 1); |
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bch_type = BCH_8_BIT; |
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omap_reverse_list(calc_ecc, ecc->bytes - 1); |
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break; |
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case OMAP_ECC_BCH16_CODE_HW: |
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bch_type = BCH_16_BIT; |
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omap_reverse_list(calc_ecc, ecc->bytes); |
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break; |
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default: |
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return -EINVAL; |
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} |
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/* use elm module to check for errors */ |
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elm_config((enum bch_level)(bch->type)); |
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if (elm_check_error(calc_ecc, bch->nibbles, &error_count, error_loc)) { |
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printf("nand: error: uncorrectable ECC errors\n"); |
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return -EINVAL; |
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} |
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elm_config(bch_type); |
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err = elm_check_error(calc_ecc, bch_type, &error_count, error_loc); |
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if (err) |
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return err; |
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/* correct bch error */ |
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for (count = 0; count < error_count; count++) { |
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switch (bch->type) { |
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case ECC_BCH8: |
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switch (info->ecc_scheme) { |
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case OMAP_ECC_BCH8_CODE_HW: |
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/* 14th byte in ECC is reserved to match ROM layout */ |
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error_max = SECTOR_BYTES + (eccbytes - 1); |
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error_max = SECTOR_BYTES + (ecc->bytes - 1); |
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break; |
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case OMAP_ECC_BCH16_CODE_HW: |
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error_max = SECTOR_BYTES + ecc->bytes; |
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break; |
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default: |
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return -EINVAL; |
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@ -496,10 +528,10 @@ static int omap_correct_data_bch_sw(struct mtd_info *mtd, u_char *data, |
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/* cannot correct more than 8 errors */ |
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unsigned int errloc[8]; |
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struct nand_chip *chip = mtd->priv; |
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struct nand_bch_priv *chip_priv = chip->priv; |
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struct bch_control *bch = chip_priv->control; |
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struct omap_nand_info *info = chip->priv; |
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count = decode_bch(bch, NULL, 512, read_ecc, calc_ecc, NULL, errloc); |
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count = decode_bch(info->control, NULL, 512, read_ecc, calc_ecc, |
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NULL, errloc); |
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if (count > 0) { |
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/* correct errors */ |
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for (i = 0; i < count; i++) { |
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@ -535,15 +567,11 @@ static int omap_correct_data_bch_sw(struct mtd_info *mtd, u_char *data, |
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static void __maybe_unused omap_free_bch(struct mtd_info *mtd) |
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{ |
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struct nand_chip *chip = mtd->priv; |
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struct nand_bch_priv *chip_priv = chip->priv; |
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struct bch_control *bch = NULL; |
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if (chip_priv) |
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bch = chip_priv->control; |
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struct omap_nand_info *info = chip->priv; |
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if (bch) { |
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free_bch(bch); |
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chip_priv->control = NULL; |
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if (info->control) { |
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free_bch(info->control); |
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info->control = NULL; |
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} |
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} |
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#endif /* CONFIG_BCH */ |
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@ -557,7 +585,7 @@ static void __maybe_unused omap_free_bch(struct mtd_info *mtd) |
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*/ |
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static int omap_select_ecc_scheme(struct nand_chip *nand, |
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enum omap_ecc ecc_scheme, unsigned int pagesize, unsigned int oobsize) { |
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struct nand_bch_priv *bch = nand->priv; |
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struct omap_nand_info *info = nand->priv; |
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struct nand_ecclayout *ecclayout = &omap_ecclayout; |
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int eccsteps = pagesize / SECTOR_BYTES; |
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int i; |
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@ -567,12 +595,10 @@ static int omap_select_ecc_scheme(struct nand_chip *nand, |
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debug("nand: selected OMAP_ECC_HAM1_CODE_SW\n"); |
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/* For this ecc-scheme, ecc.bytes, ecc.layout, ... are
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* initialized in nand_scan_tail(), so just set ecc.mode */ |
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bch_priv.control = NULL; |
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bch_priv.type = 0; |
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info->control = NULL; |
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nand->ecc.mode = NAND_ECC_SOFT; |
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nand->ecc.layout = NULL; |
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nand->ecc.size = 0; |
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bch->ecc_scheme = OMAP_ECC_HAM1_CODE_SW; |
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break; |
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case OMAP_ECC_HAM1_CODE_HW: |
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@ -583,8 +609,7 @@ static int omap_select_ecc_scheme(struct nand_chip *nand, |
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(3 * eccsteps) + BADBLOCK_MARKER_LENGTH)); |
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return -EINVAL; |
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} |
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bch_priv.control = NULL; |
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bch_priv.type = 0; |
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info->control = NULL; |
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/* populate ecc specific fields */ |
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memset(&nand->ecc, 0, sizeof(struct nand_ecc_ctrl)); |
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nand->ecc.mode = NAND_ECC_HW; |
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@ -605,7 +630,6 @@ static int omap_select_ecc_scheme(struct nand_chip *nand, |
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ecclayout->oobfree[0].offset = i + BADBLOCK_MARKER_LENGTH; |
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ecclayout->oobfree[0].length = oobsize - ecclayout->eccbytes - |
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BADBLOCK_MARKER_LENGTH; |
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bch->ecc_scheme = OMAP_ECC_HAM1_CODE_HW; |
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break; |
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case OMAP_ECC_BCH8_CODE_HW_DETECTION_SW: |
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@ -618,12 +642,11 @@ static int omap_select_ecc_scheme(struct nand_chip *nand, |
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return -EINVAL; |
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} |
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/* check if BCH S/W library can be used for error detection */ |
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bch_priv.control = init_bch(13, 8, 0x201b); |
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if (!bch_priv.control) { |
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info->control = init_bch(13, 8, 0x201b); |
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if (!info->control) { |
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printf("nand: error: could not init_bch()\n"); |
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return -ENODEV; |
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} |
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bch_priv.type = ECC_BCH8; |
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/* populate ecc specific fields */ |
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memset(&nand->ecc, 0, sizeof(struct nand_ecc_ctrl)); |
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nand->ecc.mode = NAND_ECC_HW; |
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@ -647,7 +670,6 @@ static int omap_select_ecc_scheme(struct nand_chip *nand, |
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ecclayout->oobfree[0].offset = i + BADBLOCK_MARKER_LENGTH; |
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ecclayout->oobfree[0].length = oobsize - ecclayout->eccbytes - |
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BADBLOCK_MARKER_LENGTH; |
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bch->ecc_scheme = OMAP_ECC_BCH8_CODE_HW_DETECTION_SW; |
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break; |
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#else |
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printf("nand: error: CONFIG_BCH required for ECC\n"); |
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@ -665,7 +687,7 @@ static int omap_select_ecc_scheme(struct nand_chip *nand, |
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} |
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/* intialize ELM for ECC error detection */ |
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elm_init(); |
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bch_priv.type = ECC_BCH8; |
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info->control = NULL; |
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/* populate ecc specific fields */ |
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memset(&nand->ecc, 0, sizeof(struct nand_ecc_ctrl)); |
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nand->ecc.mode = NAND_ECC_HW; |
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@ -683,13 +705,44 @@ static int omap_select_ecc_scheme(struct nand_chip *nand, |
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ecclayout->oobfree[0].offset = i + BADBLOCK_MARKER_LENGTH; |
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ecclayout->oobfree[0].length = oobsize - ecclayout->eccbytes - |
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BADBLOCK_MARKER_LENGTH; |
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bch->ecc_scheme = OMAP_ECC_BCH8_CODE_HW; |
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break; |
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#else |
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printf("nand: error: CONFIG_NAND_OMAP_ELM required for ECC\n"); |
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return -EINVAL; |
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#endif |
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case OMAP_ECC_BCH16_CODE_HW: |
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#ifdef CONFIG_NAND_OMAP_ELM |
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debug("nand: using OMAP_ECC_BCH16_CODE_HW\n"); |
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/* check ecc-scheme requirements before updating ecc info */ |
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if ((26 * eccsteps) + BADBLOCK_MARKER_LENGTH > oobsize) { |
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printf("nand: error: insufficient OOB: require=%d\n", ( |
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(26 * eccsteps) + BADBLOCK_MARKER_LENGTH)); |
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return -EINVAL; |
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} |
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/* intialize ELM for ECC error detection */ |
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elm_init(); |
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/* populate ecc specific fields */ |
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nand->ecc.mode = NAND_ECC_HW; |
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nand->ecc.size = SECTOR_BYTES; |
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nand->ecc.bytes = 26; |
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nand->ecc.strength = 16; |
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nand->ecc.hwctl = omap_enable_hwecc; |
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nand->ecc.correct = omap_correct_data_bch; |
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nand->ecc.calculate = omap_calculate_ecc; |
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nand->ecc.read_page = omap_read_page_bch; |
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/* define ecc-layout */ |
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ecclayout->eccbytes = nand->ecc.bytes * eccsteps; |
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for (i = 0; i < ecclayout->eccbytes; i++) |
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ecclayout->eccpos[i] = i + BADBLOCK_MARKER_LENGTH; |
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ecclayout->oobfree[0].offset = i + BADBLOCK_MARKER_LENGTH; |
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ecclayout->oobfree[0].length = oobsize - nand->ecc.bytes - |
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BADBLOCK_MARKER_LENGTH; |
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break; |
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#else |
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printf("nand: error: CONFIG_NAND_OMAP_ELM required for ECC\n"); |
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return -EINVAL; |
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#endif |
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default: |
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debug("nand: error: ecc scheme not enabled or supported\n"); |
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return -EINVAL; |
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@ -699,6 +752,7 @@ static int omap_select_ecc_scheme(struct nand_chip *nand, |
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if (ecc_scheme != OMAP_ECC_HAM1_CODE_SW) |
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nand->ecc.layout = ecclayout; |
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info->ecc_scheme = ecc_scheme; |
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return 0; |
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} |
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@ -802,16 +856,21 @@ int board_nand_init(struct nand_chip *nand) |
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nand->IO_ADDR_R = (void __iomem *)&gpmc_cfg->cs[cs].nand_dat; |
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nand->IO_ADDR_W = (void __iomem *)&gpmc_cfg->cs[cs].nand_cmd; |
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nand->priv = &bch_priv; |
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nand->priv = &omap_nand_info; |
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nand->cmd_ctrl = omap_nand_hwcontrol; |
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nand->options |= NAND_NO_PADDING | NAND_CACHEPRG; |
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/* If we are 16 bit dev, our gpmc config tells us that */ |
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if ((readl(&gpmc_cfg->cs[cs].config1) & 0x3000) == 0x1000) |
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nand->options |= NAND_BUSWIDTH_16; |
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nand->chip_delay = 100; |
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nand->ecc.layout = &omap_ecclayout; |
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/* configure driver and controller based on NAND device bus-width */ |
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gpmc_config = readl(&gpmc_cfg->cs[cs].config1); |
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#if defined(CONFIG_SYS_NAND_BUSWIDTH_16BIT) |
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nand->options |= NAND_BUSWIDTH_16; |
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writel(gpmc_config | (0x1 << 12), &gpmc_cfg->cs[cs].config1); |
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#else |
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nand->options &= ~NAND_BUSWIDTH_16; |
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writel(gpmc_config & ~(0x1 << 12), &gpmc_cfg->cs[cs].config1); |
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#endif |
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/* select ECC scheme */ |
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#if defined(CONFIG_NAND_OMAP_ECCSCHEME) |
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err = omap_select_ecc_scheme(nand, CONFIG_NAND_OMAP_ECCSCHEME, |
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Albert ARIBAUD
10 years ago