ARM: tegra: derive CONFIG_SPL_MAX_SIZE instead of hard-coding it

For Tegra, the SPL and main U-Boot are concatenated together to form a
single memory image. Hence, the maximum SPL size is the different in
TEXT_BASE for SPL and main U-Boot. Instead of manually calculating
SPL_MAX_SIZE based on those two TEXT_BASE, which can lead to errors if
one TEXT_BASE is changed without updating SPL_MAX_SIZE, simply perform
the calculation automatically.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Allen Martin <amartin@nvidia.com>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
master
Stephen Warren 12 years ago committed by Tom Warren
parent 2b7818d49f
commit 644a69ec85
  1. 3
      include/configs/tegra20-common.h

@ -188,7 +188,8 @@
#define CONFIG_SPL #define CONFIG_SPL
#define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_NAND_SIMPLE
#define CONFIG_SPL_TEXT_BASE 0x00108000 #define CONFIG_SPL_TEXT_BASE 0x00108000
#define CONFIG_SPL_MAX_SIZE 0x00004000 #define CONFIG_SPL_MAX_SIZE (CONFIG_SYS_TEXT_BASE - \
CONFIG_SPL_TEXT_BASE)
#define CONFIG_SYS_SPL_MALLOC_START 0x00090000 #define CONFIG_SYS_SPL_MALLOC_START 0x00090000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
#define CONFIG_SPL_STACK 0x000ffffc #define CONFIG_SPL_STACK 0x000ffffc

Loading…
Cancel
Save