* Patch by Andreas Engel, 12 Jul 2004:

Replaced hardcoded PL011 clock frequency with config variable.
  Fixed wrong CONFIG_CMD_DFL doc.

* Patch by Thomas Viehweger, 09 Jun 2004:
  make it possible to remove chpart when there is only one partition
master
wdenk 21 years ago
parent 68ceb29e71
commit 6705d81e90
  1. 7
      CHANGELOG
  2. 60
      README
  3. 7
      common/cmd_jffs2.c
  4. 7
      drivers/serial_pl010.c
  5. 24
      drivers/serial_pl011.c
  6. 1
      include/configs/integratorap.h
  7. 2
      include/configs/integratorcp.h
  8. 3
      include/configs/versatile.h

@ -2,6 +2,13 @@
Changes since U-Boot 1.1.1: Changes since U-Boot 1.1.1:
====================================================================== ======================================================================
* Patch by Andreas Engel, 12 Jul 2004:
Replaced hardcoded PL011 clock frequency with config variable.
Fixed wrong CONFIG_CMD_DFL doc.
* Patch by Thomas Viehweger, 09 Jun 2004:
make it possible to remove chpart when there is only one partition
* Add support for console over UDP (compatible to Ingo Molnar's * Add support for console over UDP (compatible to Ingo Molnar's
netconsole patch under Linux) netconsole patch under Linux)

@ -380,6 +380,27 @@ The following options need to be configured:
expect it to be in bytes, others in MB. expect it to be in bytes, others in MB.
Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes. Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.
- Serial Ports:
CFG_PL010_SERIAL
Define this if you want support for Amba PrimeCell PL010 UARTs.
CFG_PL011_SERIAL
Define this if you want support for Amba PrimeCell PL011 UARTs.
CONFIG_PL011_CLOCK
If you have Amba PrimeCell PL011 UARTs, set this variable to
the clock speed of the UARTs.
CONFIG_PL01x_PORTS
If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
define this to a list of base addresses for each (supported)
port. See e.g. include/configs/versatile.h
- Console Interface: - Console Interface:
Depending on board, define exactly one serial port Depending on board, define exactly one serial port
(like CONFIG_8xx_CONS_SMC1, CONFIG_8xx_CONS_SMC2, (like CONFIG_8xx_CONS_SMC1, CONFIG_8xx_CONS_SMC2,
@ -541,22 +562,23 @@ The following options need to be configured:
CFG_CMD_ASKENV * ask for env variable CFG_CMD_ASKENV * ask for env variable
CFG_CMD_AUTOSCRIPT Autoscript Support CFG_CMD_AUTOSCRIPT Autoscript Support
CFG_CMD_BDI bdinfo CFG_CMD_BDI bdinfo
CFG_CMD_BEDBUG Include BedBug Debugger CFG_CMD_BEDBUG * Include BedBug Debugger
CFG_CMD_BMP * BMP support CFG_CMD_BMP * BMP support
CFG_CMD_BSP * Board specific commands
CFG_CMD_BOOTD bootd CFG_CMD_BOOTD bootd
CFG_CMD_CACHE icache, dcache CFG_CMD_CACHE * icache, dcache
CFG_CMD_CONSOLE coninfo CFG_CMD_CONSOLE coninfo
CFG_CMD_DATE * support for RTC, date/time... CFG_CMD_DATE * support for RTC, date/time...
CFG_CMD_DHCP DHCP support CFG_CMD_DHCP * DHCP support
CFG_CMD_DIAG * Diagnostics CFG_CMD_DIAG * Diagnostics
CFG_CMD_DOC * Disk-On-Chip Support CFG_CMD_DOC * Disk-On-Chip Support
CFG_CMD_DTT Digital Therm and Thermostat CFG_CMD_DTT * Digital Therm and Thermostat
CFG_CMD_ECHO * echo arguments CFG_CMD_ECHO * echo arguments
CFG_CMD_EEPROM * EEPROM read/write support CFG_CMD_EEPROM * EEPROM read/write support
CFG_CMD_ELF bootelf, bootvx CFG_CMD_ELF * bootelf, bootvx
CFG_CMD_ENV saveenv CFG_CMD_ENV saveenv
CFG_CMD_FDC * Floppy Disk Support CFG_CMD_FDC * Floppy Disk Support
CFG_CMD_FAT FAT partition support CFG_CMD_FAT * FAT partition support
CFG_CMD_FDOS * Dos diskette Support CFG_CMD_FDOS * Dos diskette Support
CFG_CMD_FLASH flinfo, erase, protect CFG_CMD_FLASH flinfo, erase, protect
CFG_CMD_FPGA FPGA device initialization support CFG_CMD_FPGA FPGA device initialization support
@ -567,7 +589,7 @@ The following options need to be configured:
CFG_CMD_IMLS List all found images CFG_CMD_IMLS List all found images
CFG_CMD_IMMAP * IMMR dump support CFG_CMD_IMMAP * IMMR dump support
CFG_CMD_IRQ * irqinfo CFG_CMD_IRQ * irqinfo
CFG_CMD_ITEST * Integer/string test of 2 values CFG_CMD_ITEST Integer/string test of 2 values
CFG_CMD_JFFS2 * JFFS2 Support CFG_CMD_JFFS2 * JFFS2 Support
CFG_CMD_KGDB * kgdb CFG_CMD_KGDB * kgdb
CFG_CMD_LOADB loadb CFG_CMD_LOADB loadb
@ -575,8 +597,8 @@ The following options need to be configured:
CFG_CMD_MEMORY md, mm, nm, mw, cp, cmp, crc, base, CFG_CMD_MEMORY md, mm, nm, mw, cp, cmp, crc, base,
loop, loopw, mtest loop, loopw, mtest
CFG_CMD_MISC Misc functions like sleep etc CFG_CMD_MISC Misc functions like sleep etc
CFG_CMD_MMC MMC memory mapped support CFG_CMD_MMC * MMC memory mapped support
CFG_CMD_MII MII utility commands CFG_CMD_MII * MII utility commands
CFG_CMD_NAND * NAND support CFG_CMD_NAND * NAND support
CFG_CMD_NET bootp, tftpboot, rarpboot CFG_CMD_NET bootp, tftpboot, rarpboot
CFG_CMD_PCI * pciinfo CFG_CMD_PCI * pciinfo
@ -585,7 +607,7 @@ The following options need to be configured:
CFG_CMD_PORTIO * Port I/O CFG_CMD_PORTIO * Port I/O
CFG_CMD_REGINFO * Register dump CFG_CMD_REGINFO * Register dump
CFG_CMD_RUN run command in env variable CFG_CMD_RUN run command in env variable
CFG_CMD_SAVES save S record dump CFG_CMD_SAVES * save S record dump
CFG_CMD_SCSI * SCSI Support CFG_CMD_SCSI * SCSI Support
CFG_CMD_SDRAM * print SDRAM configuration information CFG_CMD_SDRAM * print SDRAM configuration information
CFG_CMD_SETGETDCR Support for DCR Register access (4xx only) CFG_CMD_SETGETDCR Support for DCR Register access (4xx only)
@ -783,6 +805,24 @@ The following options need to be configured:
enabled with CFG_CMD_MMC. The MMC driver also works with enabled with CFG_CMD_MMC. The MMC driver also works with
the FAT fs. This is enabled with CFG_CMD_FAT. the FAT fs. This is enabled with CFG_CMD_FAT.
- Journaling Flash filesystem support:
CONFIG_JFFS2_NAND, CONFIG_JFFS2_NAND_OFF, CONFIG_JFFS2_NAND_SIZE,
CONFIG_JFFS2_NAND_DEV
Define these for a default partition on a NAND device
CFG_JFFS2_FIRST_SECTOR,
CFG_JFFS2_FIRST_BANK, CFG_JFFS2_NUM_BANKS
Define these for a default partition on a NOR device
CFG_JFFS_CUSTOM_PART
Define this to create an own partition. You have to provide a
function struct part_info* jffs2_part_info(int part_num)
If you define only one JFFS2 partition you may also want to
#define CFG_JFFS_SINGLE_PART 1
to disable the command chpart. This is the default when you
have not defined a custom partition
- Keyboard Support: - Keyboard Support:
CONFIG_ISA_KEYBOARD CONFIG_ISA_KEYBOARD

@ -47,6 +47,8 @@ static int part_num=0;
#ifndef CFG_JFFS_CUSTOM_PART #ifndef CFG_JFFS_CUSTOM_PART
#define CFG_JFFS_SINGLE_PART 1
static struct part_info part; static struct part_info part;
#ifndef CONFIG_JFFS2_NAND #ifndef CONFIG_JFFS2_NAND
@ -80,9 +82,6 @@ jffs2_part_info(int part_num)
flash_info[CFG_JFFS2_FIRST_BANK].start[0]; flash_info[CFG_JFFS2_FIRST_BANK].start[0];
#endif #endif
/* unused in current jffs2 loader */
part.erasesize = 0;
/* Mark the struct as ready */ /* Mark the struct as ready */
part.usr_priv=(void*)1; part.usr_priv=(void*)1;
@ -230,6 +229,7 @@ do_jffs2_fsinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
return 0; return 0;
} }
#ifndef CFG_JFFS_SINGLE_PART
int int
do_jffs2_chpart(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) do_jffs2_chpart(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{ {
@ -257,6 +257,7 @@ do_jffs2_chpart(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
return 0; return 0;
} }
#endif /* CFG_JFFS_SINGLE_PART */
/***************************************************/ /***************************************************/

@ -38,13 +38,10 @@
#define IO_READ(addr) (*(volatile unsigned int *)(addr)) #define IO_READ(addr) (*(volatile unsigned int *)(addr))
/* Integrator AP has two UARTs, we use the first one, at 38400-8-N-1 */ /* Integrator AP has two UARTs, we use the first one, at 38400-8-N-1 */
#define NUM_PORTS 2
#define CONSOLE_PORT CONFIG_CONS_INDEX #define CONSOLE_PORT CONFIG_CONS_INDEX
#define baudRate CONFIG_BAUDRATE #define baudRate CONFIG_BAUDRATE
static volatile unsigned char *const port[NUM_PORTS] = { static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS;
(void *) (CFG_SERIAL0), #define NUM_PORTS (sizeof(port)/sizeof(port[0]))
(void *) (CFG_SERIAL1)
};
static void pl010_putc (int portnum, char c); static void pl010_putc (int portnum, char c);

@ -41,14 +41,11 @@
* IntegratorCP has two UARTs, use the first one, at 38400-8-N-1 * IntegratorCP has two UARTs, use the first one, at 38400-8-N-1
* Versatile PB has four UARTs. * Versatile PB has four UARTs.
*/ */
#define NUM_PORTS 2
#define CONSOLE_PORT CONFIG_CONS_INDEX #define CONSOLE_PORT CONFIG_CONS_INDEX
#define baudRate CONFIG_BAUDRATE #define baudRate CONFIG_BAUDRATE
static volatile unsigned char *const port[NUM_PORTS] = { static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS;
(void *) (CFG_SERIAL0), #define NUM_PORTS (sizeof(port)/sizeof(port[0]))
(void *) (CFG_SERIAL1)
};
static void pl011_putc (int portnum, char c); static void pl011_putc (int portnum, char c);
static int pl011_getc (int portnum); static int pl011_getc (int portnum);
@ -73,20 +70,11 @@ int serial_init (void)
** IBRD = UART_CLK / (16 * BAUD_RATE) ** IBRD = UART_CLK / (16 * BAUD_RATE)
** FBRD = ROUND((64 * MOD(UART_CLK,(16 * BAUD_RATE))) / (16 * BAUD_RATE)) ** FBRD = ROUND((64 * MOD(UART_CLK,(16 * BAUD_RATE))) / (16 * BAUD_RATE))
*/ */
#ifdef CONFIG_VERSATILE
temp = 16 * baudRate; temp = 16 * baudRate;
divider = 24000000 / temp; divider = CONFIG_PL011_CLOCK / temp;
remainder = 24000000 % temp; remainder = CONFIG_PL011_CLOCK % temp;
temp = (8 * remainder) / baudRate; temp = (8 * remainder) / baudRate;
fraction = (temp >> 1) + (temp & 1); fraction = (temp >> 1) + (temp & 1);
#endif
#ifdef CONFIG_INTEGRATOR
temp = 16 * baudRate;
divider = 14745600 / temp;
remainder = 14745600 % temp;
temp = (8 * remainder) / baudRate;
fraction = (temp >> 1) + (temp & 1);
#endif
IO_WRITE (port[CONSOLE_PORT] + UART_PL011_IBRD, divider); IO_WRITE (port[CONSOLE_PORT] + UART_PL011_IBRD, divider);
IO_WRITE (port[CONSOLE_PORT] + UART_PL011_FBRD, fraction); IO_WRITE (port[CONSOLE_PORT] + UART_PL011_FBRD, fraction);
@ -104,7 +92,7 @@ int serial_init (void)
(UART_PL011_CR_UARTEN | UART_PL011_CR_TXE | (UART_PL011_CR_UARTEN | UART_PL011_CR_TXE |
UART_PL011_CR_RXE)); UART_PL011_CR_RXE));
return (0); return 0;
} }
void serial_putc (const char c) void serial_putc (const char c)

@ -60,6 +60,7 @@
#define CFG_PL010_SERIAL #define CFG_PL010_SERIAL
#define CONFIG_CONS_INDEX 0 #define CONFIG_CONS_INDEX 0
#define CONFIG_BAUDRATE 38400 #define CONFIG_BAUDRATE 38400
#define CONFIG_PL01x_PORTS { (void *) (CFG_SERIAL0), (void *) (CFG_SERIAL1) }
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
#define CFG_SERIAL0 0x16000000 #define CFG_SERIAL0 0x16000000
#define CFG_SERIAL1 0x17000000 #define CFG_SERIAL1 0x17000000

@ -66,6 +66,8 @@
* NS16550 Configuration * NS16550 Configuration
*/ */
#define CFG_PL011_SERIAL #define CFG_PL011_SERIAL
#define CONFIG_PL011_CLOCK 14745600
#define CONFIG_PL01x_PORTS { (void *)CFG_SERIAL0, (void *)CFG_SERIAL1 }
#define CONFIG_CONS_INDEX 0 #define CONFIG_CONS_INDEX 0
#define CONFIG_BAUDRATE 38400 #define CONFIG_BAUDRATE 38400
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }

@ -87,7 +87,10 @@
* NS16550 Configuration * NS16550 Configuration
*/ */
#define CFG_PL011_SERIAL #define CFG_PL011_SERIAL
#define CONFIG_PL011_CLOCK 24000000
#define CONFIG_PL01x_PORTS { (void *)CFG_SERIAL0, (void *)CFG_SERIAL1 }
#define CONFIG_CONS_INDEX 0 #define CONFIG_CONS_INDEX 0
#define CONFIG_BAUDRATE 38400 #define CONFIG_BAUDRATE 38400
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
#define CFG_SERIAL0 0x101F1000 #define CFG_SERIAL0 0x101F1000

Loading…
Cancel
Save