S5P: add set_mmc_clk for external clock control

This patch added set_mmc_clk for external clock control.

c210 didn't support host clock control.
So We need external_clock_control function for c210.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>

arch/arm/cpu/armv7/s5pc1xx/clock.c

@@ -336,3 +336,8 @@ unsigned long get_uart_clk(int dev_index)
 {
 	return s5pc1xx_get_uart_clk(dev_index);
 }
+
+void set_mmc_clk(int dev_index, unsigned int div)
+{
+	/* Do NOTHING */
+}

arch/arm/cpu/armv7/s5pc2xx/clock.c

@@ -199,6 +199,33 @@ static unsigned long s5pc210_get_uart_clk(int dev_index)
 	return uclk;
 }
 
+/* s5pc210: set the mmc clock */
+static void s5pc210_set_mmc_clk(int dev_index, unsigned int div)
+{
+	struct s5pc210_clock *clk =
+		(struct s5pc210_clock *)samsung_get_base_clock();
+	unsigned int addr;
+	unsigned int val;
+
+	/*
+	 * CLK_DIV_FSYS1
+	 * MMC0_PRE_RATIO [15:8], MMC1_PRE_RATIO [31:24]
+	 * CLK_DIV_FSYS2
+	 * MMC2_PRE_RATIO [15:8], MMC3_PRE_RATIO [31:24]
+	 */
+	if (dev_index < 2) {
+		addr = (unsigned int)&clk->div_fsys1;
+	} else {
+		addr = (unsigned int)&clk->div_fsys2;
+		dev_index -= 2;
+	}
+
+	val = readl(addr);
+	val &= ~(0xff << ((dev_index << 4) + 8));
+	val |= (div & 0xff) << ((dev_index << 4) + 8);
+	writel(val, addr);
+}
+
 unsigned long get_pll_clk(int pllreg)
 {
 	return s5pc210_get_pll_clk(pllreg);
@@ -218,3 +245,8 @@ unsigned long get_uart_clk(int dev_index)
 {
 	return s5pc210_get_uart_clk(dev_index);
 }
+
+void set_mmc_clk(int dev_index, unsigned int div)
+{
+	s5pc210_set_mmc_clk(dev_index, div);
+}

arch/arm/include/asm/arch-s5pc1xx/clk.h

@@ -33,5 +33,6 @@ unsigned long get_pll_clk(int pllreg);
 unsigned long get_arm_clk(void);
 unsigned long get_pwm_clk(void);
 unsigned long get_uart_clk(int dev_index);
+void set_mmc_clk(int dev_index, unsigned int div);
 
 #endif

arch/arm/include/asm/arch-s5pc1xx/mmc.h

@@ -64,6 +64,7 @@ struct mmc_host {
 	struct s5p_mmc *reg;
 	unsigned int version;	/* SDHCI spec. version */
 	unsigned int clock;	/* Current clock (MHz) */
+	int dev_index;
 };
 
 int s5p_mmc_init(int dev_index, int bus_width);

arch/arm/include/asm/arch-s5pc2xx/clk.h

@@ -32,5 +32,6 @@ unsigned long get_pll_clk(int pllreg);
 unsigned long get_arm_clk(void);
 unsigned long get_pwm_clk(void);
 unsigned long get_uart_clk(int dev_index);
+void set_mmc_clk(int dev_index, unsigned int div);
 
 #endif

arch/arm/include/asm/arch-s5pc2xx/mmc.h

@@ -64,6 +64,7 @@ struct mmc_host {
 	struct s5p_mmc *reg;
 	unsigned int version;	/* SDHCI spec. version */
 	unsigned int clock;	/* Current clock (MHz) */
+	int dev_index;
 };
 
 int s5p_mmc_init(int dev_index, int bus_width);

drivers/mmc/s5p_mmc.c

@@ -22,6 +22,7 @@
 #include <mmc.h>
 #include <asm/io.h>
 #include <asm/arch/mmc.h>
+#include <asm/arch/clk.h>
 
 /* support 4 mmc hosts */
 struct mmc mmc_dev[4];
@@ -291,6 +292,8 @@ static void mmc_change_clock(struct mmc_host *host, uint clock)
 	clk = (div << 8) | (1 << 0);
 	writew(clk, &host->reg->clkcon);
 
+	set_mmc_clk(host->dev_index, div);
+
 	/* Wait max 10 ms */
 	timeout = 10;
 	while (!(readw(&host->reg->clkcon) & (1 << 1))) {
@@ -464,6 +467,7 @@ static int s5p_mmc_initialize(int dev_index, int bus_width)
 	mmc->f_min = 400000;
 	mmc->f_max = 52000000;
 
+	mmc_host[dev_index].dev_index = dev_index;
 	mmc_host[dev_index].clock = 0;
 	mmc_host[dev_index].reg = s5p_get_base_mmc(dev_index);
 	mmc->b_max = 0;