drivers: mmc: omap_hsmmc: Fix IO Buffer on OMAP36xx

On the OMAP36xx/37xx the CONTROL_WKUP_CTRL register has
a field (bit 6) named GPIO_IO_PWRDNZ.  If 0, the IO buffers which
are related to GPIO_126, 127 and 129 are disabled. Some boards may
need this for MMC. After the PBIAS is configured, this bit should
be set high to enable these GPIO pins.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

configs/omap3_logic_defconfig

@@ -33,6 +33,7 @@ CONFIG_CMD_UBI=y
 CONFIG_ISO_PARTITION=y
 CONFIG_EFI_PARTITION=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_MMC_OMAP36XX_PINS=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_MUSB_GADGET=y

drivers/mmc/Kconfig

@@ -131,6 +131,18 @@ config MMC_OMAP_HS
 
 	  If unsure, say N.
 
+config MMC_OMAP36XX_PINS
+	bool "Enable MMC1 on OMAP36xx/37xx"
+	depends on OMAP34XX && MMC_OMAP_HS
+	help
+	  This enables extended-drain in the MMC/SD/SDIO1I/O and
+	  GPIO-associated I/O cells (gpio_126, gpio_127, and gpio_129)
+	  specific to the OMAP36xx/37xx using MMC1
+
+	  If you have a controller with this interface, say Y here.
+
+	  If unsure, say N.
+
 config SH_SDHI
 	bool "SuperH/Renesas ARM SoCs on-chip SDHI host controller support"
 	depends on RMOBILE

drivers/mmc/omap_hsmmc.c

@@ -38,6 +38,7 @@
 #include <asm/arch/sys_proto.h>
 #endif
 #include <dm.h>
+#include <asm/arch-omap3/mux.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -102,6 +103,9 @@ static unsigned char mmc_board_init(struct mmc *mmc)
 	t2_t *t2_base = (t2_t *)T2_BASE;
 	struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
 	u32 pbias_lite;
+#ifdef CONFIG_MMC_OMAP36XX_PINS
+	u32 wkup_ctrl = readl(OMAP34XX_CTRL_WKUP_CTRL);
+#endif
 
 	pbias_lite = readl(&t2_base->pbias_lite);
 	pbias_lite &= ~(PBIASLITEPWRDNZ1 | PBIASLITEPWRDNZ0);
@@ -109,12 +113,26 @@ static unsigned char mmc_board_init(struct mmc *mmc)
 	/* for cairo board, we need to set up 1.8 Volt bias level on MMC1 */
 	pbias_lite &= ~PBIASLITEVMODE0;
 #endif
+#ifdef CONFIG_MMC_OMAP36XX_PINS
+	if (get_cpu_family() == CPU_OMAP36XX) {
+		/* Disable extended drain IO before changing PBIAS */
+		wkup_ctrl &= ~OMAP34XX_CTRL_WKUP_CTRL_GPIO_IO_PWRDNZ;
+		writel(wkup_ctrl, OMAP34XX_CTRL_WKUP_CTRL);
+	}
+#endif
 	writel(pbias_lite, &t2_base->pbias_lite);
 
 	writel(pbias_lite | PBIASLITEPWRDNZ1 |
 		PBIASSPEEDCTRL0 | PBIASLITEPWRDNZ0,
 		&t2_base->pbias_lite);
 
+#ifdef CONFIG_MMC_OMAP36XX_PINS
+	if (get_cpu_family() == CPU_OMAP36XX)
+		/* Enable extended drain IO after changing PBIAS */
+		writel(wkup_ctrl |
+				OMAP34XX_CTRL_WKUP_CTRL_GPIO_IO_PWRDNZ,
+				OMAP34XX_CTRL_WKUP_CTRL);
+#endif
 	writel(readl(&t2_base->devconf0) | MMCSDIO1ADPCLKISEL,
 		&t2_base->devconf0);