Signed-off-by: Thomas Chou <thomas@wytron.com.tw>master
Thomas Chou
11 years ago
parent
00a2517fcb
commit
70fbc46192
@ -1,170 +0,0 @@ |
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/*
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* (C) Copyright 2000-2004 |
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <asm/io.h> |
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#define SECTSZ (64 * 1024) |
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flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; |
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/*----------------------------------------------------------------------*/ |
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unsigned long flash_init (void) |
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{ |
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int i; |
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unsigned long addr; |
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flash_info_t *fli = &flash_info[0]; |
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fli->size = CONFIG_SYS_FLASH_SIZE; |
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fli->sector_count = CONFIG_SYS_MAX_FLASH_SECT; |
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fli->flash_id = FLASH_MAN_AMD + FLASH_AMDLV065D; |
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addr = CONFIG_SYS_FLASH_BASE; |
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for (i = 0; i < fli->sector_count; ++i) { |
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fli->start[i] = addr; |
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addr += SECTSZ; |
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fli->protect[i] = 1; |
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} |
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return (CONFIG_SYS_FLASH_SIZE); |
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} |
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/*--------------------------------------------------------------------*/ |
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void flash_print_info (flash_info_t * info) |
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{ |
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int i, k; |
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int erased; |
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unsigned long *addr; |
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printf (" Size: %ld KB in %d Sectors\n", |
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info->size >> 10, info->sector_count); |
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printf (" Sector Start Addresses:"); |
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for (i = 0; i < info->sector_count; ++i) { |
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/* Check if whole sector is erased */ |
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erased = 1; |
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addr = (unsigned long *) info->start[i]; |
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for (k = 0; k < SECTSZ/sizeof(unsigned long); k++) { |
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if ( readl(addr++) != (unsigned long)-1) { |
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erased = 0; |
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break; |
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} |
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} |
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/* Print the info */ |
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if ((i % 5) == 0) |
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printf ("\n "); |
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printf (" %08lX%s%s", |
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info->start[i], |
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erased ? " E" : " ", |
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info->protect[i] ? "RO " : " "); |
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} |
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printf ("\n"); |
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} |
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/*-------------------------------------------------------------------*/ |
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int flash_erase (flash_info_t * info, int s_first, int s_last) |
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{ |
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unsigned char *addr = (unsigned char *) info->start[0]; |
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unsigned char *addr2; |
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int prot, sect; |
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ulong start; |
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/* Some sanity checking */ |
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if ((s_first < 0) || (s_first > s_last)) { |
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printf ("- no sectors to erase\n"); |
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return 1; |
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} |
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prot = 0; |
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for (sect = s_first; sect <= s_last; ++sect) { |
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if (info->protect[sect]) { |
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prot++; |
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} |
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} |
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if (prot) { |
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printf ("- Warning: %d protected sectors will not be erased!\n", |
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prot); |
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} else { |
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printf ("\n"); |
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} |
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/* It's ok to erase multiple sectors provided we don't delay more
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* than 50 usec between cmds ... at which point the erase time-out |
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* occurs. So don't go and put printf() calls in the loop ... it |
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* won't be very helpful ;-) |
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*/ |
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for (sect = s_first; sect <= s_last; sect++) { |
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if (info->protect[sect] == 0) { /* not protected */ |
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addr2 = (unsigned char *) info->start[sect]; |
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writeb (0xaa, addr); |
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writeb (0x55, addr); |
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writeb (0x80, addr); |
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writeb (0xaa, addr); |
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writeb (0x55, addr); |
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writeb (0x30, addr2); |
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/* Now just wait for 0xff & provide some user
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* feedback while we wait. |
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*/ |
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start = get_timer (0); |
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while ( readb (addr2) != 0xff) { |
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udelay (1000 * 1000); |
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putc ('.'); |
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if (get_timer (start) > CONFIG_SYS_FLASH_ERASE_TOUT) { |
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printf ("timeout\n"); |
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return 1; |
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} |
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} |
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} |
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} |
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printf ("\n"); |
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return 0; |
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} |
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/*-----------------------------------------------------------------------
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* Copy memory to flash, returns: |
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* 0 - OK |
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* 1 - write timeout |
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* 2 - Flash not erased |
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*/ |
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int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) |
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{ |
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vu_char *cmd = (vu_char *) info->start[0]; |
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vu_char *dst = (vu_char *) addr; |
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unsigned char b; |
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ulong start; |
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while (cnt) { |
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/* Check for sufficient erase */ |
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b = *src; |
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if ((readb (dst) & b) != b) { |
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printf ("%02x : %02x\n", readb (dst), b); |
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return (2); |
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} |
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writeb (0xaa, cmd); |
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writeb (0x55, cmd); |
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writeb (0xa0, cmd); |
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writeb (dst, b); |
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/* Verify write */ |
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start = get_timer (0); |
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while (readb (dst) != b) { |
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if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) { |
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return 1; |
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} |
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} |
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dst++; |
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src++; |
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cnt--; |
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} |
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return (0); |
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} |
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@ -1,15 +0,0 @@ |
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if TARGET_PCI5441 |
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config SYS_BOARD |
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string |
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default "pci5441" |
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config SYS_VENDOR |
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string |
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default "psyent" |
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config SYS_CONFIG_NAME |
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string |
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default "PCI5441" |
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endif |
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@ -1,6 +0,0 @@ |
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PCI5441 BOARD |
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M: Scott McNutt <smcnutt@psyent.com> |
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S: Maintained |
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F: board/psyent/pci5441/ |
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F: include/configs/PCI5441.h |
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F: configs/PCI5441_defconfig |
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@ -1,8 +0,0 @@ |
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#
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# (C) Copyright 2001-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y := pci5441.o ../common/AMDLV065D.o
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@ -1,14 +0,0 @@ |
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#
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# (C) Copyright 2004, Psyent Corporation <www.psyent.com>
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# Scott McNutt <smcnutt@psyent.com>
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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CONFIG_SYS_TEXT_BASE = 0x018e0000
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PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul
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ifeq ($(debug),1) |
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PLATFORM_CPPFLAGS += -DDEBUG
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endif |
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@ -1,24 +0,0 @@ |
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/*
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* (C) Copyright 2004, Psyent Corporation <www.psyent.com> |
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* Scott McNutt <smcnutt@psyent.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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int board_early_init_f (void) |
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{ |
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return 0; |
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} |
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int checkboard (void) |
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{ |
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puts ("BOARD : Psyent PCI-5441\n"); |
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return 0; |
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} |
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phys_size_t initdram (int board_type) |
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{ |
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return (0); |
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} |
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@ -1,15 +0,0 @@ |
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if TARGET_PK1C20 |
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config SYS_BOARD |
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string |
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default "pk1c20" |
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config SYS_VENDOR |
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string |
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default "psyent" |
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config SYS_CONFIG_NAME |
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string |
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default "PK1C20" |
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endif |
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@ -1,6 +0,0 @@ |
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PK1C20 BOARD |
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M: Scott McNutt <smcnutt@psyent.com> |
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S: Maintained |
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F: board/psyent/pk1c20/ |
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F: include/configs/PK1C20.h |
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F: configs/PK1C20_defconfig |
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@ -1,8 +0,0 @@ |
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#
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# (C) Copyright 2001-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y := pk1c20.o led.o ../common/AMDLV065D.o
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@ -1,14 +0,0 @@ |
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#
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# (C) Copyright 2004, Psyent Corporation <www.psyent.com>
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# Scott McNutt <smcnutt@psyent.com>
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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CONFIG_SYS_TEXT_BASE = 0x01fc0000
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PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul
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ifeq ($(debug),1) |
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PLATFORM_CPPFLAGS += -DDEBUG
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endif |
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@ -1,46 +0,0 @@ |
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/*
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* (C) Copyright 2004, Psyent Corporation <www.psyent.com> |
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* Scott McNutt <smcnutt@psyent.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <asm/io.h> |
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#include <nios2-io.h> |
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#include <status_led.h> |
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/* The LED port is configured as output only, so we
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* must track the state manually. |
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*/ |
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static led_id_t val = 0; |
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void __led_init (led_id_t mask, int state) |
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{ |
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nios_pio_t *pio = (nios_pio_t *)CONFIG_SYS_LEDPIO_ADDR; |
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if (state == STATUS_LED_ON) |
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val &= ~mask; |
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else |
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val |= mask; |
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writel (val, &pio->data); |
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} |
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void __led_set (led_id_t mask, int state) |
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{ |
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nios_pio_t *pio = (nios_pio_t *)CONFIG_SYS_LEDPIO_ADDR; |
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if (state == STATUS_LED_ON) |
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val &= ~mask; |
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else |
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val |= mask; |
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writel (val, &pio->data); |
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} |
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void __led_toggle (led_id_t mask) |
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{ |
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nios_pio_t *pio = (nios_pio_t *)CONFIG_SYS_LEDPIO_ADDR; |
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val ^= mask; |
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writel (val, &pio->data); |
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} |
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@ -1,36 +0,0 @@ |
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/*
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* (C) Copyright 2004, Psyent Corporation <www.psyent.com> |
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* Scott McNutt <smcnutt@psyent.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <netdev.h> |
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int board_early_init_f (void) |
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{ |
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return 0; |
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} |
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int checkboard (void) |
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{ |
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puts ("BOARD : Psyent PK-1C20\n"); |
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return 0; |
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} |
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phys_size_t initdram (int board_type) |
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{ |
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return (0); |
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} |
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#ifdef CONFIG_CMD_NET |
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int board_eth_init(bd_t *bis) |
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{ |
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int rc = 0; |
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#ifdef CONFIG_SMC91111 |
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rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); |
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#endif |
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return rc; |
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} |
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#endif |
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@ -1,2 +0,0 @@ |
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CONFIG_NIOS2=y |
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CONFIG_TARGET_PCI5441=y |
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CONFIG_NIOS2=y |
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CONFIG_TARGET_PK1C20=y |
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@ -1,150 +0,0 @@ |
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/*
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* (C) Copyright 2004, Psyent Corporation <www.psyent.com> |
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* Scott McNutt <smcnutt@psyent.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#ifndef __CONFIG_H |
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#define __CONFIG_H |
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/*------------------------------------------------------------------------
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* BOARD/CPU |
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*----------------------------------------------------------------------*/ |
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#define CONFIG_PCI5441 1 /* PCI-5441 board */ |
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#define CONFIG_SYS_CLK_FREQ 50000000 /* 50 MHz core clk */ |
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#define CONFIG_SYS_RESET_ADDR 0x00000000 /* Hard-reset address */ |
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#define CONFIG_SYS_EXCEPTION_ADDR 0x01000020 /* Exception entry point*/ |
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#define CONFIG_SYS_NIOS_SYSID_BASE 0x00920828 /* System id address */ |
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#define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/ |
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/*------------------------------------------------------------------------
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* CACHE -- the following will support II/s and II/f. The II/s does not |
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* have dcache, so the cache instructions will behave as NOPs. |
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*----------------------------------------------------------------------*/ |
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#define CONFIG_SYS_ICACHE_SIZE 4096 /* 4 KByte total */ |
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#define CONFIG_SYS_ICACHELINE_SIZE 32 /* 32 bytes/line */ |
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#define CONFIG_SYS_DCACHE_SIZE 2048 /* 2 KByte (II/f) */ |
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#define CONFIG_SYS_DCACHELINE_SIZE 4 /* 4 bytes/line (II/f) */ |
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/*------------------------------------------------------------------------
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* MEMORY BASE ADDRESSES |
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*----------------------------------------------------------------------*/ |
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#define CONFIG_SYS_FLASH_BASE 0x00000000 /* FLASH base addr */ |
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#define CONFIG_SYS_FLASH_SIZE 0x00800000 /* 8 MByte */ |
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#define CONFIG_SYS_SDRAM_BASE 0x01000000 /* SDRAM base addr */ |
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#define CONFIG_SYS_SDRAM_SIZE 0x01000000 /* 16 MByte */ |
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/*------------------------------------------------------------------------
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* MEMORY ORGANIZATION |
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* -Monitor at top. |
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* -The heap is placed below the monitor. |
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* -Global data is placed below the heap. |
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* -The stack is placed below global data (&grows down). |
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*----------------------------------------------------------------------*/ |
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#define CONFIG_SYS_MONITOR_LEN (128 * 1024) /* Reserve 128k */ |
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) |
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE |
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#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) |
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#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_MALLOC_BASE - GENERATED_GBL_DATA_SIZE) |
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#define CONFIG_SYS_INIT_SP CONFIG_SYS_GBL_DATA_OFFSET |
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/*------------------------------------------------------------------------
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* FLASH (AM29LV065D) |
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*----------------------------------------------------------------------*/ |
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#define CONFIG_SYS_MAX_FLASH_SECT 128 /* Max # sects per bank */ |
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max # of flash banks */ |
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#define CONFIG_SYS_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */ |
|
||||||
#define CONFIG_SYS_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */ |
|
||||||
#define CONFIG_SYS_FLASH_WORD_SIZE unsigned char /* flash word size */ |
|
||||||
|
|
||||||
/*------------------------------------------------------------------------
|
|
||||||
* ENVIRONMENT -- Put environment in sector CONFIG_SYS_MONITOR_LEN above |
|
||||||
* CONFIG_SYS_RESET_ADDR, since we assume the monitor is stored at the |
|
||||||
* reset address, no? This will keep the environment in user region |
|
||||||
* of flash. NOTE: the monitor length must be multiple of sector size |
|
||||||
* (which is common practice). |
|
||||||
*----------------------------------------------------------------------*/ |
|
||||||
#define CONFIG_ENV_IS_IN_FLASH 1 /* Environment in flash */ |
|
||||||
#define CONFIG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */ |
|
||||||
#define CONFIG_ENV_OVERWRITE /* Serial change Ok */ |
|
||||||
#define CONFIG_ENV_ADDR (CONFIG_SYS_RESET_ADDR + CONFIG_SYS_MONITOR_LEN) |
|
||||||
|
|
||||||
/*------------------------------------------------------------------------
|
|
||||||
* CONSOLE |
|
||||||
*----------------------------------------------------------------------*/ |
|
||||||
#define CONFIG_ALTERA_UART 1 /* Use altera uart */ |
|
||||||
#if defined(CONFIG_ALTERA_JTAG_UART) |
|
||||||
#define CONFIG_SYS_NIOS_CONSOLE 0x00920820 /* JTAG UART base addr */ |
|
||||||
#else |
|
||||||
#define CONFIG_SYS_NIOS_CONSOLE 0x009208a0 /* UART base addr */ |
|
||||||
#endif |
|
||||||
|
|
||||||
#define CONFIG_SYS_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */ |
|
||||||
#define CONFIG_BAUDRATE 115200 /* Initial baudrate */ |
|
||||||
#define CONFIG_SYS_BAUDRATE_TABLE {115200} /* It's fixed ;-) */ |
|
||||||
|
|
||||||
#define CONFIG_SYS_CONSOLE_INFO_QUIET 1 /* Suppress console info*/ |
|
||||||
|
|
||||||
/*------------------------------------------------------------------------
|
|
||||||
* DEBUG |
|
||||||
*----------------------------------------------------------------------*/ |
|
||||||
#undef CONFIG_ROM_STUBS /* Stubs not in ROM */ |
|
||||||
|
|
||||||
/*------------------------------------------------------------------------
|
|
||||||
* TIMEBASE -- |
|
||||||
* |
|
||||||
* The high res timer defaults to 1 msec. Since it includes the period |
|
||||||
* registers, the interrupt frequency can be reduced using TMRCNT. |
|
||||||
* If the default period is acceptable, TMRCNT can be left undefined. |
|
||||||
* TMRMS represents the desired mecs per tick (msecs per interrupt). |
|
||||||
*----------------------------------------------------------------------*/ |
|
||||||
#define CONFIG_SYS_LOW_RES_TIMER |
|
||||||
#define CONFIG_SYS_NIOS_TMRBASE 0x00920860 /* Tick timer base addr */ |
|
||||||
#define CONFIG_SYS_NIOS_TMRIRQ 3 /* Timer IRQ num */ |
|
||||||
#define CONFIG_SYS_NIOS_TMRMS 10 /* Desired period (msec)*/ |
|
||||||
#define CONFIG_SYS_NIOS_TMRCNT \ |
|
||||||
(CONFIG_SYS_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000)) |
|
||||||
|
|
||||||
|
|
||||||
/*
|
|
||||||
* BOOTP options |
|
||||||
*/ |
|
||||||
#define CONFIG_BOOTP_BOOTFILESIZE |
|
||||||
#define CONFIG_BOOTP_BOOTPATH |
|
||||||
#define CONFIG_BOOTP_GATEWAY |
|
||||||
#define CONFIG_BOOTP_HOSTNAME |
|
||||||
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Command line configuration. |
|
||||||
*/ |
|
||||||
#define CONFIG_CMD_BDI |
|
||||||
#define CONFIG_CMD_ECHO |
|
||||||
#define CONFIG_CMD_SAVEENV |
|
||||||
#define CONFIG_CMD_FLASH |
|
||||||
#define CONFIG_CMD_IMI |
|
||||||
#define CONFIG_CMD_IRQ |
|
||||||
#define CONFIG_CMD_LOADS |
|
||||||
#define CONFIG_CMD_LOADB |
|
||||||
#define CONFIG_CMD_MEMORY |
|
||||||
#define CONFIG_CMD_MISC |
|
||||||
#define CONFIG_CMD_RUN |
|
||||||
#define CONFIG_CMD_SAVES |
|
||||||
|
|
||||||
|
|
||||||
/*------------------------------------------------------------------------
|
|
||||||
* MISC |
|
||||||
*----------------------------------------------------------------------*/ |
|
||||||
#define CONFIG_SYS_LONGHELP /* Provide extended help*/ |
|
||||||
#define CONFIG_SYS_CBSIZE 256 /* Console I/O buf size */ |
|
||||||
#define CONFIG_SYS_MAXARGS 16 /* Max command args */ |
|
||||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot arg buf size */ |
|
||||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print buf size */ |
|
||||||
#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE /* Default load address */ |
|
||||||
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE /* Start addr for test */ |
|
||||||
#define CONFIG_SYS_MEMTEST_END CONFIG_SYS_INIT_SP - 0x00020000 |
|
||||||
|
|
||||||
#endif /* __CONFIG_H */ |
|
||||||
@ -1,225 +0,0 @@ |
|||||||
/*
|
|
||||||
* (C) Copyright 2004, Psyent Corporation <www.psyent.com> |
|
||||||
* Scott McNutt <smcnutt@psyent.com> |
|
||||||
* |
|
||||||
* SPDX-License-Identifier: GPL-2.0+ |
|
||||||
*/ |
|
||||||
|
|
||||||
#ifndef __CONFIG_H |
|
||||||
#define __CONFIG_H |
|
||||||
|
|
||||||
/*------------------------------------------------------------------------
|
|
||||||
* BOARD/CPU |
|
||||||
*----------------------------------------------------------------------*/ |
|
||||||
#define CONFIG_PK1C20 1 /* PK1C20 board */ |
|
||||||
#define CONFIG_SYS_CLK_FREQ 50000000 /* 50 MHz core clk */ |
|
||||||
|
|
||||||
#define CONFIG_SYS_RESET_ADDR 0x00000000 /* Hard-reset address */ |
|
||||||
#define CONFIG_SYS_EXCEPTION_ADDR 0x01000020 /* Exception entry point*/ |
|
||||||
#define CONFIG_SYS_NIOS_SYSID_BASE 0x021208b8 /* System id address */ |
|
||||||
#define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/ |
|
||||||
|
|
||||||
/*------------------------------------------------------------------------
|
|
||||||
* CACHE -- the following will support II/s and II/f. The II/s does not |
|
||||||
* have dcache, so the cache instructions will behave as NOPs. |
|
||||||
*----------------------------------------------------------------------*/ |
|
||||||
#define CONFIG_SYS_ICACHE_SIZE 4096 /* 4 KByte total */ |
|
||||||
#define CONFIG_SYS_ICACHELINE_SIZE 32 /* 32 bytes/line */ |
|
||||||
#define CONFIG_SYS_DCACHE_SIZE 2048 /* 2 KByte (II/f) */ |
|
||||||
#define CONFIG_SYS_DCACHELINE_SIZE 4 /* 4 bytes/line (II/f) */ |
|
||||||
|
|
||||||
/*------------------------------------------------------------------------
|
|
||||||
* MEMORY BASE ADDRESSES |
|
||||||
*----------------------------------------------------------------------*/ |
|
||||||
#define CONFIG_SYS_FLASH_BASE 0x00000000 /* FLASH base addr */ |
|
||||||
#define CONFIG_SYS_FLASH_SIZE 0x00800000 /* 8 MByte */ |
|
||||||
#define CONFIG_SYS_SDRAM_BASE 0x01000000 /* SDRAM base addr */ |
|
||||||
#define CONFIG_SYS_SDRAM_SIZE 0x01000000 /* 16 MByte */ |
|
||||||
#define CONFIG_SYS_SRAM_BASE 0x02000000 /* SRAM base addr */ |
|
||||||
#define CONFIG_SYS_SRAM_SIZE 0x00100000 /* 1 MB (only 1M mapped)*/ |
|
||||||
|
|
||||||
/*------------------------------------------------------------------------
|
|
||||||
* MEMORY ORGANIZATION |
|
||||||
* -Monitor at top. |
|
||||||
* -The heap is placed below the monitor. |
|
||||||
* -Global data is placed below the heap. |
|
||||||
* -The stack is placed below global data (&grows down). |
|
||||||
*----------------------------------------------------------------------*/ |
|
||||||
#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 128k */ |
|
||||||
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) |
|
||||||
|
|
||||||
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE |
|
||||||
#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) |
|
||||||
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_MALLOC_BASE - GENERATED_GBL_DATA_SIZE) |
|
||||||
#define CONFIG_SYS_INIT_SP CONFIG_SYS_GBL_DATA_OFFSET |
|
||||||
|
|
||||||
/*------------------------------------------------------------------------
|
|
||||||
* FLASH (AM29LV065D) |
|
||||||
*----------------------------------------------------------------------*/ |
|
||||||
#define CONFIG_SYS_MAX_FLASH_SECT 128 /* Max # sects per bank */ |
|
||||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max # of flash banks */ |
|
||||||
#define CONFIG_SYS_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */ |
|
||||||
#define CONFIG_SYS_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */ |
|
||||||
#define CONFIG_SYS_FLASH_WORD_SIZE unsigned char /* flash word size */ |
|
||||||
|
|
||||||
/*------------------------------------------------------------------------
|
|
||||||
* ENVIRONMENT -- Put environment in sector CONFIG_SYS_MONITOR_LEN above |
|
||||||
* CONFIG_SYS_RESET_ADDR, since we assume the monitor is stored at the |
|
||||||
* reset address, no? This will keep the environment in user region |
|
||||||
* of flash. NOTE: the monitor length must be multiple of sector size |
|
||||||
* (which is common practice). |
|
||||||
*----------------------------------------------------------------------*/ |
|
||||||
#define CONFIG_ENV_IS_IN_FLASH 1 /* Environment in flash */ |
|
||||||
#define CONFIG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */ |
|
||||||
#define CONFIG_ENV_OVERWRITE /* Serial change Ok */ |
|
||||||
#define CONFIG_ENV_ADDR (CONFIG_SYS_RESET_ADDR + CONFIG_SYS_MONITOR_LEN) |
|
||||||
|
|
||||||
/*------------------------------------------------------------------------
|
|
||||||
* CONSOLE |
|
||||||
*----------------------------------------------------------------------*/ |
|
||||||
#define CONFIG_ALTERA_UART 1 /* Use altera uart */ |
|
||||||
#if defined(CONFIG_ALTERA_JTAG_UART) |
|
||||||
#define CONFIG_SYS_NIOS_CONSOLE 0x021208b0 /* JTAG UART base addr */ |
|
||||||
#else |
|
||||||
#define CONFIG_SYS_NIOS_CONSOLE 0x02120840 /* UART base addr */ |
|
||||||
#endif |
|
||||||
|
|
||||||
#define CONFIG_SYS_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */ |
|
||||||
#define CONFIG_BAUDRATE 115200 /* Initial baudrate */ |
|
||||||
#define CONFIG_SYS_BAUDRATE_TABLE {115200} /* It's fixed ;-) */ |
|
||||||
|
|
||||||
#define CONFIG_SYS_CONSOLE_INFO_QUIET 1 /* Suppress console info*/ |
|
||||||
|
|
||||||
/*------------------------------------------------------------------------
|
|
||||||
* EPCS Device -- wne CONFIG_SYS_NIOS_EPCSBASE is defined code/commands for |
|
||||||
* epcs device access is enabled. The base address is the epcs |
|
||||||
* _register_ base address, NOT THE ADDRESS OF THE MEMORY BLOCK. |
|
||||||
* The register base is currently at offset 0x600 from the memory base. |
|
||||||
*----------------------------------------------------------------------*/ |
|
||||||
#define CONFIG_SYS_NIOS_EPCSBASE 0x02100200 /* EPCS register base */ |
|
||||||
|
|
||||||
/*------------------------------------------------------------------------
|
|
||||||
* DEBUG |
|
||||||
*----------------------------------------------------------------------*/ |
|
||||||
#undef CONFIG_ROM_STUBS /* Stubs not in ROM */ |
|
||||||
|
|
||||||
/*------------------------------------------------------------------------
|
|
||||||
* TIMEBASE -- |
|
||||||
* |
|
||||||
* The high res timer defaults to 1 msec. Since it includes the period |
|
||||||
* registers, the interrupt frequency can be reduced using TMRCNT. |
|
||||||
* If the default period is acceptable, TMRCNT can be left undefined. |
|
||||||
* TMRMS represents the desired mecs per tick (msecs per interrupt). |
|
||||||
*----------------------------------------------------------------------*/ |
|
||||||
#define CONFIG_SYS_LOW_RES_TIMER |
|
||||||
#define CONFIG_SYS_NIOS_TMRBASE 0x02120820 /* Tick timer base addr */ |
|
||||||
#define CONFIG_SYS_NIOS_TMRIRQ 3 /* Timer IRQ num */ |
|
||||||
#define CONFIG_SYS_NIOS_TMRMS 10 /* Desired period */ |
|
||||||
#define CONFIG_SYS_NIOS_TMRCNT \ |
|
||||||
(CONFIG_SYS_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000)) |
|
||||||
|
|
||||||
/*------------------------------------------------------------------------
|
|
||||||
* STATUS LED -- Provides a simple blinking led. For Nios2 each board |
|
||||||
* must implement its own led routines -- leds are, after all, |
|
||||||
* board-specific, no? |
|
||||||
*----------------------------------------------------------------------*/ |
|
||||||
#define CONFIG_SYS_LEDPIO_ADDR 0x02120870 /* LED PIO base addr */ |
|
||||||
#define CONFIG_STATUS_LED /* Enable status driver */ |
|
||||||
#define CONFIG_BOARD_SPECIFIC_LED |
|
||||||
|
|
||||||
#define STATUS_LED_BIT 1 /* Bit-0 on PIO */ |
|
||||||
#define STATUS_LED_STATE 1 /* Blinking */ |
|
||||||
#define STATUS_LED_PERIOD (500/CONFIG_SYS_NIOS_TMRMS) /* Every 500 msec */ |
|
||||||
|
|
||||||
/*------------------------------------------------------------------------
|
|
||||||
* ETHERNET -- The header file for the SMC91111 driver hurts my eyes ... |
|
||||||
* and really doesn't need any additional clutter. So I choose the lazy |
|
||||||
* way out to avoid changes there -- define the base address to ensure |
|
||||||
* cache bypass so there's no need to monkey with inx/outx macros. |
|
||||||
*----------------------------------------------------------------------*/ |
|
||||||
#define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */ |
|
||||||
#define CONFIG_SMC91111 /* Using SMC91c111 */ |
|
||||||
#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */ |
|
||||||
#define CONFIG_SMC_USE_32_BIT /* 32-bit interface */ |
|
||||||
|
|
||||||
#define CONFIG_ETHADDR 08:00:3e:26:0a:5b |
|
||||||
#define CONFIG_NETMASK 255.255.255.0 |
|
||||||
#define CONFIG_IPADDR 192.168.2.21 |
|
||||||
#define CONFIG_SERVERIP 192.168.2.16 |
|
||||||
|
|
||||||
|
|
||||||
/*
|
|
||||||
* BOOTP options |
|
||||||
*/ |
|
||||||
#define CONFIG_BOOTP_BOOTFILESIZE |
|
||||||
#define CONFIG_BOOTP_BOOTPATH |
|
||||||
#define CONFIG_BOOTP_GATEWAY |
|
||||||
#define CONFIG_BOOTP_HOSTNAME |
|
||||||
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Command line configuration. |
|
||||||
*/ |
|
||||||
|
|
||||||
#define CONFIG_CMD_BDI |
|
||||||
#define CONFIG_CMD_DHCP |
|
||||||
#define CONFIG_CMD_ECHO |
|
||||||
#define CONFIG_CMD_SAVEENV |
|
||||||
#define CONFIG_CMD_FLASH |
|
||||||
#define CONFIG_CMD_IMI |
|
||||||
#define CONFIG_CMD_IRQ |
|
||||||
#define CONFIG_CMD_LOADS |
|
||||||
#define CONFIG_CMD_LOADB |
|
||||||
#define CONFIG_CMD_MEMORY |
|
||||||
#define CONFIG_CMD_MISC |
|
||||||
#define CONFIG_CMD_NET |
|
||||||
#define CONFIG_CMD_PING |
|
||||||
#define CONFIG_CMD_RUN |
|
||||||
#define CONFIG_CMD_SAVES |
|
||||||
|
|
||||||
|
|
||||||
/*------------------------------------------------------------------------
|
|
||||||
* COMPACT FLASH |
|
||||||
*----------------------------------------------------------------------*/ |
|
||||||
#if defined(CONFIG_CMD_IDE) |
|
||||||
#define CONFIG_IDE_PREINIT /* Implement id_preinit */ |
|
||||||
#define CONFIG_SYS_IDE_MAXBUS 1 /* 1 IDE bus */ |
|
||||||
#define CONFIG_SYS_IDE_MAXDEVICE 1 /* 1 drive per IDE bus */ |
|
||||||
|
|
||||||
#define CONFIG_SYS_ATA_BASE_ADDR 0x00900800 /* ATA base addr */ |
|
||||||
#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000 /* IDE0 offset */ |
|
||||||
#define CONFIG_SYS_ATA_DATA_OFFSET 0x0040 /* Data IO offset */ |
|
||||||
#define CONFIG_SYS_ATA_REG_OFFSET 0x0040 /* Register offset */ |
|
||||||
#define CONFIG_SYS_ATA_ALT_OFFSET 0x0100 /* Alternate reg offset */ |
|
||||||
#define CONFIG_SYS_ATA_STRIDE 4 /* Width betwix addrs */ |
|
||||||
#define CONFIG_DOS_PARTITION |
|
||||||
|
|
||||||
/* Board-specific cf regs */ |
|
||||||
#define CONFIG_SYS_CF_PRESENT 0x00900880 /* CF Present PIO base */ |
|
||||||
#define CONFIG_SYS_CF_POWER 0x00900890 /* CF Power FET PIO base*/ |
|
||||||
#define CONFIG_SYS_CF_ATASEL 0x009008a0 /* CF ATASEL PIO base */ |
|
||||||
|
|
||||||
#endif |
|
||||||
|
|
||||||
/*------------------------------------------------------------------------
|
|
||||||
* JFFS2 |
|
||||||
*----------------------------------------------------------------------*/ |
|
||||||
#if defined(CONFIG_CMD_JFFS2) |
|
||||||
#define CONFIG_SYS_JFFS_CUSTOM_PART /* board defined part */ |
|
||||||
#endif |
|
||||||
|
|
||||||
/*------------------------------------------------------------------------
|
|
||||||
* MISC |
|
||||||
*----------------------------------------------------------------------*/ |
|
||||||
#define CONFIG_SYS_LONGHELP /* Provide extended help*/ |
|
||||||
#define CONFIG_SYS_CBSIZE 256 /* Console I/O buf size */ |
|
||||||
#define CONFIG_SYS_MAXARGS 16 /* Max command args */ |
|
||||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot arg buf size */ |
|
||||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print buf size */ |
|
||||||
#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE /* Default load address */ |
|
||||||
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE /* Start addr for test */ |
|
||||||
#define CONFIG_SYS_MEMTEST_END CONFIG_SYS_INIT_SP - 0x00020000 |
|
||||||
|
|
||||||
#define CONFIG_SYS_HUSH_PARSER |
|
||||||
|
|
||||||
#endif /* __CONFIG_H */ |
|
||||||
Loading…
Reference in new issue