add FAT support for IDE, SCSI and USB * Patches by Gleb Natapov, 2 Sep 2003: - cleanup of POST code for unsupported architectures - MPC824x locks way0 of data cache for use as initial RAM; this patch unlocks it after relocation to RAM and invalidates the locked entries. * Patch by Gleb Natapov, 30 Aug 2003: new I2C driver for mpc107 bridge. Now works from flash. * Patch by Dave Ellis, 11 Aug 2003: - JFFS2: fix typo in common/cmd_jffs2.c - JFFS2: fix CFG_JFFS2_SORT_FRAGMENTS option - JFFS2: remove node version 0 warning - JFFS2: accept JFFS2 PADDING nodes - SXNI855T: add AM29LV800 support - SXNI855T: move environment from EEPROM to flash - SXNI855T: boot from JFFS2 in NOR or NAND flash * Patch by Bill Hargen, 11 Aug 2003: fixes for I2C on MPC8240 - fix i2c_write routine - fix iprobe command - eliminates use of global variables, plus dead code, cleanup.master
parent
149dded2b1
commit
7205e4075d
@ -1,84 +0,0 @@ |
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##########################################################################
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||||||
#
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# Copyright Motorola, Inc. 1997
|
|
||||||
# ALL RIGHTS RESERVED
|
|
||||||
#
|
|
||||||
# You are hereby granted a copyright license to use, modify, and
|
|
||||||
# distribute the SOFTWARE so long as this entire notice is retained
|
|
||||||
# without alteration in any modified and/or redistributed versions,
|
|
||||||
# and that such modified versions are clearly identified as such.
|
|
||||||
# No licenses are granted by implication, estoppel or otherwise under
|
|
||||||
# any patents or trademarks of Motorola, Inc.
|
|
||||||
#
|
|
||||||
# The SOFTWARE is provided on an "AS IS" basis and without warranty.
|
|
||||||
# To the maximum extent permitted by applicable law, MOTOROLA DISCLAIMS
|
|
||||||
# ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, INCLUDING IMPLIED
|
|
||||||
# WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR
|
|
||||||
# PURPOSE AND ANY WARRANTY AGAINST INFRINGEMENT WITH
|
|
||||||
# REGARD TO THE SOFTWARE (INCLUDING ANY MODIFIED VERSIONS
|
|
||||||
# THEREOF) AND ANY ACCOMPANYING WRITTEN MATERIALS.
|
|
||||||
#
|
|
||||||
# To the maximum extent permitted by applicable law, IN NO EVENT SHALL
|
|
||||||
# MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
|
|
||||||
# (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF
|
|
||||||
# BUSINESS PROFITS, BUSINESS INTERRUPTION, LOSS OF BUSINESS
|
|
||||||
# INFORMATION, OR OTHER PECUNIARY LOSS) ARISING OF THE USE OR
|
|
||||||
# INABILITY TO USE THE SOFTWARE.
|
|
||||||
#
|
|
||||||
############################################################################
|
|
||||||
TARGET = libi2c.a
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|
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#DEBUG = -g
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DEBUG = -DI2CDBG
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|
||||||
LST = -Hanno -S
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|
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OPTIM =
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CC = /risc/tools/pkgs/metaware/bin/hcppc
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|
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CFLAGS = -Hnocopyr -c -Hsds -Hon=Char_default_unsigned -Hon=Char_is_rep -I../inc -I/risc/tools/pkgs/metaware/inc
|
|
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CCobj = $(CC) $(CFLAGS) $(DEBUG) $(OPTIM)
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|
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PREP = $(CC) $(CFLAGS) -P
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|
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|
|
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# Assembler used to build the .s files (for the board version)
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|
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|
|
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ASOPT = -big_si -c
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|
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ASDEBUG = -l -fm
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|
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AS = /risc/tools/pkgs/metaware/bin/asppc
|
|
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|
|
||||||
# Linker to bring .o files together into an executable.
|
|
||||||
|
|
||||||
LKOPT = -Bbase=0 -q -Qn -r
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|
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LKCMD =
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|
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LINK = /risc/tools/pkgs/metaware/bin/ldppc $(LKCMD) $(LKOPT)
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|
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|
|
||||||
# DOS Utilities
|
|
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|
|
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DEL = rm
|
|
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COPY = cp
|
|
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LIST = ls
|
|
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|
|
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OBJECTS = i2c1.o i2c2.o
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|
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|
|
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all: $(TARGET) |
|
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|
|
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objects: $(OBJECTS) |
|
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|
|
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$(TARGET): $(OBJECTS) |
|
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$(LINK) $(OBJECTS) -o $@
|
|
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|
|
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clean: |
|
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$(DEL) -f *.o *.i *.map *.lst $(TARGET) $(OBJECTS)
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|
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|
|
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.s.o: |
|
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$(DEL) -f $*.i
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$(PREP) -Hasmcpp $<
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$(AS) $(ASOPT) $*.i
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# $(AS) $(ASOPT) $(ASDEBUG) $*.i > $*.lst
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.c.o: |
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$(CCobj) $<
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.c.s: |
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$(CCobj) $(LST) $<
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i2c1.o: i2c_export.h i2c.h i2c1.c |
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i2c2.o: i2c.h i2c2.s |
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@ -1,91 +0,0 @@ |
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########################################################################## |
|
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# |
|
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# makefile_pc for use with PC mksnt tools dink32/drivers/i2c |
|
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# |
|
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# Copyright Motorola, Inc. 1997 |
|
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# ALL RIGHTS RESERVED |
|
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# |
|
||||||
# You are hereby granted a copyright license to use, modify, and |
|
||||||
# distribute the SOFTWARE so long as this entire notice is retained |
|
||||||
# without alteration in any modified and/or redistributed versions, |
|
||||||
# and that such modified versions are clearly identified as such. |
|
||||||
# No licenses are granted by implication, estoppel or otherwise under |
|
||||||
# any patents or trademarks of Motorola, Inc. |
|
||||||
# |
|
||||||
# The SOFTWARE is provided on an "AS IS" basis and without warranty. |
|
||||||
# To the maximum extent permitted by applicable law, MOTOROLA DISCLAIMS |
|
||||||
# ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, INCLUDING IMPLIED |
|
||||||
# WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR |
|
||||||
# PURPOSE AND ANY WARRANTY AGAINST INFRINGEMENT WITH |
|
||||||
# REGARD TO THE SOFTWARE (INCLUDING ANY MODIFIED VERSIONS |
|
||||||
# THEREOF) AND ANY ACCOMPANYING WRITTEN MATERIALS. |
|
||||||
# |
|
||||||
# To the maximum extent permitted by applicable law, IN NO EVENT SHALL |
|
||||||
# MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER |
|
||||||
# (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF |
|
||||||
# BUSINESS PROFITS, BUSINESS INTERRUPTION, LOSS OF BUSINESS |
|
||||||
# INFORMATION, OR OTHER PECUNIARY LOSS) ARISING OF THE USE OR |
|
||||||
# INABILITY TO USE THE SOFTWARE. |
|
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# |
|
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############################################################################ |
|
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TARGET = libi2c.a |
|
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|
|
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#DEBUG = -g |
|
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DEBUG = -DI2CDBG |
|
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LST = -Hanno -S |
|
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OPTIM = |
|
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CC = m:/old_tools/tools/hcppc/bin/hcppc |
|
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CFLAGS = -Hnocopyr -c -Hsds -Hon=Char_default_unsigned -Hon=Char_is_rep -I../inc -I/risc/tools/pkgs/metaware/inc |
|
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CCobj = $(CC) $(CFLAGS) $(DEBUG) $(OPTIM) |
|
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PREP = $(CC) $(CFLAGS) -P |
|
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|
|
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# Assembler used to build the .s files (for the board version) |
|
||||||
|
|
||||||
ASOPT = -big_si -c |
|
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ASDEBUG = -l -fm |
|
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AS = m:/old_tools/tools/hcppc/bin/asppc |
|
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|
|
||||||
# Linker to bring .o files together into an executable. |
|
||||||
|
|
||||||
LKOPT = -Bbase=0 -q -Qn -r |
|
||||||
LKCMD = |
|
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LINK = m:/old_tools/tools/hcppc/bin/ldppc $(LKCMD) $(LKOPT) |
|
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|
|
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# DOS Utilities |
|
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|
|
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DEL = rm |
|
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COPY = cp |
|
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LIST = ls |
|
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|
|
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OBJECTS = i2c1.o i2c2.o |
|
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|
|
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all: $(TARGET) |
|
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|
|
||||||
objects: $(OBJECTS) |
|
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|
|
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$(TARGET): $(OBJECTS) |
|
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$(LINK) $(OBJECTS) -o $@ |
|
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|
|
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clean: |
|
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$(DEL) -f *.o *.i *.map *.lst $(TARGET) $(OBJECTS) |
|
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|
|
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.s.o: |
|
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$(DEL) -f $*.i |
|
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$(PREP) -Hasmcpp $< |
|
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$(AS) $(ASOPT) $*.i |
|
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# $(AS) $(ASOPT) $(ASDEBUG) $*.i > $*.lst |
|
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|
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.c.o: |
|
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$(CCobj) $< |
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.c.s: |
|
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$(CCobj) $(LST) $< |
|
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|
|
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i2c1.o: i2c_export.h i2c.h i2c1.c |
|
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$(CCobj) $< |
|
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|
|
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|
|
||||||
i2c2.o: i2c.h i2c2.s |
|
||||||
$(DEL) -f $*.i |
|
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$(PREP) -Hasmcpp $< |
|
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$(AS) $(ASOPT) $*.i |
|
@ -1,104 +0,0 @@ |
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CONTENT: |
|
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|
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i2c.h |
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i2c1.c |
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i2c2.s |
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WHAT ARE THESE FILES: |
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|
|
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These files contain MPC8240 (Kahlua) I2C |
|
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driver routines. The driver routines are not |
|
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written for any specific operating system. |
|
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They serves the purpose of code sample, and |
|
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jump-start for using the MPC8240 I2C unit. |
|
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|
|
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For the reason of correctness of C language |
|
||||||
syntax, these files are compiled by Metaware |
|
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C compiler and assembler. |
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ENDIAN NOTATION: |
|
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|
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The algorithm is designed for big-endian mode, |
|
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software is responsible for byte swapping. |
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USAGE: |
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|
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1. The host system that is running on MPC8240 |
|
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shall link the files listed here. The memory |
|
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location of driver routines shall take into |
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account of that driver routines need to run |
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in supervisor mode and they process I2C |
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interrupt. |
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2. The host system is responsible for configuring |
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the MPC8240 including Embedded Utilities Memory |
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Block. All I2C driver functions require the |
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content of Embedded Utilities Memory Block |
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Base Address Register, EUMBBAR, as the first |
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parameter. |
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3. Before I2C unit of MPC8240 can be used, |
|
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initialize I2C unit by calling I2C_Init |
|
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with the corresponding parameters. |
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|
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Note that the I2CFDR register shall be written |
|
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once during the initialization. If it is written |
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in the midst of transers, or after I2C STOPs or |
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REPEAT STATRs, depending on the data written, |
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a long reset time may be encountered. |
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4. After I2C unit has been successfully initialized, |
|
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use the Application level API to send data or |
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receive data upon the desired mode, Master or |
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Slave. |
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5. If the host system is also using the EPIC unit |
|
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on MPC8240, the system can register the |
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I2C_ISR with the EPIC including other |
|
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desired resources. |
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If the host system does not using the EPIC unit |
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on MPC8240, I2C_Timer_Event function can |
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be called for each desired time interval. |
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In both cases, the host system is free to provide |
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its own timer event handler and interrupt service |
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routine. |
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6. The I2C driver routines contains a set |
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of utilities, Set and Get, for host system |
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to query and modify the desired I2C registers. |
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7. It is the host system's responsibility of |
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queueing the I2C I/O request. The host |
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system shall check the I2C_ISR return code |
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for I2C I/O status. If I2C_ISR returns |
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I2CBUFFEMPTY or I2CBUFFFULL, it means |
|
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I2C unit has completed a I/O request |
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stated by the Application API. |
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8. If the host system has more than one master |
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mode I2C unit I/O requests but doesn't want |
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to be intervented by being addressed as slave, |
|
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the host system can use the master mode |
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Application API with stop_flag set to 0 in |
|
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conjunction with is_cnt flag set to 1. |
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The first API call sets both stop_flag and |
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is_cnt to 0, indicating a START condition |
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shall be generated but when the end of |
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transaction is reached, do not generate a |
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STOP condition. Once the host system is |
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informed that the transaction has been |
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completed, the next Application API call |
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shall set is_cnt flag to 1, indicating a |
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repeated START condition shall be generated. |
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The last Application API call shall set |
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stop_flag |
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to 1. |
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|
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9. The I2C_Timer_Event function containes |
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a user defined function pointer. It |
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serves the purpose of providing the |
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host system a way to use its own event |
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handler instead of the I2C_ISR provided |
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here. |
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@ -0,0 +1,284 @@ |
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|
/*
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|
* (C) Copyright 2003 |
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|
* Gleb Natapov <gnatapov@mrv.com> |
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|
* Some bits are taken from linux driver writen by adrian@humboldt.co.uk |
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|
* |
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|
* Hardware I2C driver for MPC107 PCI bridge. |
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|
* |
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|
* See file CREDITS for list of people who contributed to this |
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|
* project. |
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|
* |
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|
* This program is free software; you can redistribute it and/or |
||||||
|
* modify it under the terms of the GNU General Public License as |
||||||
|
* published by the Free Software Foundation; either version 2 of |
||||||
|
* the License, or (at your option) any later version. |
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|
* |
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|
* This program is distributed in the hope that it will be useful, |
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|
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||||
|
* GNU General Public License for more details. |
||||||
|
* |
||||||
|
* You should have received a copy of the GNU General Public License |
||||||
|
* along with this program; if not, write to the Free Software |
||||||
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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|
* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#undef I2CDBG |
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#ifdef CONFIG_HARD_I2C |
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#include <i2c.h> |
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|
#define TIMEOUT (CFG_HZ/4) |
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|
#define I2C_Addr ((unsigned *)(CFG_EUMB_ADDR + 0x3000)) |
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|
#define I2CADR &I2C_Addr[0] |
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#define I2CFDR &I2C_Addr[1] |
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|
#define I2CCCR &I2C_Addr[2] |
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#define I2CCSR &I2C_Addr[3] |
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#define I2CCDR &I2C_Addr[4] |
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#define MPC107_CCR_MEN 0x80 |
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|
#define MPC107_CCR_MIEN 0x40 |
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#define MPC107_CCR_MSTA 0x20 |
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|
#define MPC107_CCR_MTX 0x10 |
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|
#define MPC107_CCR_TXAK 0x08 |
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#define MPC107_CCR_RSTA 0x04 |
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|
#define MPC107_CSR_MCF 0x80 |
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|
#define MPC107_CSR_MAAS 0x40 |
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|
#define MPC107_CSR_MBB 0x20 |
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|
#define MPC107_CSR_MAL 0x10 |
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|
#define MPC107_CSR_SRW 0x04 |
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|
#define MPC107_CSR_MIF 0x02 |
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|
#define MPC107_CSR_RXAK 0x01 |
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|
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|
#define I2C_READ 1 |
||||||
|
#define I2C_WRITE 0 |
||||||
|
|
||||||
|
/* taken from linux include/asm-ppc/io.h */ |
||||||
|
inline unsigned in_le32 (volatile unsigned *addr) |
||||||
|
{ |
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|
unsigned ret; |
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|
|
||||||
|
__asm__ __volatile__ ("lwbrx %0,0,%1;\n" |
||||||
|
"twi 0,%0,0;\n" |
||||||
|
"isync":"=r" (ret): "r" (addr), "m" (*addr)); |
||||||
|
return ret; |
||||||
|
} |
||||||
|
|
||||||
|
inline void out_le32 (volatile unsigned *addr, int val) |
||||||
|
{ |
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|
__asm__ __volatile__ ("stwbrx %1,0,%2; eieio":"=m" (*addr):"r" (val), |
||||||
|
"r" (addr)); |
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|
} |
||||||
|
|
||||||
|
#define writel(val, addr) out_le32(addr, val) |
||||||
|
#define readl(addr) in_le32(addr) |
||||||
|
|
||||||
|
void i2c_init (int speed, int slaveadd) |
||||||
|
{ |
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|
/* stop I2C controller */ |
||||||
|
writel (0x0, I2CCCR); |
||||||
|
/* set clock */ |
||||||
|
writel (0x1020, I2CFDR); |
||||||
|
/* write slave address */ |
||||||
|
writel (slaveadd, I2CADR); |
||||||
|
/* clear status register */ |
||||||
|
writel (0x0, I2CCSR); |
||||||
|
/* start I2C controller */ |
||||||
|
writel (MPC107_CCR_MEN, I2CCCR); |
||||||
|
|
||||||
|
return; |
||||||
|
} |
||||||
|
|
||||||
|
static __inline__ int i2c_wait4bus (void) |
||||||
|
{ |
||||||
|
ulong timeval = get_timer (0); |
||||||
|
|
||||||
|
while (readl (I2CCSR) & MPC107_CSR_MBB) |
||||||
|
if (get_timer (timeval) > TIMEOUT) |
||||||
|
return -1; |
||||||
|
|
||||||
|
return 0; |
||||||
|
} |
||||||
|
|
||||||
|
static __inline__ int i2c_wait (int write) |
||||||
|
{ |
||||||
|
u32 csr; |
||||||
|
ulong timeval = get_timer (0); |
||||||
|
|
||||||
|
do { |
||||||
|
csr = readl (I2CCSR); |
||||||
|
|
||||||
|
if (!(csr & MPC107_CSR_MIF)) |
||||||
|
continue; |
||||||
|
|
||||||
|
writel (0x0, I2CCSR); |
||||||
|
|
||||||
|
if (csr & MPC107_CSR_MAL) { |
||||||
|
#ifdef I2CDBG |
||||||
|
printf ("i2c_wait: MAL\n"); |
||||||
|
#endif |
||||||
|
return -1; |
||||||
|
} |
||||||
|
|
||||||
|
if (!(csr & MPC107_CSR_MCF)) { |
||||||
|
#ifdef I2CDBG |
||||||
|
printf ("i2c_wait: unfinished\n"); |
||||||
|
#endif |
||||||
|
return -1; |
||||||
|
} |
||||||
|
|
||||||
|
if (write == I2C_WRITE && (csr & MPC107_CSR_RXAK)) { |
||||||
|
#ifdef I2CDBG |
||||||
|
printf ("i2c_wait: No RXACK\n"); |
||||||
|
#endif |
||||||
|
return -1; |
||||||
|
} |
||||||
|
|
||||||
|
return 0; |
||||||
|
} while (get_timer (timeval) < TIMEOUT); |
||||||
|
|
||||||
|
#ifdef I2CDBG |
||||||
|
printf ("i2c_wait: timed out\n"); |
||||||
|
#endif |
||||||
|
return -1; |
||||||
|
} |
||||||
|
|
||||||
|
static __inline__ int i2c_write_addr (u8 dev, u8 dir, int rsta) |
||||||
|
{ |
||||||
|
writel (MPC107_CCR_MEN | MPC107_CCR_MSTA | MPC107_CCR_MTX | |
||||||
|
(rsta ? MPC107_CCR_RSTA : 0), I2CCCR); |
||||||
|
|
||||||
|
writel ((dev << 1) | dir, I2CCDR); |
||||||
|
|
||||||
|
if (i2c_wait (I2C_WRITE) < 0) |
||||||
|
return 0; |
||||||
|
|
||||||
|
return 1; |
||||||
|
} |
||||||
|
|
||||||
|
static __inline__ int __i2c_write (u8 * data, int length) |
||||||
|
{ |
||||||
|
int i; |
||||||
|
|
||||||
|
writel (MPC107_CCR_MEN | MPC107_CCR_MSTA | MPC107_CCR_MTX, I2CCCR); |
||||||
|
|
||||||
|
for (i = 0; i < length; i++) { |
||||||
|
writel (data[i], I2CCDR); |
||||||
|
|
||||||
|
if (i2c_wait (I2C_WRITE) < 0) |
||||||
|
break; |
||||||
|
} |
||||||
|
|
||||||
|
return i; |
||||||
|
} |
||||||
|
|
||||||
|
static __inline__ int __i2c_read (u8 * data, int length) |
||||||
|
{ |
||||||
|
int i; |
||||||
|
|
||||||
|
writel (MPC107_CCR_MEN | MPC107_CCR_MSTA | |
||||||
|
((length == 1) ? MPC107_CCR_TXAK : 0), I2CCCR); |
||||||
|
|
||||||
|
/* dummy read */ |
||||||
|
readl (I2CCDR); |
||||||
|
|
||||||
|
for (i = 0; i < length; i++) { |
||||||
|
if (i2c_wait (I2C_READ) < 0) |
||||||
|
break; |
||||||
|
|
||||||
|
/* Generate ack on last next to last byte */ |
||||||
|
if (i == length - 2) |
||||||
|
writel (MPC107_CCR_MEN | MPC107_CCR_MSTA | |
||||||
|
MPC107_CCR_TXAK, I2CCCR); |
||||||
|
|
||||||
|
/* Generate stop on last byte */ |
||||||
|
if (i == length - 1) |
||||||
|
writel (MPC107_CCR_MEN | MPC107_CCR_TXAK, I2CCCR); |
||||||
|
|
||||||
|
data[i] = readl (I2CCDR); |
||||||
|
} |
||||||
|
|
||||||
|
return i; |
||||||
|
} |
||||||
|
|
||||||
|
int i2c_read (u8 dev, uint addr, int alen, u8 * data, int length) |
||||||
|
{ |
||||||
|
int i = 0; |
||||||
|
u8 *a = (u8 *) & addr; |
||||||
|
|
||||||
|
if (i2c_wait4bus () < 0) |
||||||
|
goto exit; |
||||||
|
|
||||||
|
if (i2c_write_addr (dev, I2C_WRITE, 0) == 0) |
||||||
|
goto exit; |
||||||
|
|
||||||
|
if (__i2c_write (&a[4 - alen], alen) != alen) |
||||||
|
goto exit; |
||||||
|
|
||||||
|
if (i2c_write_addr (dev, I2C_READ, 1) == 0) |
||||||
|
goto exit; |
||||||
|
|
||||||
|
i = __i2c_read (data, length); |
||||||
|
|
||||||
|
exit: |
||||||
|
writel (MPC107_CCR_MEN, I2CCCR); |
||||||
|
|
||||||
|
return !(i == length); |
||||||
|
} |
||||||
|
|
||||||
|
int i2c_write (u8 dev, uint addr, int alen, u8 * data, int length) |
||||||
|
{ |
||||||
|
int i = 0; |
||||||
|
u8 *a = (u8 *) & addr; |
||||||
|
|
||||||
|
if (i2c_wait4bus () < 0) |
||||||
|
goto exit; |
||||||
|
|
||||||
|
if (i2c_write_addr (dev, I2C_WRITE, 0) == 0) |
||||||
|
goto exit; |
||||||
|
|
||||||
|
if (__i2c_write (&a[4 - alen], alen) != alen) |
||||||
|
goto exit; |
||||||
|
|
||||||
|
i = __i2c_write (data, length); |
||||||
|
|
||||||
|
exit: |
||||||
|
writel (MPC107_CCR_MEN, I2CCCR); |
||||||
|
|
||||||
|
return !(i == length); |
||||||
|
} |
||||||
|
|
||||||
|
int i2c_probe (uchar chip) |
||||||
|
{ |
||||||
|
int tmp; |
||||||
|
|
||||||
|
/*
|
||||||
|
* Try to read the first location of the chip. The underlying |
||||||
|
* driver doesn't appear to support sending just the chip address |
||||||
|
* and looking for an <ACK> back. |
||||||
|
*/ |
||||||
|
udelay (10000); |
||||||
|
return i2c_read (chip, 0, 1, (char *) &tmp, 1); |
||||||
|
} |
||||||
|
|
||||||
|
uchar i2c_reg_read (uchar i2c_addr, uchar reg) |
||||||
|
{ |
||||||
|
char buf[1]; |
||||||
|
|
||||||
|
i2c_read (i2c_addr, reg, 1, buf, 1); |
||||||
|
|
||||||
|
return (buf[0]); |
||||||
|
} |
||||||
|
|
||||||
|
void i2c_reg_write (uchar i2c_addr, uchar reg, uchar val) |
||||||
|
{ |
||||||
|
i2c_write (i2c_addr, reg, 1, &val, 1); |
||||||
|
} |
||||||
|
|
||||||
|
#endif /* CONFIG_HARD_I2C */ |
@ -1,309 +0,0 @@ |
|||||||
#ifndef I2C_H |
|
||||||
#define I2C_H |
|
||||||
|
|
||||||
/****************************************************
|
|
||||||
* |
|
||||||
* Copyright Motrola 1999 |
|
||||||
* |
|
||||||
****************************************************/ |
|
||||||
#define get_eumbbar() CFG_EUMB_ADDR |
|
||||||
|
|
||||||
#define I2CADR 0x00003000 |
|
||||||
#define I2CFDR 0x00003004 |
|
||||||
#define I2CCR 0x00003008 |
|
||||||
#define I2CSR 0x0000300C |
|
||||||
#define I2CDR 0x00003010 |
|
||||||
|
|
||||||
typedef enum _i2cstatus |
|
||||||
{ |
|
||||||
I2CSUCCESS = 0x3000, |
|
||||||
I2CADDRESS, |
|
||||||
I2CERROR, |
|
||||||
I2CBUFFFULL, |
|
||||||
I2CBUFFEMPTY, |
|
||||||
I2CXMITERROR, |
|
||||||
I2CRCVERROR, |
|
||||||
I2CBUSBUSY, |
|
||||||
I2CALOSS, |
|
||||||
I2CNOEVENT, |
|
||||||
} I2CStatus; |
|
||||||
|
|
||||||
typedef enum i2c_control |
|
||||||
{ |
|
||||||
MEN = 0x00000080, |
|
||||||
MIEN = 0x00000040, |
|
||||||
MSTA = 0x00000020, |
|
||||||
MTX = 0x00000010, |
|
||||||
TXAK = 0x00000008, |
|
||||||
RSTA = 0x00000004, |
|
||||||
} I2C_CONTROL; |
|
||||||
|
|
||||||
typedef enum i2c_status |
|
||||||
{ |
|
||||||
MCF = 0x00000080, |
|
||||||
MAAS = 0x00000040, |
|
||||||
MBB = 0x00000020, |
|
||||||
MAL = 0x00000010, |
|
||||||
SRW = 0x00000004, |
|
||||||
MIF = 0x00000002, |
|
||||||
RXAK = 0x00000001, |
|
||||||
} I2C_STATUS; |
|
||||||
|
|
||||||
typedef struct _i2c_ctrl |
|
||||||
{ |
|
||||||
unsigned int reserved0 : 24; |
|
||||||
unsigned int men : 1; |
|
||||||
unsigned int mien : 1; |
|
||||||
unsigned int msta : 1; |
|
||||||
unsigned int mtx : 1; |
|
||||||
unsigned int txak : 1; |
|
||||||
unsigned int rsta : 1; |
|
||||||
unsigned int reserved1 : 2; |
|
||||||
} I2C_CTRL; |
|
||||||
|
|
||||||
typedef struct _i2c_stat |
|
||||||
{ |
|
||||||
unsigned int rsrv0 : 24; |
|
||||||
unsigned int mcf : 1; |
|
||||||
unsigned int maas : 1; |
|
||||||
unsigned int mbb : 1; |
|
||||||
unsigned int mal : 1; |
|
||||||
unsigned int rsrv1 : 1; |
|
||||||
unsigned int srw : 1; |
|
||||||
unsigned int mif : 1; |
|
||||||
unsigned int rxak : 1; |
|
||||||
} I2C_STAT; |
|
||||||
|
|
||||||
typedef enum _i2c_mode |
|
||||||
{ |
|
||||||
RCV = 0, |
|
||||||
XMIT = 1, |
|
||||||
} I2C_MODE; |
|
||||||
|
|
||||||
/******************** App. API ********************
|
|
||||||
* The application API is for user level application |
|
||||||
* to use the funcitonality provided by I2C driver |
|
||||||
* |
|
||||||
* Note: Its App.s responsibility to swap the data |
|
||||||
* byte. In our API, we just transfer whatever |
|
||||||
* we are given |
|
||||||
**************************************************/ |
|
||||||
/**
|
|
||||||
* Note: |
|
||||||
* |
|
||||||
* In all following functions, |
|
||||||
* the caller shall pass the configured embedded utility memory |
|
||||||
* block base, EUMBBAR. |
|
||||||
**/ |
|
||||||
|
|
||||||
/* Send a buffer of data to the intended rcv_addr.
|
|
||||||
* If stop_flag is set, after the whole buffer |
|
||||||
* is sent, generate a STOP signal provided that the |
|
||||||
* receiver doesn't signal the STOP in the middle. |
|
||||||
* I2C is the master performing transmitting. If |
|
||||||
* no STOP signal is generated at the end of current |
|
||||||
* transaction, the master can generate a START signal |
|
||||||
* to another slave addr. |
|
||||||
* |
|
||||||
* return I2CSUCCESS if no error. |
|
||||||
*/ |
|
||||||
static I2CStatus I2C_put( unsigned int eumbbar, |
|
||||||
unsigned char rcv_addr, /* receiver's address */ |
|
||||||
unsigned char *buffer_ptr, /* pointer of data to be sent */ |
|
||||||
unsigned int length, /* number of byte of in the buffer */ |
|
||||||
unsigned int stop_flag, /* 1 - signal STOP when buffer is empty
|
|
||||||
* 0 - no STOP signal when buffer is empty |
|
||||||
*/ |
|
||||||
unsigned int is_cnt ); /* 1 - this is a restart, don't check MBB
|
|
||||||
* 0 - this is a new start, check MBB |
|
||||||
*/ |
|
||||||
|
|
||||||
/* Receive a buffer of data from the desired sender_addr
|
|
||||||
* If stop_flag is set, when the buffer is full and the |
|
||||||
* sender does not signal STOP, generate a STOP signal. |
|
||||||
* I2C is the master performing receiving. If no STOP signal |
|
||||||
* is generated, the master can generate a START signal |
|
||||||
* to another slave addr. |
|
||||||
* |
|
||||||
* return I2CSUCCESS if no error. |
|
||||||
*/ |
|
||||||
static I2CStatus I2C_get( unsigned int eumbbar, |
|
||||||
unsigned char sender_addr, /* sender's address */ |
|
||||||
unsigned char *buffer_ptr, /* pointer of receiving buffer */ |
|
||||||
unsigned int length, /* length of the receiving buffer */ |
|
||||||
unsigned int stop_flag, /* 1 - signal STOP when buffer is full
|
|
||||||
* 0 - no STOP signal when buffer is full |
|
||||||
*/ |
|
||||||
unsigned int is_cnt ); /* 1 - this is a restart, don't check MBB
|
|
||||||
* 0 - this is a new start, check MBB |
|
||||||
*/ |
|
||||||
|
|
||||||
#if 0 /* the I2C_write and I2C_read functions are not active */
|
|
||||||
/* Send a buffer of data to the requiring master.
|
|
||||||
* If stop_flag is set, after the whole buffer is sent, |
|
||||||
* generate a STOP signal provided that the requiring |
|
||||||
* receiver doesn't signal the STOP in the middle. |
|
||||||
* I2C is the slave performing transmitting. |
|
||||||
* |
|
||||||
* return I2CSUCCESS if no error. |
|
||||||
* |
|
||||||
* Note: due to the Kahlua design, slave transmitter |
|
||||||
* shall not signal STOP since there is no way |
|
||||||
* for master to detect it, causing I2C bus hung. |
|
||||||
* |
|
||||||
* For the above reason, the stop_flag is always |
|
||||||
* set, i.e., 1. |
|
||||||
* |
|
||||||
* programmer shall use the timer on Kahlua to |
|
||||||
* control the interval of data byte at the |
|
||||||
* master side. |
|
||||||
*/ |
|
||||||
static I2CStatus I2C_write( unsigned int eumbbar, |
|
||||||
unsigned char *buffer_ptr, /* pointer of data to be sent */ |
|
||||||
unsigned int length, /* number of byte of in the buffer */ |
|
||||||
unsigned int stop_flag ); /* 1 - signal STOP when buffer is empty
|
|
||||||
* 0 - no STOP signal when buffer is empty |
|
||||||
*/ |
|
||||||
|
|
||||||
/* Receive a buffer of data from the sending master.
|
|
||||||
* If stop_flag is set, when the buffer is full and the |
|
||||||
* sender does not signal STOP, generate a STOP signal. |
|
||||||
* I2C is the slave performing receiving. |
|
||||||
* |
|
||||||
* return I2CSUCCESS if no error. |
|
||||||
*/ |
|
||||||
static I2CStatus I2C_read(unsigned int eumbbar, |
|
||||||
unsigned char *buffer_ptr, /* pointer of receiving buffer */ |
|
||||||
unsigned int length, /* length of the receiving buffer */ |
|
||||||
unsigned int stop_flag ); /* 1 - signal STOP when buffer is full
|
|
||||||
* 0 - no STOP signal when buffer is full |
|
||||||
*/ |
|
||||||
#endif /* of if0 for turning off I2C_read & I2C_write */ |
|
||||||
|
|
||||||
/* if interrupt is not used, this is the timer event handler.
|
|
||||||
* After each fixed time interval, this function can be called |
|
||||||
* to check the I2C status and call appropriate function to |
|
||||||
* handle the status event. |
|
||||||
*/ |
|
||||||
static I2CStatus I2C_Timer_Event( unsigned int eumbbar, I2CStatus (*handler)( unsigned int ) ); |
|
||||||
|
|
||||||
/********************* Kernel API ************************
|
|
||||||
* Kernel APIs are functions I2C driver provides to the |
|
||||||
* O.S. |
|
||||||
*********************************************************/ |
|
||||||
|
|
||||||
/******************* device I/O function ***************/ |
|
||||||
|
|
||||||
/* Generate a START signal in the desired mode.
|
|
||||||
* I2C is the master. |
|
||||||
* |
|
||||||
* return I2CSUCCESS if no error. |
|
||||||
* I2CERROR if i2c unit is not enabled. |
|
||||||
* I2CBUSBUSY if bus cannot be granted |
|
||||||
*/ |
|
||||||
static I2CStatus I2C_Start( unsigned int eumbbar, |
|
||||||
unsigned char slave_addr, /* address of the receiver */ |
|
||||||
I2C_MODE mode, /* XMIT(1) - put (write)
|
|
||||||
* RCV(0) - get (read) |
|
||||||
*/ |
|
||||||
unsigned int is_cnt ); /* 1 - this is a restart, don't check MBB
|
|
||||||
* 0 - this is a new start, check MBB |
|
||||||
*/ |
|
||||||
|
|
||||||
/* Generate a STOP signal to terminate the transaction. */ |
|
||||||
static I2CStatus I2C_Stop( unsigned int eumbbar ); |
|
||||||
|
|
||||||
/* Do a one-byte master transmit.
|
|
||||||
* |
|
||||||
* return I2CBUFFEMPTY if this is the last byte. |
|
||||||
* Otherwise return I2CSUCCESS |
|
||||||
*/ |
|
||||||
static I2CStatus I2C_Master_Xmit( unsigned int eumbbar ); |
|
||||||
|
|
||||||
/* Do a one-byte master receive.
|
|
||||||
* |
|
||||||
* return I2CBUFFFULL if this is the last byte. |
|
||||||
* Otherwise return I2CSUCCESS |
|
||||||
*/ |
|
||||||
static I2CStatus I2C_Master_Rcv( unsigned int eumbbar ); |
|
||||||
|
|
||||||
/* Do a one-byte slave transmit.
|
|
||||||
* |
|
||||||
* return I2CBUFFEMPTY if this is the last byte. |
|
||||||
* Otherwise return I2CSUCCESS |
|
||||||
* |
|
||||||
*/ |
|
||||||
static I2CStatus I2C_Slave_Xmit( unsigned int eumbbar ); |
|
||||||
|
|
||||||
/* Do a one-byte slave receive.
|
|
||||||
* |
|
||||||
* return I2CBUFFFULL if this is the last byte. |
|
||||||
* Otherwise return I2CSUCCESS |
|
||||||
*/ |
|
||||||
static I2CStatus I2C_Slave_Rcv( unsigned int eumbbar ); |
|
||||||
|
|
||||||
/* Process slave address phase.
|
|
||||||
* |
|
||||||
* return I2CADDRESS if this is slave receiver's address phase |
|
||||||
* Otherwise return the result of slave xmit one byte. |
|
||||||
*/ |
|
||||||
static I2CStatus I2C_Slave_Addr( unsigned int eumbbar ); |
|
||||||
|
|
||||||
/******************* Device Control Fucntion ****************/ |
|
||||||
/* Initialize I2C unit with desired frequency divider,
|
|
||||||
* driver's slave address w/o interrupt enabled. |
|
||||||
* |
|
||||||
* This function must be called before I2C unit can |
|
||||||
* be used. |
|
||||||
*/ |
|
||||||
static I2CStatus I2C_Init( unsigned int eumbbar, |
|
||||||
unsigned char fdr, /* frequency divider */ |
|
||||||
unsigned char addr, /* driver's address used for receiving */ |
|
||||||
unsigned int en_int); /* 1 - enable I2C interrupt
|
|
||||||
* 0 - disable I2C interrup |
|
||||||
*/ |
|
||||||
|
|
||||||
/* I2C interrupt service routine.
|
|
||||||
* |
|
||||||
* return I2CADDRESS if it is receiver's (either master or slave) address phase. |
|
||||||
* return the result of xmit or receive one byte |
|
||||||
*/ |
|
||||||
static I2CStatus I2C_ISR(unsigned int eumbbar ); |
|
||||||
|
|
||||||
/* Set I2C Status, i.e., write to I2CSR */ |
|
||||||
static void I2C_Set_Stat( unsigned int eumbbar, I2C_STAT stat ); |
|
||||||
|
|
||||||
/* Query I2C Status, i.e., read I2CSR */ |
|
||||||
static I2C_STAT I2C_Get_Stat( unsigned int eumbbar ); |
|
||||||
|
|
||||||
/* Change I2C Control bits, i.e., write to I2CCR */ |
|
||||||
static void I2C_Set_Ctrl( unsigned int eumbbar, I2C_CTRL ); /* new control value */ |
|
||||||
|
|
||||||
/* Query I2C Control bits, i.e., read I2CCR */ |
|
||||||
static I2C_CTRL I2C_Get_Ctrl( unsigned int eumbbar ); |
|
||||||
|
|
||||||
/* This function performs the work for I2C_do_transaction. The work is
|
|
||||||
* split into this function to enable I2C_do_transaction to first transmit |
|
||||||
* the data address to the I2C slave device without putting the data address |
|
||||||
* into the first byte of the buffer. |
|
||||||
* |
|
||||||
* en_int controls interrupt/polling mode |
|
||||||
* act is the type of transaction |
|
||||||
* i2c_addr is the I2C address of the slave device |
|
||||||
* len is the length of data to send or receive |
|
||||||
* buffer is the address of the data buffer |
|
||||||
* stop = I2C_NO_STOP, don't signal STOP at end of transaction |
|
||||||
* I2C_STOP, signal STOP at end of transaction |
|
||||||
* retry is the timeout retry value, currently ignored |
|
||||||
* rsta = I2C_NO_RESTART, this is not continuation of existing transaction |
|
||||||
* I2C_RESTART, this is a continuation of existing transaction |
|
||||||
*/ |
|
||||||
static I2C_Status I2C_do_buffer( I2C_INTERRUPT_MODE en_int, |
|
||||||
I2C_TRANSACTION_MODE act, |
|
||||||
unsigned char i2c_addr, |
|
||||||
int len, |
|
||||||
unsigned char *buffer, |
|
||||||
I2C_STOP_MODE stop, |
|
||||||
int retry, |
|
||||||
I2C_RESTART_MODE rsta); |
|
||||||
#endif |
|
File diff suppressed because it is too large
Load Diff
@ -1,52 +0,0 @@ |
|||||||
/************************************** |
|
||||||
* |
|
||||||
* copyright @ Motorola, 1999
|
|
||||||
* |
|
||||||
**************************************/ |
|
||||||
|
|
||||||
#include <config.h> |
|
||||||
#ifdef CONFIG_HARD_I2C |
|
||||||
#include <ppc_asm.tmpl> |
|
||||||
#include <asm/mmu.h> |
|
||||||
/********************************************************** |
|
||||||
* function: load_runtime_reg |
|
||||||
* |
|
||||||
* input: r3 - value of eumbbar |
|
||||||
* r4 - register offset in embedded utility space |
|
||||||
* |
|
||||||
* output: r3 - register content |
|
||||||
**********************************************************/ |
|
||||||
.text |
|
||||||
.align 2
|
|
||||||
.global load_runtime_reg
|
|
||||||
load_runtime_reg: |
|
||||||
|
|
||||||
/* xor r5,r5,r5 |
|
||||||
* or r5,r5,r3 |
|
||||||
* |
|
||||||
* lwbrx r3,r4,r5 |
|
||||||
*/ |
|
||||||
lwbrx r3,r4,r3 |
|
||||||
sync |
|
||||||
|
|
||||||
bclr 20, 0 |
|
||||||
|
|
||||||
/**************************************************************** |
|
||||||
* function: store_runtime_reg |
|
||||||
* |
|
||||||
* input: r3 - value of eumbbar |
|
||||||
* r4 - register offset in embedded utility space |
|
||||||
* r5 - new value to be stored |
|
||||||
* |
|
||||||
****************************************************************/ |
|
||||||
.text |
|
||||||
.align 2
|
|
||||||
.global store_runtime_reg
|
|
||||||
store_runtime_reg: |
|
||||||
|
|
||||||
stwbrx r5, r4, r3 |
|
||||||
sync |
|
||||||
|
|
||||||
bclr 20,0 |
|
||||||
|
|
||||||
#endif /* CONFIG_HARD_I2C */ |
|
@ -1,103 +0,0 @@ |
|||||||
#ifndef I2C_EXPORT_H |
|
||||||
#define I2C_EXPORT_H |
|
||||||
|
|
||||||
/****************************************************
|
|
||||||
* |
|
||||||
* Copyright Motrola 1999 |
|
||||||
* |
|
||||||
****************************************************/ |
|
||||||
|
|
||||||
/* These are the defined return values for the I2C_do_transaction function.
|
|
||||||
* Any non-zero value indicates failure. Failure modes can be added for |
|
||||||
* more detailed error reporting. |
|
||||||
*/ |
|
||||||
typedef enum _i2c_status |
|
||||||
{ |
|
||||||
I2C_SUCCESS = 0, |
|
||||||
I2C_ERROR, |
|
||||||
} I2C_Status; |
|
||||||
|
|
||||||
/* These are the defined tasks for I2C_do_transaction.
|
|
||||||
* Modes for SLAVE_RCV and SLAVE_XMIT will be added. |
|
||||||
*/ |
|
||||||
typedef enum _i2c_transaction_mode |
|
||||||
{ |
|
||||||
I2C_MASTER_RCV = 0, |
|
||||||
I2C_MASTER_XMIT = 1, |
|
||||||
} I2C_TRANSACTION_MODE; |
|
||||||
|
|
||||||
typedef enum _i2c_interrupt_mode |
|
||||||
{ |
|
||||||
I2C_INT_DISABLE = 0, |
|
||||||
I2C_INT_ENABLE = 1, |
|
||||||
} I2C_INTERRUPT_MODE; |
|
||||||
|
|
||||||
typedef enum _i2c_stop |
|
||||||
{ |
|
||||||
I2C_NO_STOP = 0, |
|
||||||
I2C_STOP = 1, |
|
||||||
} I2C_STOP_MODE; |
|
||||||
|
|
||||||
typedef enum _i2c_restart |
|
||||||
{ |
|
||||||
I2C_NO_RESTART = 0, |
|
||||||
I2C_RESTART = 1, |
|
||||||
} I2C_RESTART_MODE; |
|
||||||
|
|
||||||
/******************** App. API ********************
|
|
||||||
* The application API is for user level application |
|
||||||
* to use the functionality provided by I2C driver. |
|
||||||
* This is a "generic" I2C interface, it should contain |
|
||||||
* nothing specific to the Kahlua implementation. |
|
||||||
* Only the generic functions are exported by the library. |
|
||||||
* |
|
||||||
* Note: Its App.s responsibility to swap the data |
|
||||||
* byte. In our API, we just transfer whatever |
|
||||||
* we are given |
|
||||||
**************************************************/ |
|
||||||
|
|
||||||
|
|
||||||
/* Initialize I2C unit with the following:
|
|
||||||
* driver's slave address |
|
||||||
* interrupt enabled |
|
||||||
* optional pointer to application layer print function |
|
||||||
* |
|
||||||
* These parameters may be added: |
|
||||||
* desired clock rate |
|
||||||
* digital filter frequency sampling rate |
|
||||||
* |
|
||||||
* This function must be called before I2C unit can be used. |
|
||||||
*/ |
|
||||||
extern I2C_Status I2C_Initialize( |
|
||||||
unsigned char addr, /* driver's I2C slave address */ |
|
||||||
I2C_INTERRUPT_MODE en_int, /* 1 - enable I2C interrupt
|
|
||||||
* 0 - disable I2C interrupt |
|
||||||
*/ |
|
||||||
int (*app_print_function)(char *,...)); /* pointer to optional "printf"
|
|
||||||
* provided by application |
|
||||||
*/ |
|
||||||
|
|
||||||
/* Perform the given I2C transaction, only MASTER_XMIT and MASTER_RCV
|
|
||||||
* are implemented. Both are only in polling mode. |
|
||||||
* |
|
||||||
* en_int controls interrupt/polling mode |
|
||||||
* act is the type of transaction |
|
||||||
* addr is the I2C address of the slave device |
|
||||||
* len is the length of data to send or receive |
|
||||||
* buffer is the address of the data buffer |
|
||||||
* stop = I2C_NO_STOP, don't signal STOP at end of transaction |
|
||||||
* I2C_STOP, signal STOP at end of transaction |
|
||||||
* retry is the timeout retry value, currently ignored |
|
||||||
* rsta = I2C_NO_RESTART, this is not continuation of existing transaction |
|
||||||
* I2C_RESTART, this is a continuation of existing transaction |
|
||||||
*/ |
|
||||||
extern I2C_Status I2C_do_transaction( I2C_INTERRUPT_MODE en_int, |
|
||||||
I2C_TRANSACTION_MODE act, |
|
||||||
unsigned char i2c_addr, |
|
||||||
unsigned char data_addr, |
|
||||||
int len, |
|
||||||
char *buffer, |
|
||||||
I2C_STOP_MODE stop, |
|
||||||
int retry, |
|
||||||
I2C_RESTART_MODE rsta); |
|
||||||
#endif |
|
Loading…
Reference in new issue