MX27: Update to autogenerated asm-offsets.h

On i.MX27, the asm-offsets.h file is not yet generated as it should be.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Matthias Weisser <weisserm@arcor.de>
master
Stefano Babic 14 years ago committed by Albert ARIBAUD
parent 0edf8b5b2f
commit 727024a9a4
  1. 2
      arch/arm/cpu/arm926ejs/mx27/Makefile
  2. 45
      arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
  3. 16
      arch/arm/include/asm/arch-mx27/asm-offsets.h

@ -34,6 +34,8 @@ all: $(obj).depend $(LIB)
$(LIB): $(OBJS)
$(call cmd_link_o_target, $(OBJS))
$(OBJS) : $(TOPDIR)/include/asm/arch/asm-offsets.h
#########################################################################
# defines $(obj).depend target

@ -0,0 +1,45 @@
/*
* Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c
*
* This program is used to generate definitions needed by
* assembly language modules.
*
* We use the technique used in the OSF Mach kernel code:
* generate asm statements containing #defines,
* compile this file to assembler, and then extract the
* #defines from the assembly-language output.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <common.h>
#include <asm/arch/imx-regs.h>
#include <linux/kbuild.h>
int main(void)
{
DEFINE(AIPI1_PSR0, IMX_AIPI1_BASE + offsetof(struct aipi_regs, psr0));
DEFINE(AIPI1_PSR1, IMX_AIPI1_BASE + offsetof(struct aipi_regs, psr1));
DEFINE(AIPI2_PSR0, IMX_AIPI2_BASE + offsetof(struct aipi_regs, psr0));
DEFINE(AIPI2_PSR1, IMX_AIPI2_BASE + offsetof(struct aipi_regs, psr1));
DEFINE(CSCR, IMX_PLL_BASE + offsetof(struct pll_regs, cscr));
DEFINE(MPCTL0, IMX_PLL_BASE + offsetof(struct pll_regs, mpctl0));
DEFINE(SPCTL0, IMX_PLL_BASE + offsetof(struct pll_regs, spctl0));
DEFINE(PCDR0, IMX_PLL_BASE + offsetof(struct pll_regs, pcdr0));
DEFINE(PCDR1, IMX_PLL_BASE + offsetof(struct pll_regs, pcdr1));
DEFINE(PCCR0, IMX_PLL_BASE + offsetof(struct pll_regs, pccr0));
DEFINE(PCCR1, IMX_PLL_BASE + offsetof(struct pll_regs, pccr1));
DEFINE(ESDCTL0_ROF, offsetof(struct esdramc_regs, esdctl0));
DEFINE(ESDCFG0_ROF, offsetof(struct esdramc_regs, esdcfg0));
DEFINE(ESDCTL1_ROF, offsetof(struct esdramc_regs, esdctl1));
DEFINE(ESDCFG1_ROF, offsetof(struct esdramc_regs, esdcfg1));
DEFINE(ESDMISC_ROF, offsetof(struct esdramc_regs, esdmisc));
return 0;
}

@ -1,16 +0,0 @@
#define AIPI1_PSR0 0x10000000
#define AIPI1_PSR1 0x10000004
#define AIPI2_PSR0 0x10020000
#define AIPI2_PSR1 0x10020004
#define CSCR 0x10027000
#define MPCTL0 0x10027004
#define SPCTL0 0x1002700c
#define PCDR0 0x10027018
#define PCDR1 0x1002701c
#define PCCR0 0x10027020
#define PCCR1 0x10027024
#define ESDCTL0_ROF 0x00
#define ESDCFG0_ROF 0x04
#define ESDCTL1_ROF 0x08
#define ESDCFG1_ROF 0x0C
#define ESDMISC_ROF 0x10
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