Introduce pinctrl for i.MX6 1. pinctrl-imx.c is for common usage. It's used by i.MX6/7. 2. Add PINCTRL_IMX PINCTRL_IMX6 Kconfig entry. 3. To the pinctrl_ops implementation, only set_state is implemented. To i.MX6/7, the pinctrl dts entry is as following: &iomuxc { pinctrl-names = "default"; pinctrl_csi1: csi1grp { fsl,pins = < MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1b088 MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088 MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088 >; }; [.....] }; there is no property named function or groups. So pinctrl_generic_set_state can not be used here. 5. This driver is a simple implementation for i.mx iomux controller, only parse the fsl,pins property and write value to registers. 6. With DEBUG enabled, we can see log when "i2c bus 0": " set_state_simple op missing imx_pinctrl_set_state: i2c1grp mux_reg 0x14c, conf_reg 0x3bc, input_reg 0x5d8, mux_mode 0x0, input_val 0x1, config_val 0x4000007f write mux: offset 0x14c val 0x10 select_input: offset 0x5d8 val 0x1 write config: offset 0x3bc val 0x7f mux_reg 0x148, conf_reg 0x3b8, input_reg 0x5d4, mux_mode 0x0, input_val 0x1, config_val 0x4000007f write mux: offset 0x148 val 0x10 select_input: offset 0x5d4 val 0x1 write config: offset 0x3b8 val 0x7f " this means imx6 pinctrl driver works as expected. Signed-off-by: Peng Fan <van.freenix@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>master
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f91e65a74e
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config PINCTRL_IMX |
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bool |
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config PINCTRL_IMX6 |
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bool "IMX6 pinctrl driver" |
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depends on ARCH_MX6 && PINCTRL_FULL |
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select DEVRES |
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select PINCTRL_IMX |
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help |
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Say Y here to enable the imx6 pinctrl driver |
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|
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This provides a simple pinctrl driver for i.MX6 SoC familiy, |
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i.MX6DQ/SL/SX/UL/DQP. This feature depends on device tree |
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configuration. This driver is different from the linux one, |
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this is a simple implementation, only parses the 'fsl,pins' |
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property and configure related registers. |
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obj-$(CONFIG_PINCTRL_IMX) += pinctrl-imx.o
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obj-$(CONFIG_PINCTRL_IMX6) += pinctrl-imx6.o
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/*
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* Copyright (C) 2016 Peng Fan <van.freenix@gmail.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <mapmem.h> |
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#include <linux/io.h> |
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#include <linux/err.h> |
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#include <dm/device.h> |
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#include <dm/pinctrl.h> |
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#include "pinctrl-imx.h" |
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DECLARE_GLOBAL_DATA_PTR; |
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static int imx_pinctrl_set_state(struct udevice *dev, struct udevice *config) |
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{ |
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struct imx_pinctrl_priv *priv = dev_get_priv(dev); |
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struct imx_pinctrl_soc_info *info = priv->info; |
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int node = config->of_offset; |
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const struct fdt_property *prop; |
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u32 *pin_data; |
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int npins, size, pin_size; |
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int mux_reg, conf_reg, input_reg, input_val, mux_mode, config_val; |
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int i, j = 0; |
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dev_dbg(dev, "%s: %s\n", __func__, config->name); |
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if (info->flags & SHARE_MUX_CONF_REG) |
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pin_size = SHARE_FSL_PIN_SIZE; |
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else |
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pin_size = FSL_PIN_SIZE; |
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prop = fdt_getprop(gd->fdt_blob, node, "fsl,pins", &size); |
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if (!prop) { |
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dev_err(dev, "No fsl,pins property in node %s\n", config->name); |
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return -EINVAL; |
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} |
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if (!size || size % pin_size) { |
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dev_err(dev, "Invalid fsl,pins property in node %s\n", |
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config->name); |
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return -EINVAL; |
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} |
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pin_data = devm_kzalloc(dev, size, 0); |
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if (!pin_data) |
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return -ENOMEM; |
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if (fdtdec_get_int_array(gd->fdt_blob, node, "fsl,pins", |
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pin_data, size >> 2)) { |
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dev_err(dev, "Error reading pin data.\n"); |
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return -EINVAL; |
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} |
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npins = size / pin_size; |
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/*
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* Refer to linux documentation for details: |
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* Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt |
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*/ |
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for (i = 0; i < npins; i++) { |
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mux_reg = pin_data[j++]; |
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if (!(info->flags & ZERO_OFFSET_VALID) && !mux_reg) |
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mux_reg = -1; |
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if (info->flags & SHARE_MUX_CONF_REG) { |
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conf_reg = mux_reg; |
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} else { |
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conf_reg = pin_data[j++]; |
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if (!(info->flags & ZERO_OFFSET_VALID) && !conf_reg) |
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conf_reg = -1; |
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} |
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if ((mux_reg == -1) || (conf_reg == -1)) { |
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dev_err(dev, "Error mux_reg or conf_reg\n"); |
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return -EINVAL; |
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} |
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input_reg = pin_data[j++]; |
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mux_mode = pin_data[j++]; |
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input_val = pin_data[j++]; |
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config_val = pin_data[j++]; |
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dev_dbg(dev, "mux_reg 0x%x, conf_reg 0x%x, input_reg 0x%x, " |
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"mux_mode 0x%x, input_val 0x%x, config_val 0x%x\n", |
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mux_reg, conf_reg, input_reg, mux_mode, input_val, |
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config_val); |
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if (config_val & IMX_PAD_SION) |
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mux_mode |= IOMUXC_CONFIG_SION; |
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config_val &= ~IMX_PAD_SION; |
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/* Set Mux */ |
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if (info->flags & SHARE_MUX_CONF_REG) { |
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clrsetbits_le32(info->base + mux_reg, 0x7 << 20, |
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mux_mode << 20); |
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} else { |
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writel(mux_mode, info->base + mux_reg); |
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} |
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dev_dbg(dev, "write mux: offset 0x%x val 0x%x\n", mux_reg, |
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mux_mode); |
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/*
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* Set select input |
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* |
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* If the select input value begins with 0xff, it's a quirky |
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* select input and the value should be interpreted as below. |
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* 31 23 15 7 0 |
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* | 0xff | shift | width | select | |
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* It's used to work around the problem that the select |
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* input for some pin is not implemented in the select |
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* input register but in some general purpose register. |
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* We encode the select input value, width and shift of |
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* the bit field into input_val cell of pin function ID |
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* in device tree, and then decode them here for setting |
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* up the select input bits in general purpose register. |
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*/ |
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if (input_val >> 24 == 0xff) { |
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u32 val = input_val; |
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u8 select = val & 0xff; |
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u8 width = (val >> 8) & 0xff; |
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u8 shift = (val >> 16) & 0xff; |
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u32 mask = ((1 << width) - 1) << shift; |
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/*
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* The input_reg[i] here is actually some IOMUXC general |
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* purpose register, not regular select input register. |
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*/ |
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val = readl(info->base + input_reg); |
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val &= ~mask; |
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val |= select << shift; |
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writel(val, info->base + input_reg); |
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} else if (input_reg) { |
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/*
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* Regular select input register can never be at offset |
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* 0, and we only print register value for regular case. |
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*/ |
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if (info->input_sel_base) |
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writel(input_val, info->input_sel_base + |
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input_reg); |
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else |
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writel(input_val, info->base + input_reg); |
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dev_dbg(dev, "select_input: offset 0x%x val 0x%x\n", |
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input_reg, input_val); |
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} |
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/* Set config */ |
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if (!(config_val & IMX_NO_PAD_CTL)) { |
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if (info->flags & SHARE_MUX_CONF_REG) { |
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clrsetbits_le32(info->base + conf_reg, 0xffff, |
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config_val); |
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} else { |
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writel(config_val, info->base + conf_reg); |
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} |
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dev_dbg(dev, "write config: offset 0x%x val 0x%x\n", |
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conf_reg, config_val); |
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} |
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} |
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return 0; |
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} |
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const struct pinctrl_ops imx_pinctrl_ops = { |
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.set_state = imx_pinctrl_set_state, |
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}; |
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int imx_pinctrl_probe(struct udevice *dev, |
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struct imx_pinctrl_soc_info *info) |
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{ |
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struct imx_pinctrl_priv *priv = dev_get_priv(dev); |
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int node = dev->of_offset, ret; |
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struct fdtdec_phandle_args arg; |
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fdt_addr_t addr; |
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fdt_size_t size; |
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if (!info) { |
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dev_err(dev, "wrong pinctrl info\n"); |
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return -EINVAL; |
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} |
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priv->dev = dev; |
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priv->info = info; |
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addr = fdtdec_get_addr_size(gd->fdt_blob, dev->of_offset, "reg", &size); |
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if (addr == FDT_ADDR_T_NONE) |
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return -EINVAL; |
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info->base = map_sysmem(addr, size); |
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if (!info->base) |
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return -ENOMEM; |
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priv->info = info; |
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/*
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* Refer to linux documentation for details: |
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* Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt |
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*/ |
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if (fdtdec_get_bool(gd->fdt_blob, node, "fsl,input-sel")) { |
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ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, |
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node, "fsl,input-sel", |
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NULL, 0, 0, &arg); |
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if (ret) { |
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dev_err(dev, "iomuxc fsl,input-sel property not found\n"); |
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return -EINVAL; |
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} |
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addr = fdtdec_get_addr_size(gd->fdt_blob, arg.node, "reg", |
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&size); |
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if (addr == FDT_ADDR_T_NONE) |
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return -EINVAL; |
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info->input_sel_base = map_sysmem(addr, size); |
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if (!info->input_sel_base) |
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return -ENOMEM; |
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} |
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dev_info(dev, "initialized IMX pinctrl driver\n"); |
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return 0; |
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} |
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int imx_pinctrl_remove(struct udevice *dev) |
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{ |
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struct imx_pinctrl_priv *priv = dev_get_priv(dev); |
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struct imx_pinctrl_soc_info *info = priv->info; |
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if (info->input_sel_base) |
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unmap_sysmem(info->input_sel_base); |
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if (info->base) |
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unmap_sysmem(info->base); |
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return 0; |
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} |
@ -0,0 +1,50 @@ |
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/*
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* Copyright (C) 2016 Peng Fan <van.freenix@gmail.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#ifndef __DRIVERS_PINCTRL_IMX_H |
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#define __DRIVERS_PINCTRL_IMX_H |
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/**
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* @base: the address to the controller in virtual memory |
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* @input_sel_base: the address of the select input in virtual memory. |
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* @flags: flags specific for each soc |
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*/ |
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struct imx_pinctrl_soc_info { |
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void __iomem *base; |
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void __iomem *input_sel_base; |
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unsigned int flags; |
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}; |
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/**
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* @dev: a pointer back to containing device |
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* @info: the soc info |
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*/ |
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struct imx_pinctrl_priv { |
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struct udevice *dev; |
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struct imx_pinctrl_soc_info *info; |
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}; |
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extern const struct pinctrl_ops imx_pinctrl_ops; |
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#define IMX_NO_PAD_CTL 0x80000000 /* no pin config need */ |
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#define IMX_PAD_SION 0x40000000 /* set SION */ |
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/*
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* Each pin represented in fsl,pins consists of 5 u32 PIN_FUNC_ID and |
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* 1 u32 CONFIG, so 24 types in total for each pin. |
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*/ |
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#define FSL_PIN_SIZE 24 |
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#define SHARE_FSL_PIN_SIZE 20 |
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#define SHARE_MUX_CONF_REG 0x1 |
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#define ZERO_OFFSET_VALID 0x2 |
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#define IOMUXC_CONFIG_SION (0x1 << 4) |
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int imx_pinctrl_probe(struct udevice *dev, struct imx_pinctrl_soc_info *info); |
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int imx_pinctrl_remove(struct udevice *dev); |
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#endif /* __DRIVERS_PINCTRL_IMX_H */ |
@ -0,0 +1,41 @@ |
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/*
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* Copyright (C) 2016 Peng Fan <van.freenix@gmail.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <dm/device.h> |
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#include <dm/pinctrl.h> |
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#include "pinctrl-imx.h" |
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static struct imx_pinctrl_soc_info imx6_pinctrl_soc_info; |
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static int imx6_pinctrl_probe(struct udevice *dev) |
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{ |
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struct imx_pinctrl_soc_info *info = |
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(struct imx_pinctrl_soc_info *)dev_get_driver_data(dev); |
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return imx_pinctrl_probe(dev, info); |
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} |
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static const struct udevice_id imx6_pinctrl_match[] = { |
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{ .compatible = "fsl,imx6q-iomuxc", .data = (ulong)&imx6_pinctrl_soc_info }, |
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{ .compatible = "fsl,imx6dl-iomuxc", .data = (ulong)&imx6_pinctrl_soc_info }, |
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{ .compatible = "fsl,imx6sl-iomuxc", .data = (ulong)&imx6_pinctrl_soc_info }, |
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{ .compatible = "fsl,imx6sx-iomuxc", .data = (ulong)&imx6_pinctrl_soc_info }, |
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{ .compatible = "fsl,imx6ul-iomuxc", .data = (ulong)&imx6_pinctrl_soc_info }, |
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{ /* sentinel */ } |
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}; |
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U_BOOT_DRIVER(imx6_pinctrl) = { |
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.name = "imx6-pinctrl", |
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.id = UCLASS_PINCTRL, |
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.of_match = of_match_ptr(imx6_pinctrl_match), |
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.probe = imx6_pinctrl_probe, |
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.remove = imx_pinctrl_remove, |
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.priv_auto_alloc_size = sizeof(struct imx_pinctrl_priv), |
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.ops = &imx_pinctrl_ops, |
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.flags = DM_FLAG_PRE_RELOC, |
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}; |
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Reference in new issue