@ -38,6 +38,13 @@
# include < a s m - o f f s e t s . h >
# include < c o n f i g . h >
# include < v e r s i o n . h >
# ifdef C O N F I G _ P X A 2 5 X
# if ( ( C O N F I G _ S Y S _ I N I T _ S P _ A D D R ) ! = 0 x f f f f f80 0 )
# error " I n i t S P a d d r e s s m u s t b e s e t t o 0 x f f f f f80 0 f o r P X A 2 5 0 "
# endif
# endif
.globl _start
_start : b r e s e t
# ifdef C O N F I G _ S P L _ B U I L D
@ -153,6 +160,10 @@ reset:
bl c p u _ i n i t _ c r i t
# endif
# ifdef C O N F I G _ P X A 2 5 0
bl l o c k _ c a c h e _ f o r _ s t a c k
# endif
/* Set stackpointer in internal RAM to call board_init_f */
call_board_init_f :
ldr s p , = ( C O N F I G _ S Y S _ I N I T _ S P _ A D D R )
@ -179,6 +190,11 @@ relocate_code:
stack_setup :
mov s p , r4
/* Disable the Dcache RAM lock for stack now */
# ifdef C O N F I G _ P X A 2 5 0
bl c p u _ i n i t _ c r i t
# endif
adr r0 , _ s t a r t
cmp r0 , r6
beq c l e a r _ b s s / * s k i p r e l o c a t i o n * /
@ -291,7 +307,7 @@ _dynsym_start_ofs:
*
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
* /
# ifn de f C O N F I G _ S K I P _ L O W L E V E L _ I N I T
# if ! d e f i n e d ( C O N F I G _ S K I P _ L O W L E V E L _ I N I T ) | | d e f i n e d ( C O N F I G _ P X A 2 5 0 )
cpu_init_crit :
/ *
* flush v4 I / D c a c h e s
@ -311,7 +327,7 @@ cpu_init_crit:
mcr p15 , 0 , r0 , c1 , c0 , 0
mov p c , l r / * b a c k t o m y c a l l e r * /
# endif / * C O N F I G _ S K I P _ L O W L E V E L _ I N I T * /
# endif / * ! C O N F I G _ S K I P _ L O W L E V E L _ I N I T | | C O N F I G _ P X A 2 5 0 * /
# ifndef C O N F I G _ S P L _ B U I L D
/ *
@ -495,3 +511,95 @@ fiq:
# endif
.align 5
# endif / * C O N F I G _ S P L _ B U I L D * /
/ *
* Enable M M U t o u s e D C a c h e a s D R A M .
*
* This i s u s e f u l o n P X A 2 5 x a n d P X A 2 6 x i n e a r l y b o o t s t a g e s , w h e r e t h e r e i s n o
* other p o s s i b l e m e m o r y a v a i l a b l e t o h o l d s t a c k .
* /
# ifdef C O N F I G _ P X A 2 5 0
.macro CPWAIT reg
mrc p15 , 0 , \ r e g , c2 , c0 , 0
mov \ r e g , \ r e g
sub p c , p c , #4
.endm
lock_cache_for_stack :
/* Domain access -- enable for all CPs */
ldr r0 , =0x0000ffff
mcr p15 , 0 , r0 , c3 , c0 , 0
/* Point TTBR to MMU table */
ldr r0 , =mmutable
mcr p15 , 0 , r0 , c2 , c0 , 0
/* Kick in MMU, ICache, DCache, BTB */
mrc p15 , 0 , r0 , c1 , c0 , 0
bic r0 , #0x1b00
bic r0 , #0x0087
orr r0 , #0x1800
orr r0 , #0x0005
mcr p15 , 0 , r0 , c1 , c0 , 0
CPWAIT r0
/* Unlock Icache, Dcache */
mcr p15 , 0 , r0 , c9 , c1 , 1
mcr p15 , 0 , r0 , c9 , c2 , 1
/* Flush Icache, Dcache, BTB */
mcr p15 , 0 , r0 , c7 , c7 , 0
/* Unlock I-TLB, D-TLB */
mcr p15 , 0 , r0 , c10 , c4 , 1
mcr p15 , 0 , r0 , c10 , c8 , 1
/* Flush TLB */
mcr p15 , 0 , r0 , c8 , c7 , 0
/* Allocate 4096 bytes of Dcache as RAM */
/* Drain pending loads and stores */
mcr p15 , 0 , r0 , c7 , c10 , 4
mov r4 , #0x00
mov r5 , #0x00
mov r2 , #0x01
mcr p15 , 0 , r0 , c9 , c2 , 0
CPWAIT r0
/* 128 lines reserved (128 x 32bytes = 4096 bytes total) */
mov r0 , #128
ldr r1 , =0xfffff000
alloc :
mcr p15 , 0 , r1 , c7 , c2 , 5
/* Drain pending loads and stores */
mcr p15 , 0 , r0 , c7 , c10 , 4
strd r4 , [ r1 ] , #8
strd r4 , [ r1 ] , #8
strd r4 , [ r1 ] , #8
strd r4 , [ r1 ] , #8
subs r0 , #0x01
bne a l l o c
/* Drain pending loads and stores */
mcr p15 , 0 , r0 , c7 , c10 , 4
mov r2 , #0x00
mcr p15 , 0 , r2 , c9 , c2 , 0
CPWAIT r0
mov p c , l r
.section .mmutable , " a"
mmutable :
.align 14
/* 0x00000000 - 0xffe00000 : 1:1, uncached mapping */
.set _ _ base, 0
.rept 0xfff
.word ( _ _ base < < 2 0 ) | 0 x c12
.set _ _ base, _ _ b a s e + 1
.endr
/* 0xfff00000 : 1:1, cached mapping */
.word ( 0 xfff < < 2 0 ) | 0 x1 c1 e
# endif / * C O N F I G _ P X A 2 5 0 * /