mpc83xx: cosmetic: mpc8308_p1m.h checkpatch compliance

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

include/configs/mpc8308_p1m.h

@@ -246,10 +246,9 @@
 #define CONFIG_SYS_LBLAWBAR0_PRELIM	CONFIG_SYS_FLASH_BASE
 #define CONFIG_SYS_LBLAWAR0_PRELIM	(LBLAWAR_EN | LBLAWAR_64MB)
 
-#define CONFIG_SYS_BR0_PRELIM	(\
-		CONFIG_SYS_FLASH_BASE	/* Flash Base address */	|\
-		(2 << BR_PS_SHIFT)	/* 16 bit port size */		|\
-		BR_V)			/* valid */
+#define CONFIG_SYS_BR0_PRELIM	(CONFIG_SYS_FLASH_BASE	/* Flash Base addr */ \
+				| (2 << BR_PS_SHIFT)	/* 16 bit port */ \
+				| BR_V)			/* valid */
 #define CONFIG_SYS_OR0_PRELIM	((~(CONFIG_SYS_FLASH_SIZE - 1) << 20) \
 				| OR_UPM_XAM \
 				| OR_GPCM_CSNT \
@@ -273,7 +272,7 @@
  */
 #define CONFIG_SYS_SJA1000_BASE	0xFBFF0000
 #define CONFIG_SYS_BR1_PRELIM	(CONFIG_SYS_SJA1000_BASE \
-				| (1 << BR_PS_SHIFT)	/* 8 bit port size */ \
+				| (1 << BR_PS_SHIFT)	/* 8 bit port */ \
 				| BR_V)			/* valid */
 #define CONFIG_SYS_OR1_PRELIM	(0xFFFF8000		/* length 32K */ \
 				| OR_GPCM_SCY_5 \
@@ -288,7 +287,7 @@
  */
 #define CONFIG_SYS_CPLD_BASE	0xFBFF8000
 #define CONFIG_SYS_BR2_PRELIM	(CONFIG_SYS_CPLD_BASE \
-				| (1 << BR_PS_SHIFT)	/* 8 bit port size */ \
+				| (1 << BR_PS_SHIFT)	/* 8 bit port */ \
 				| BR_V)			/* valid */
 #define CONFIG_SYS_OR2_PRELIM	(0xFFFF8000		/* length 32K */ \
 				| OR_GPCM_SCY_4 \