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powerpc: T2080QDS: Remove macro T2080QDS

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Use TARGET_T2080QDS from Kconfig instead.

Signed-off-by: York Sun <york.sun@nxp.com>
master
York Sun 8 years ago committed by Tom Rini
parent f4f6694060
commit 80d261881f
6 changed files with 13 additions and 15 deletions
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  1. 2
      arch/powerpc/include/asm/fsl_secure_boot.h
  2. 2
      board/freescale/t208xqds/Makefile
  3. 16
      board/freescale/t208xqds/eth_t208xqds.c
  4. 6
      board/freescale/t208xqds/t208xqds.c
  5. 1
      include/configs/T208xQDS.h
  6. 1
      scripts/config_whitelist.txt

2
arch/powerpc/include/asm/fsl_secure_boot.h
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@ -29,7 +29,7 @@
defined(CONFIG_TARGET_B4420QDS) || \ defined(CONFIG_TARGET_B4420QDS) || \
defined(CONFIG_TARGET_T4160QDS) || \ defined(CONFIG_TARGET_T4160QDS) || \
defined(CONFIG_TARGET_T4240QDS) || \ defined(CONFIG_TARGET_T4240QDS) || \
defined(CONFIG_T2080QDS) || \ defined(CONFIG_TARGET_T2080QDS) || \
defined(CONFIG_T2080RDB) || \ defined(CONFIG_T2080RDB) || \
defined(CONFIG_TARGET_T1040QDS) || \ defined(CONFIG_TARGET_T1040QDS) || \
defined(CONFIG_T104xD4QDS) || \ defined(CONFIG_T104xD4QDS) || \

2
board/freescale/t208xqds/Makefile
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@ -7,7 +7,7 @@
ifdef CONFIG_SPL_BUILD ifdef CONFIG_SPL_BUILD
obj-y += spl.o obj-y += spl.o
else else
obj-$(CONFIG_T2080QDS) += t208xqds.o eth_t208xqds.o obj-$(CONFIG_TARGET_T2080QDS) += t208xqds.o eth_t208xqds.o
obj-$(CONFIG_T2081QDS) += t208xqds.o eth_t208xqds.o obj-$(CONFIG_T2081QDS) += t208xqds.o eth_t208xqds.o
obj-$(CONFIG_PCI) += pci.o obj-$(CONFIG_PCI) += pci.o
endif endif

16
board/freescale/t208xqds/eth_t208xqds.c
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@ -32,7 +32,7 @@
#define EMI1_RGMII1 0 #define EMI1_RGMII1 0
#define EMI1_RGMII2 1 #define EMI1_RGMII2 1
#define EMI1_SLOT1 2 #define EMI1_SLOT1 2
#if defined(CONFIG_T2080QDS) #if defined(CONFIG_TARGET_T2080QDS)
#define EMI1_SLOT2 6 #define EMI1_SLOT2 6
#define EMI1_SLOT3 3 #define EMI1_SLOT3 3
#define EMI1_SLOT4 4 #define EMI1_SLOT4 4
@ -59,7 +59,7 @@
static int mdio_mux[NUM_FM_PORTS]; static int mdio_mux[NUM_FM_PORTS];
static const char * const mdio_names[] = { static const char * const mdio_names[] = {
#if defined(CONFIG_T2080QDS) #if defined(CONFIG_TARGET_T2080QDS)
"T2080QDS_MDIO_RGMII1", "T2080QDS_MDIO_RGMII1",
"T2080QDS_MDIO_RGMII2", "T2080QDS_MDIO_RGMII2",
"T2080QDS_MDIO_SLOT1", "T2080QDS_MDIO_SLOT1",
@ -82,7 +82,7 @@ static const char * const mdio_names[] = {
}; };
/* Map SerDes1 8 lanes to default slot, will be initialized dynamically */ /* Map SerDes1 8 lanes to default slot, will be initialized dynamically */
#if defined(CONFIG_T2080QDS) #if defined(CONFIG_TARGET_T2080QDS)
static u8 lane_to_slot[] = {3, 3, 3, 3, 1, 1, 1, 1}; static u8 lane_to_slot[] = {3, 3, 3, 3, 1, 1, 1, 1};
#elif defined(CONFIG_T2081QDS) #elif defined(CONFIG_T2081QDS)
static u8 lane_to_slot[] = {2, 2, 2, 2, 1, 1, 1, 1}; static u8 lane_to_slot[] = {2, 2, 2, 2, 1, 1, 1, 1};
@ -204,7 +204,7 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,
int off; int off;
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
#ifdef CONFIG_T2080QDS #ifdef CONFIG_TARGET_T2080QDS
serdes_corenet_t *srds_regs = serdes_corenet_t *srds_regs =
(void *)CONFIG_SYS_FSL_CORENET_SERDES_ADDR; (void *)CONFIG_SYS_FSL_CORENET_SERDES_ADDR;
u32 srds1_pccr1 = in_be32(&srds_regs->srdspccr1); u32 srds1_pccr1 = in_be32(&srds_regs->srdspccr1);
@ -217,7 +217,7 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,
if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII) { if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII) {
phy = fm_info_get_phy_address(port); phy = fm_info_get_phy_address(port);
switch (port) { switch (port) {
#if defined(CONFIG_T2080QDS) #if defined(CONFIG_TARGET_T2080QDS)
case FM1_DTSEC1: case FM1_DTSEC1:
if (hwconfig_sub("fsl_1gkx", "fm1_1g1")) { if (hwconfig_sub("fsl_1gkx", "fm1_1g1")) {
media_type = 1; media_type = 1;
@ -454,7 +454,7 @@ static void initialize_lane_to_slot(void)
srds_s1 >>= FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT; srds_s1 >>= FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT;
switch (srds_s1) { switch (srds_s1) {
#if defined(CONFIG_T2080QDS) #if defined(CONFIG_TARGET_T2080QDS)
case 0x51: case 0x51:
case 0x5f: case 0x5f:
case 0x65: case 0x65:
@ -552,7 +552,7 @@ int board_eth_init(bd_t *bis)
t208xqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT1); t208xqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT1);
t208xqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT2); t208xqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT2);
t208xqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT3); t208xqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT3);
#if defined(CONFIG_T2080QDS) #if defined(CONFIG_TARGET_T2080QDS)
t208xqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT4); t208xqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT4);
#endif #endif
t208xqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT5); t208xqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT5);
@ -663,7 +663,7 @@ int board_eth_init(bd_t *bis)
fm_info_set_phy_address(FM1_DTSEC1, SGMII_CARD_PORT3_PHY_ADDR); fm_info_set_phy_address(FM1_DTSEC1, SGMII_CARD_PORT3_PHY_ADDR);
fm_info_set_phy_address(FM1_DTSEC2, SGMII_CARD_PORT4_PHY_ADDR); fm_info_set_phy_address(FM1_DTSEC2, SGMII_CARD_PORT4_PHY_ADDR);
break; break;
#if defined(CONFIG_T2080QDS) #if defined(CONFIG_TARGET_T2080QDS)
case 0xd9: case 0xd9:
case 0xd3: case 0xd3:
case 0xcb: case 0xcb:

6
board/freescale/t208xqds/t208xqds.c
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@ -99,7 +99,7 @@ int brd_mux_lane_to_slot(void)
srds_prtcl_s1 = in_be32(&gur->rcwsr[4]) & srds_prtcl_s1 = in_be32(&gur->rcwsr[4]) &
FSL_CORENET2_RCWSR4_SRDS1_PRTCL; FSL_CORENET2_RCWSR4_SRDS1_PRTCL;
srds_prtcl_s1 >>= FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT; srds_prtcl_s1 >>= FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT;
#if defined(CONFIG_T2080QDS) #if defined(CONFIG_TARGET_T2080QDS)
u32 srds_prtcl_s2 = in_be32(&gur->rcwsr[4]) & u32 srds_prtcl_s2 = in_be32(&gur->rcwsr[4]) &
FSL_CORENET2_RCWSR4_SRDS2_PRTCL; FSL_CORENET2_RCWSR4_SRDS2_PRTCL;
srds_prtcl_s2 >>= FSL_CORENET2_RCWSR4_SRDS2_PRTCL_SHIFT; srds_prtcl_s2 >>= FSL_CORENET2_RCWSR4_SRDS2_PRTCL_SHIFT;
@ -109,7 +109,7 @@ int brd_mux_lane_to_slot(void)
case 0: case 0:
/* SerDes1 is not enabled */ /* SerDes1 is not enabled */
break; break;
#if defined(CONFIG_T2080QDS) #if defined(CONFIG_TARGET_T2080QDS)
case 0x1b: case 0x1b:
case 0x1c: case 0x1c:
case 0xa2: case 0xa2:
@ -268,7 +268,7 @@ int brd_mux_lane_to_slot(void)
return -1; return -1;
} }
#ifdef CONFIG_T2080QDS #ifdef CONFIG_TARGET_T2080QDS
switch (srds_prtcl_s2) { switch (srds_prtcl_s2) {
case 0: case 0:
/* SerDes2 is not enabled */ /* SerDes2 is not enabled */

1
include/configs/T208xQDS.h
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@ -14,7 +14,6 @@
#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ #define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */
#define CONFIG_USB_EHCI #define CONFIG_USB_EHCI
#if defined(CONFIG_ARCH_T2080) #if defined(CONFIG_ARCH_T2080)
#define CONFIG_T2080QDS
#define CONFIG_FSL_SATA_V2 #define CONFIG_FSL_SATA_V2
#define CONFIG_SYS_SRIO /* Enable Serial RapidIO Support */ #define CONFIG_SYS_SRIO /* Enable Serial RapidIO Support */
#define CONFIG_SRIO1 /* SRIO port 1 */ #define CONFIG_SRIO1 /* SRIO port 1 */

1
scripts/config_whitelist.txt
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@ -7792,7 +7792,6 @@ CONFIG_SYS_XWAY_EBU_BOOTCFG
CONFIG_SYS_ZYNQ_QSPI_WAIT CONFIG_SYS_ZYNQ_QSPI_WAIT
CONFIG_SYS_ZYNQ_SPI_WAIT CONFIG_SYS_ZYNQ_SPI_WAIT
CONFIG_SYS_i2C_FSL CONFIG_SYS_i2C_FSL
CONFIG_T2080QDS
CONFIG_T2080RDB CONFIG_T2080RDB
CONFIG_T2081QDS CONFIG_T2081QDS
CONFIG_TAM3517_SETTINGS CONFIG_TAM3517_SETTINGS

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