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@ -27,48 +27,23 @@ |
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DECLARE_GLOBAL_DATA_PTR; |
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#define CPGWPCR 0xE6150904 |
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#define CPGWPR 0xE615090C |
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#define CLK2MHZ(clk) (clk / 1000 / 1000) |
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void s_init(void) |
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{ |
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struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE; |
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struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE; |
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/* Watchdog init */ |
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writel(0xA5A5A500, &rwdt->rwtcsra); |
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writel(0xA5A5A500, &swdt->swtcsra); |
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writel(0xA5A50000, CPGWPCR); |
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writel(0xFFFFFFFF, CPGWPR); |
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} |
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#define GSX_MSTP112 BIT(12) /* 3DG */ |
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#define TMU0_MSTP125 BIT(25) /* secure */ |
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#define TMU1_MSTP124 BIT(24) /* non-secure */ |
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#define SCIF2_MSTP310 BIT(10) /* SCIF2 */ |
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#define DVFS_MSTP926 BIT(26) |
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#define HSUSB_MSTP704 BIT(4) /* HSUSB */ |
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int board_early_init_f(void) |
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{ |
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/* TMU0,1 */ /* which use ? */ |
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mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125 | TMU1_MSTP124); |
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#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH) |
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/* DVFS for reset */ |
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mstp_clrbits_le32(MSTPSR9, SMSTPCR9, DVFS_MSTP926); |
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mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926); |
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#endif |
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return 0; |
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} |
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/* SYSC */ |
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/* R/- 32 Power status register 2(3DG) */ |
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#define SYSC_PWRSR2 0xE6180100 |
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/* -/W 32 Power resume control register 2 (3DG) */ |
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#define SYSC_PWRONCR2 0xE618010C |
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/* HSUSB block registers */ |
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#define HSUSB_REG_LPSTS 0xE6590102 |
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#define HSUSB_REG_LPSTS_SUSPM_NORMAL BIT(14) |
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@ -78,25 +53,14 @@ int board_early_init_f(void) |
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int board_init(void) |
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{ |
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u32 cpu_type = rmobile_get_cpu_type(); |
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/* adress of boot parameters */ |
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gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000; |
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if (cpu_type == RMOBILE_CPU_TYPE_R8A7795) { |
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/* GSX: force power and clock supply */ |
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writel(0x0000001F, SYSC_PWRONCR2); |
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while (readl(SYSC_PWRSR2) != 0x000003E0) |
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mdelay(20); |
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mstp_clrbits_le32(MSTPSR1, SMSTPCR1, GSX_MSTP112); |
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} |
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/* USB1 pull-up */ |
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setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN); |
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/* Configure the HSUSB block */ |
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mstp_clrbits_le32(MSTPSR7, SMSTPCR7, HSUSB_MSTP704); |
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mstp_clrbits_le32(SMSTPCR7, SMSTPCR7, HSUSB_MSTP704); |
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/* Choice USB0SEL */ |
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clrsetbits_le32(HSUSB_REG_UGCTRL2, HSUSB_REG_UGCTRL2_USB0SEL, |
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HSUSB_REG_UGCTRL2_USB0SEL_EHCI); |
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Tom Rini
6 years ago