EXYNOS5: USB: Fix incorrect USB base addresses

This patch corrects the base addresses for USB_PHY and USB_OTG.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Chander Kashyap <chander.kashyap@linaro.org>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
master
Rajeshwari Shinde 13 years ago committed by Marek Vasut
parent c48ac11322
commit 86d74d0339
  1. 4
      arch/arm/include/asm/arch-exynos/cpu.h

@ -71,10 +71,10 @@
#define EXYNOS5_GPIO_PART1_BASE 0x11400000 #define EXYNOS5_GPIO_PART1_BASE 0x11400000
#define EXYNOS5_MIPI_DSIM_BASE 0x11D00000 #define EXYNOS5_MIPI_DSIM_BASE 0x11D00000
#define EXYNOS5_USB_HOST_EHCI_BASE 0x12110000 #define EXYNOS5_USB_HOST_EHCI_BASE 0x12110000
#define EXYNOS5_USBPHY_BASE 0x12130000
#define EXYNOS5_USBOTG_BASE 0x12140000
#define EXYNOS5_MMC_BASE 0x12200000 #define EXYNOS5_MMC_BASE 0x12200000
#define EXYNOS5_SROMC_BASE 0x12250000 #define EXYNOS5_SROMC_BASE 0x12250000
#define EXYNOS5_USBOTG_BASE 0x12480000
#define EXYNOS5_USBPHY_BASE 0x12480000
#define EXYNOS5_UART_BASE 0x12C00000 #define EXYNOS5_UART_BASE 0x12C00000
#define EXYNOS5_PWMTIMER_BASE 0x12DD0000 #define EXYNOS5_PWMTIMER_BASE 0x12DD0000
#define EXYNOS5_GPIO_PART2_BASE 0x13400000 #define EXYNOS5_GPIO_PART2_BASE 0x13400000

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