Wolfgang Denk
16 years ago
commit
8f86a3636e
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Overview |
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-------- |
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MPC8572DS is a high-performance computing, evaluation and development platform |
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supporting the mpc8572 PowerTM processor. |
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Building U-boot |
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----------- |
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make MPC8572DS_config |
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make |
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Flash Banks |
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----------- |
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MPC8572DS board has two flash banks. They are both present on boot, but their |
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locations can be swapped using the dip-switch SW9[1:2]. |
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Booting is always from the boot bank at 0xec00_0000. |
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Memory Map |
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---------- |
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0xe800_0000 - 0xebff_ffff Alernate bank 64MB |
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0xec00_0000 - 0xefff_ffff Boot bank 64MB |
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0xebf8_0000 - 0xebff_ffff Alternate u-boot address 512KB |
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0xeff8_0000 - 0xefff_ffff Boot u-boot address 512KB |
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Flashing Images |
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--------------- |
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To place a new u-boot image in the alternate flash bank and then reset with that |
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new image temporarily, use this: |
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tftp 1000000 u-boot.bin |
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erase ebf80000 ebffffff |
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cp.b 1000000 ebf80000 80000 |
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pixis_reset altbank |
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To program the image in the boot flash bank: |
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tftp 1000000 u-boot.bin |
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protect off all |
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erase eff80000 ffffffff |
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cp.b 1000000 eff80000 80000 |
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The pixis_reset command |
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----------------------- |
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The command - "pixis_reset", is introduced to reset mpc8572ds board |
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using the FPGA sequencer. When the board restarts, it has the option |
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of using either the current or alternate flash bank as the boot |
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image, with or without the watchdog timer enabled, and finally with |
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or without frequency changes. |
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Usage is; |
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pixis_reset |
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pixis_reset altbank |
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pixis_reset altbank wd |
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pixis_reset altbank cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio> |
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pixis_reset cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio> |
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Examples: |
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/* reset to current bank, like "reset" command */ |
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pixis_reset |
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/* reset board but use the to alternate flash bank */ |
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pixis_reset altbank |
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Using the Device Tree Source File |
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--------------------------------- |
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To create the DTB (Device Tree Binary) image file, |
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use a command similar to this: |
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dtc -b 0 -f -I dts -O dtb mpc8572ds.dts > mpc8572ds.dtb |
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Likely, that .dts file will come from here; |
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linux-2.6/arch/powerpc/boot/dts/mpc8572ds.dts |
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Booting Linux |
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------------- |
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Place a linux uImage in the TFTP disk area. |
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tftp 1000000 uImage.8572 |
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tftp c00000 mpc8572ds.dtb |
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bootm 1000000 - c00000 |
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Implementing AMP(Asymmetric MultiProcessing) |
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------------- |
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1. Build kernel image for core0: |
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a. $ make 85xx/mpc8572_ds_defconfig |
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b. $ make menuconfig |
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- un-select "Processor support"->"Symetric multi-processing support" |
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c. $ make uImage |
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d. $ cp arch/powerpc/boot/uImage /tftpboot/uImage.core0 |
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2. Build kernel image for core1: |
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a. $ make 85xx/mpc8572_ds_defconfig |
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b. $ make menuconfig |
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- Un-select "Processor support"->"Symetric multi-processing support" |
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- Select "Advanced setup" -> " Prompt for advanced kernel |
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configuration options" |
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- Select "Set physical address where the kernel is loaded" and |
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set it to 0x20000000, asssuming core1 will start from 512MB. |
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- Select "Set custom page offset address" |
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- Select "Set custom kernel base address" |
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- Select "Set maximum low memory" |
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- "Exit" and save the selection. |
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c. $ make uImage |
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d. $ cp arch/powerpc/boot/uImage /tftpboot/uImage.core1 |
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3. Create dtb for core0: |
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$ dtc -I dts -O dtb -f -b 0 arch/powerpc/boot/dts/mpc8572ds_core0.dts > /tftpboot/mpc8572ds_core0.dtb |
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4. Create dtb for core1: |
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$ dtc -I dts -O dtb -f -b 1 arch/powerpc/boot/dts/mpc8572ds_core1.dts > /tftpboot/mpc8572ds_core1.dtb |
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5. Bring up two cores separately: |
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a. Power on the board, under u-boot prompt: |
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=> setenv <serverip> |
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=> setenv <ipaddr> |
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=> setenv bootargs root=/dev/ram rw console=ttyS0,115200 |
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b. Bring up core1's kernel first: |
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=> setenv bootm_low 0x20000000 |
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=> setenv bootm_size 0x10000000 |
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=> tftp 21000000 8572/uImage.core1 |
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=> tftp 22000000 8572/ramdiskfile |
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=> tftp 20c00000 8572/mpc8572ds_core1.dtb |
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=> interrupts off |
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=> bootm start 21000000 22000000 20c00000 |
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=> bootm loados |
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=> bootm ramdisk |
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=> bootm fdt |
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=> fdt boardsetup |
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=> fdt chosen $initrd_start $initrd_end |
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=> bootm prep |
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=> cpu 1 release $bootm_low - $fdtaddr - |
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c. Bring up core0's kernel(on the same u-boot console): |
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=> setenv bootm_low 0 |
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=> setenv bootm_size 0x20000000 |
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=> tftp 1000000 8572/uImage.core0 |
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=> tftp 2000000 8572/ramdiskfile |
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=> tftp c00000 8572/mpc8572ds_core0.dtb |
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=> bootm 1000000 2000000 c00000 |
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Please note only core0 will run u-boot, core1 starts kernel directly after |
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"cpu release" command is issued. |
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