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@ -11,6 +11,34 @@ |
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#include "ihs_mdio.h" |
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static inline u16 read_control(struct ihs_mdio_info *info) |
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{ |
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u16 val; |
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FPGA_GET_REG(info->fpga, mdio.control, &val); |
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return val; |
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} |
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static inline void write_control(struct ihs_mdio_info *info, u16 val) |
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{ |
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FPGA_SET_REG(info->fpga, mdio.control, val); |
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} |
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static inline void write_addr_data(struct ihs_mdio_info *info, u16 val) |
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{ |
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FPGA_SET_REG(info->fpga, mdio.address_data, val); |
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} |
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static inline u16 read_rx_data(struct ihs_mdio_info *info) |
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{ |
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u16 val; |
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FPGA_GET_REG(info->fpga, mdio.rx_data, &val); |
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return val; |
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} |
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static int ihs_mdio_idle(struct mii_dev *bus) |
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{ |
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struct ihs_mdio_info *info = bus->priv; |
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@ -18,7 +46,7 @@ static int ihs_mdio_idle(struct mii_dev *bus) |
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unsigned int ctr = 0; |
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do { |
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FPGA_GET_REG(info->fpga, mdio.control, &val); |
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val = read_control(info); |
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udelay(100); |
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if (ctr++ > 10) |
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return -1; |
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@ -42,13 +70,13 @@ static int ihs_mdio_read(struct mii_dev *bus, int addr, int dev_addr, |
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ihs_mdio_idle(bus); |
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FPGA_SET_REG(info->fpga, mdio.control, |
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write_control(info, |
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((addr & 0x1f) << 5) | (regnum & 0x1f) | (2 << 10)); |
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/* wait for rx data available */ |
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udelay(100); |
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FPGA_GET_REG(info->fpga, mdio.rx_data, &val); |
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val = read_rx_data(info); |
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return val; |
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} |
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@ -60,9 +88,8 @@ static int ihs_mdio_write(struct mii_dev *bus, int addr, int dev_addr, |
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ihs_mdio_idle(bus); |
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FPGA_SET_REG(info->fpga, mdio.address_data, value); |
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FPGA_SET_REG(info->fpga, mdio.control, |
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((addr & 0x1f) << 5) | (regnum & 0x1f) | (1 << 10)); |
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write_addr_data(info, value); |
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write_control(info, ((addr & 0x1f) << 5) | (regnum & 0x1f) | (1 << 10)); |
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return 0; |
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} |
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