Added edge conditioning register (ecr) for PPC405GPr.

master
stroese 23 years ago
parent 7e11d8269e
commit 97a43d641d
  1. 1
      include/ppc405.h

@ -236,6 +236,7 @@
#define cntrl1 (CNTRL_DCR_BASE+0x2) /* Control 1 register */ #define cntrl1 (CNTRL_DCR_BASE+0x2) /* Control 1 register */
#define reset (CNTRL_DCR_BASE+0x3) /* reset register */ #define reset (CNTRL_DCR_BASE+0x3) /* reset register */
#define strap (CNTRL_DCR_BASE+0x4) /* strap register */ #define strap (CNTRL_DCR_BASE+0x4) /* strap register */
#define ecr (0xAA) /* edge conditioning register (405GPr) */
/* Bit definitions */ /* Bit definitions */
#define PLLMR_FWD_DIV_MASK 0xE0000000 /* Forward Divisor */ #define PLLMR_FWD_DIV_MASK 0xE0000000 /* Forward Divisor */

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