@ -67,6 +67,8 @@
# define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5
# define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5
# define CONFIG_SYS_FSL_RMU
# define CONFIG_SYS_FSL_RMU
# define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM 2
# define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM 2
# define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
# define CONFIG_SYS_FSL_A004447_SVR_REV 0x00
# elif defined(CONFIG_MPC8555)
# elif defined(CONFIG_MPC8555)
# define CONFIG_MAX_CPUS 1
# define CONFIG_MAX_CPUS 1
@ -132,6 +134,8 @@
# define CONFIG_SYS_FSL_ERRATUM_IFC_A002769
# define CONFIG_SYS_FSL_ERRATUM_IFC_A002769
# define CONFIG_SYS_FSL_ERRATUM_P1010_A003549
# define CONFIG_SYS_FSL_ERRATUM_P1010_A003549
# define CONFIG_SYS_FSL_ERRATUM_IFC_A003399
# define CONFIG_SYS_FSL_ERRATUM_IFC_A003399
# define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
# define CONFIG_SYS_FSL_A004447_SVR_REV 0x10
/* P1011 is single core version of P1020 */
/* P1011 is single core version of P1020 */
# elif defined(CONFIG_P1011)
# elif defined(CONFIG_P1011)
@ -249,6 +253,8 @@
# define CONFIG_SYS_FM_MURAM_SIZE 0x10000
# define CONFIG_SYS_FM_MURAM_SIZE 0x10000
# define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2"
# define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2"
# define CONFIG_SYS_CCSRBAR_DEFAULT 0xff600000
# define CONFIG_SYS_CCSRBAR_DEFAULT 0xff600000
# define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
# define CONFIG_SYS_FSL_A004447_SVR_REV 0x11
/* P1024 is lower end variant of P1020 */
/* P1024 is lower end variant of P1020 */
# elif defined(CONFIG_P1024)
# elif defined(CONFIG_P1024)
@ -334,6 +340,8 @@
# define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000
# define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000
# define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034
# define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034
# define CONFIG_SYS_FSL_ERRATUM_A004849
# define CONFIG_SYS_FSL_ERRATUM_A004849
# define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
# define CONFIG_SYS_FSL_A004447_SVR_REV 0x11
# elif defined(CONFIG_PPC_P3041)
# elif defined(CONFIG_PPC_P3041)
# define CONFIG_SYS_FSL_QORIQ_CHASSIS1
# define CONFIG_SYS_FSL_QORIQ_CHASSIS1
@ -369,6 +377,8 @@
# define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034
# define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034
# define CONFIG_SYS_FSL_ERRATUM_A004849
# define CONFIG_SYS_FSL_ERRATUM_A004849
# define CONFIG_SYS_FSL_ERRATUM_A005812
# define CONFIG_SYS_FSL_ERRATUM_A005812
# define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
# define CONFIG_SYS_FSL_A004447_SVR_REV 0x20
# elif defined(CONFIG_PPC_P4080) /* also supports P4040 */
# elif defined(CONFIG_PPC_P4080) /* also supports P4040 */
# define CONFIG_SYS_FSL_QORIQ_CHASSIS1
# define CONFIG_SYS_FSL_QORIQ_CHASSIS1
@ -415,6 +425,8 @@
# define CONFIG_SYS_FSL_ERRATUM_A004580
# define CONFIG_SYS_FSL_ERRATUM_A004580
# define CONFIG_SYS_P4080_ERRATUM_PCIE_A003
# define CONFIG_SYS_P4080_ERRATUM_PCIE_A003
# define CONFIG_SYS_FSL_ERRATUM_A005812
# define CONFIG_SYS_FSL_ERRATUM_A005812
# define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
# define CONFIG_SYS_FSL_A004447_SVR_REV 0x20
# elif defined(CONFIG_PPC_P5020) /* also supports P5010 */
# elif defined(CONFIG_PPC_P5020) /* also supports P5010 */
# define CONFIG_SYS_PPC64 /* 64-bit core */
# define CONFIG_SYS_PPC64 /* 64-bit core */
@ -446,6 +458,8 @@
# define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV 0x10
# define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV 0x10
# define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xc0000000
# define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xc0000000
# define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034
# define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034
# define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
# define CONFIG_SYS_FSL_A004447_SVR_REV 0x20
# elif defined(CONFIG_PPC_P5040)
# elif defined(CONFIG_PPC_P5040)
# define CONFIG_SYS_PPC64
# define CONFIG_SYS_PPC64
@ -510,6 +524,8 @@
# define CONFIG_SYS_FSL_ERRATUM_ESDHC111
# define CONFIG_SYS_FSL_ERRATUM_ESDHC111
# define CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK
# define CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK
# define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2"
# define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2"
# define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
# define CONFIG_SYS_FSL_A004447_SVR_REV 0x11
# elif defined(CONFIG_PPC_T4240) || defined(CONFIG_PPC_T4160)
# elif defined(CONFIG_PPC_T4240) || defined(CONFIG_PPC_T4160)
# define CONFIG_E6500
# define CONFIG_E6500