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@ -16,7 +16,6 @@ |
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#include <asm/arch/reset_manager.h> |
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#include <asm/arch/scan_manager.h> |
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#include <asm/arch/system_manager.h> |
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#include <asm/arch/dwmmc.h> |
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#include <asm/arch/nic301.h> |
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#include <asm/arch/scu.h> |
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#include <asm/pl310.h> |
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@ -77,7 +76,8 @@ void v7_outer_cache_disable(void) |
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* DesignWare Ethernet initialization |
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*/ |
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#ifdef CONFIG_ETH_DESIGNWARE |
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static void dwmac_deassert_reset(const unsigned int of_reset_id) |
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static void dwmac_deassert_reset(const unsigned int of_reset_id, |
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const u32 phymode) |
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{ |
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u32 physhift, reset; |
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@ -98,16 +98,41 @@ static void dwmac_deassert_reset(const unsigned int of_reset_id) |
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/* configure to PHY interface select choosed */ |
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setbits_le32(&sysmgr_regs->emacgrp_ctrl, |
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SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII << physhift); |
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phymode << physhift); |
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/* Release the EMAC controller from reset */ |
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socfpga_per_reset(reset, 0); |
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} |
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static u32 dwmac_phymode_to_modereg(const char *phymode, u32 *modereg) |
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{ |
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if (!phymode) |
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return -EINVAL; |
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if (!strcmp(phymode, "mii") || !strcmp(phymode, "gmii")) { |
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*modereg = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII; |
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return 0; |
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} |
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if (!strcmp(phymode, "rgmii")) { |
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*modereg = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII; |
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return 0; |
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} |
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if (!strcmp(phymode, "rmii")) { |
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*modereg = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RMII; |
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return 0; |
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} |
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return -EINVAL; |
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} |
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static int socfpga_eth_reset(void) |
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{ |
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const void *fdt = gd->fdt_blob; |
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struct fdtdec_phandle_args args; |
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const char *phy_mode; |
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u32 phy_modereg; |
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int nodes[2]; /* Max. two GMACs */ |
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int ret, count; |
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int i, node; |
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@ -132,7 +157,14 @@ static int socfpga_eth_reset(void) |
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continue; |
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} |
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dwmac_deassert_reset(args.args[0]); |
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phy_mode = fdt_getprop(fdt, node, "phy-mode", NULL); |
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ret = dwmac_phymode_to_modereg(phy_mode, &phy_modereg); |
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if (ret) { |
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debug("GMAC%i: Failed to parse DT 'phy-mode'!\n", i); |
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continue; |
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} |
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dwmac_deassert_reset(args.args[0], phy_modereg); |
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} |
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return 0; |
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Tom Rini
8 years ago