zynq: Use system timer implementation instead of our

Don't use error-prone arch timer code and instead use system
timer implementation to simplify our code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
master
Michal Simek 10 years ago
parent a84988c76d
commit a2ec7fb906
  1. 1
      arch/arm/mach-zynq/include/mach/hardware.h
  2. 83
      arch/arm/mach-zynq/timer.c
  3. 5
      include/configs/zynq-common.h

@ -12,7 +12,6 @@
#define ZYNQ_SYS_CTRL_BASEADDR 0xF8000000 #define ZYNQ_SYS_CTRL_BASEADDR 0xF8000000
#define ZYNQ_DEV_CFG_APB_BASEADDR 0xF8007000 #define ZYNQ_DEV_CFG_APB_BASEADDR 0xF8007000
#define ZYNQ_SCU_BASEADDR 0xF8F00000 #define ZYNQ_SCU_BASEADDR 0xF8F00000
#define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600
#define ZYNQ_GEM_BASEADDR0 0xE000B000 #define ZYNQ_GEM_BASEADDR0 0xE000B000
#define ZYNQ_GEM_BASEADDR1 0xE000C000 #define ZYNQ_GEM_BASEADDR1 0xE000C000
#define ZYNQ_SDHCI_BASEADDR0 0xE0100000 #define ZYNQ_SDHCI_BASEADDR0 0xE0100000

@ -78,91 +78,10 @@ int timer_init(void)
} }
/* /*
* This function is derived from PowerPC code (read timebase as long long).
* On ARM it just returns the timer value.
*/
ulong get_timer_masked(void)
{
ulong now;
now = readl(&timer_base->counter) /
(gd->arch.timer_rate_hz / CONFIG_SYS_HZ);
if (gd->arch.lastinc >= now) {
/* Normal mode */
gd->arch.tbl += gd->arch.lastinc - now;
} else {
/* We have an overflow ... */
gd->arch.tbl += gd->arch.lastinc + (TIMER_LOAD_VAL /
(gd->arch.timer_rate_hz / CONFIG_SYS_HZ)) -
now + 1;
}
gd->arch.lastinc = now;
return gd->arch.tbl;
}
void __udelay(unsigned long usec)
{
u32 countticks;
u32 timeend;
u32 timediff;
u32 timenow;
if (usec == 0)
return;
countticks = lldiv(((unsigned long long)gd->arch.timer_rate_hz * usec),
1000000);
/* decrementing timer */
timeend = readl(&timer_base->counter) - countticks;
#if TIMER_LOAD_VAL != 0xFFFFFFFF
/* do not manage multiple overflow */
if (countticks >= TIMER_LOAD_VAL)
countticks = TIMER_LOAD_VAL - 1;
#endif
do {
timenow = readl(&timer_base->counter);
if (timenow >= timeend) {
/* normal case */
timediff = timenow - timeend;
} else {
if ((TIMER_LOAD_VAL - timeend + timenow) <=
countticks) {
/* overflow */
timediff = TIMER_LOAD_VAL - timeend + timenow;
} else {
/* missed the exact match */
break;
}
}
} while (timediff > 0);
}
/* Timer without interrupts */
ulong get_timer(ulong base)
{
return get_timer_masked() - base;
}
/*
* This function is derived from PowerPC code (read timebase as long long).
* On ARM it just returns the timer value.
*/
unsigned long long get_ticks(void)
{
return get_timer(0);
}
/*
* This function is derived from PowerPC code (timebase clock frequency). * This function is derived from PowerPC code (timebase clock frequency).
* On ARM it returns the number of timer ticks per second. * On ARM it returns the number of timer ticks per second.
*/ */
ulong get_tbclk(void) ulong get_tbclk(void)
{ {
return CONFIG_SYS_HZ; return gd->arch.timer_rate_hz;
} }

@ -25,6 +25,11 @@
# define CONFIG_SYS_PL310_BASE 0xf8f02000 # define CONFIG_SYS_PL310_BASE 0xf8f02000
#endif #endif
#define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600
#define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR
#define CONFIG_SYS_TIMER_COUNTS_DOWN
#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4)
/* Serial drivers */ /* Serial drivers */
#define CONFIG_BAUDRATE 115200 #define CONFIG_BAUDRATE 115200
/* The following table includes the supported baudrates */ /* The following table includes the supported baudrates */

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