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mpc83xx: Set PCI I/O bus-address base to zero.

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The device trees for these boards describe PCI I/O as starting from
address zero from the device's perspective.

Placing I/O elsewhere may cause problems with certain PCI boards, and may
cause problems with Linux.

Signed-off-by: Scott Wood <scottwood@freescale.com>
master
Scott Wood 17 years ago committed by Kim Phillips
parent f700e7df7f
commit a7ba32d480
5 changed files with 5 additions and 5 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
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  1. 2
      include/configs/MPC8315ERDB.h
  2. 2
      include/configs/MPC832XEMDS.h
  3. 2
      include/configs/MPC8360EMDS.h
  4. 2
      include/configs/MPC837XEMDS.h
  5. 2
      include/configs/MPC837XERDB.h

2
include/configs/MPC8315ERDB.h
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@ -299,7 +299,7 @@
#define CFG_PCI_MMIO_BASE 0x90000000 #define CFG_PCI_MMIO_BASE 0x90000000
#define CFG_PCI_MMIO_PHYS CFG_PCI_MMIO_BASE #define CFG_PCI_MMIO_PHYS CFG_PCI_MMIO_BASE
#define CFG_PCI_MMIO_SIZE 0x10000000 /* 256M */ #define CFG_PCI_MMIO_SIZE 0x10000000 /* 256M */
#define CFG_PCI_IO_BASE 0xE0300000 #define CFG_PCI_IO_BASE 0x00000000
#define CFG_PCI_IO_PHYS 0xE0300000 #define CFG_PCI_IO_PHYS 0xE0300000
#define CFG_PCI_IO_SIZE 0x100000 /* 1M */ #define CFG_PCI_IO_SIZE 0x100000 /* 1M */

2
include/configs/MPC832XEMDS.h
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@ -346,7 +346,7 @@
#define CFG_PCI_MMIO_BASE 0x90000000 #define CFG_PCI_MMIO_BASE 0x90000000
#define CFG_PCI_MMIO_PHYS CFG_PCI_MMIO_BASE #define CFG_PCI_MMIO_PHYS CFG_PCI_MMIO_BASE
#define CFG_PCI_MMIO_SIZE 0x10000000 /* 256M */ #define CFG_PCI_MMIO_SIZE 0x10000000 /* 256M */
#define CFG_PCI_IO_BASE 0xE0300000 #define CFG_PCI_IO_BASE 0x00000000
#define CFG_PCI_IO_PHYS 0xE0300000 #define CFG_PCI_IO_PHYS 0xE0300000
#define CFG_PCI_IO_SIZE 0x100000 /* 1M */ #define CFG_PCI_IO_SIZE 0x100000 /* 1M */

2
include/configs/MPC8360EMDS.h
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@ -375,7 +375,7 @@
#define CFG_PCI_MMIO_BASE 0x90000000 #define CFG_PCI_MMIO_BASE 0x90000000
#define CFG_PCI_MMIO_PHYS CFG_PCI_MMIO_BASE #define CFG_PCI_MMIO_PHYS CFG_PCI_MMIO_BASE
#define CFG_PCI_MMIO_SIZE 0x10000000 /* 256M */ #define CFG_PCI_MMIO_SIZE 0x10000000 /* 256M */
#define CFG_PCI_IO_BASE 0xE0300000 #define CFG_PCI_IO_BASE 0x00000000
#define CFG_PCI_IO_PHYS 0xE0300000 #define CFG_PCI_IO_PHYS 0xE0300000
#define CFG_PCI_IO_SIZE 0x100000 /* 1M */ #define CFG_PCI_IO_SIZE 0x100000 /* 1M */

2
include/configs/MPC837XEMDS.h
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@ -338,7 +338,7 @@
#define CFG_PCI_MMIO_BASE 0x90000000 #define CFG_PCI_MMIO_BASE 0x90000000
#define CFG_PCI_MMIO_PHYS CFG_PCI_MMIO_BASE #define CFG_PCI_MMIO_PHYS CFG_PCI_MMIO_BASE
#define CFG_PCI_MMIO_SIZE 0x10000000 /* 256M */ #define CFG_PCI_MMIO_SIZE 0x10000000 /* 256M */
#define CFG_PCI_IO_BASE 0xE0300000 #define CFG_PCI_IO_BASE 0x00000000
#define CFG_PCI_IO_PHYS 0xE0300000 #define CFG_PCI_IO_PHYS 0xE0300000
#define CFG_PCI_IO_SIZE 0x100000 /* 1M */ #define CFG_PCI_IO_SIZE 0x100000 /* 1M */

2
include/configs/MPC837XERDB.h
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@ -366,7 +366,7 @@
#define CFG_PCI_MMIO_BASE 0x90000000 #define CFG_PCI_MMIO_BASE 0x90000000
#define CFG_PCI_MMIO_PHYS CFG_PCI_MMIO_BASE #define CFG_PCI_MMIO_PHYS CFG_PCI_MMIO_BASE
#define CFG_PCI_MMIO_SIZE 0x10000000 /* 256M */ #define CFG_PCI_MMIO_SIZE 0x10000000 /* 256M */
#define CFG_PCI_IO_BASE 0xE0300000 #define CFG_PCI_IO_BASE 0x00000000
#define CFG_PCI_IO_PHYS 0xE0300000 #define CFG_PCI_IO_PHYS 0xE0300000
#define CFG_PCI_IO_SIZE 0x100000 /* 1M */ #define CFG_PCI_IO_SIZE 0x100000 /* 1M */

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