Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Gary Jennejohn <garyj@denx.de>master
Wolfgang Denk
14 years ago
committed by
Albert ARIBAUD
parent
1f7f0edd3c
commit
ad218a868b
@ -1,51 +0,0 @@ |
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#
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# (C) Copyright 2000-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk |
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LIB = $(obj)lib$(BOARD).o
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COBJS := smdk2400.o flash.o
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SOBJS := lowlevel_init.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS) $(SOBJS) |
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$(call cmd_link_o_target, $(OBJS) $(SOBJS))
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clean: |
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rm -f $(SOBJS) $(OBJS)
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distclean: clean |
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rm -f $(LIB) core *.bak $(obj).depend
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk |
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sinclude $(obj).depend |
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#########################################################################
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@ -1,25 +0,0 @@ |
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#
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# (C) Copyright 2002
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# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
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#
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# SAMSUNG board with S3C2400X (ARM920T) CPU
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#
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# see http://www.samsung.com/ for more information on SAMSUNG
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#
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#
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# SAMSUNG has 1 bank of 32 MB DRAM
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#
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# 0C00'0000 to 0E00'0000
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#
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# Linux-Kernel is expected to be at 0cf0'0000, entry 0cf0'0000
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# optionally with a ramdisk at 0c80'0000
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#
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# we load ourself to 0CF80000 (must be high enough not to be
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# overwritten by the uncompessing Linux kernel)
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#
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# download area is 0C80'0000
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#
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CONFIG_SYS_TEXT_BASE = 0x0CF80000
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@ -1,492 +0,0 @@ |
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/*
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* (C) Copyright 2002 |
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
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* Marius Groeger <mgroeger@sysgo.de> |
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* |
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* (C) Copyright 2002 |
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* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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/* #define DEBUG */ |
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#include <common.h> |
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#include <environment.h> |
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#define FLASH_BANK_SIZE 0x1000000 /* 2 x 8 MB */ |
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#define MAIN_SECT_SIZE 0x40000 /* 2 x 128 kB */ |
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flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; |
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#define CMD_READ_ARRAY 0x00FF00FF |
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#define CMD_IDENTIFY 0x00900090 |
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#define CMD_ERASE_SETUP 0x00200020 |
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#define CMD_ERASE_CONFIRM 0x00D000D0 |
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#define CMD_PROGRAM 0x00400040 |
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#define CMD_RESUME 0x00D000D0 |
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#define CMD_SUSPEND 0x00B000B0 |
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#define CMD_STATUS_READ 0x00700070 |
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#define CMD_STATUS_RESET 0x00500050 |
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#define BIT_BUSY 0x00800080 |
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#define BIT_ERASE_SUSPEND 0x00400040 |
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#define BIT_ERASE_ERROR 0x00200020 |
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#define BIT_PROGRAM_ERROR 0x00100010 |
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#define BIT_VPP_RANGE_ERROR 0x00080008 |
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#define BIT_PROGRAM_SUSPEND 0x00040004 |
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#define BIT_PROTECT_ERROR 0x00020002 |
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#define BIT_UNDEFINED 0x00010001 |
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#define BIT_SEQUENCE_ERROR 0x00300030 |
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#define BIT_TIMEOUT 0x80000000 |
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/*-----------------------------------------------------------------------
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*/ |
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ulong flash_init (void) |
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{ |
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int i, j; |
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ulong size = 0; |
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for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { |
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ulong flashbase = 0; |
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flash_info[i].flash_id = |
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(INTEL_MANUFACT & FLASH_VENDMASK) | |
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(INTEL_ID_28F640J3A & FLASH_TYPEMASK); |
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flash_info[i].size = FLASH_BANK_SIZE; |
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flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT; |
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memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT); |
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if (i == 0) |
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flashbase = CONFIG_SYS_FLASH_BASE; |
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else |
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panic ("configured too many flash banks!\n"); |
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for (j = 0; j < flash_info[i].sector_count; j++) { |
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flash_info[i].start[j] = flashbase; |
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/* uniform sector size */ |
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flashbase += MAIN_SECT_SIZE; |
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} |
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size += flash_info[i].size; |
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} |
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/*
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* Protect monitor and environment sectors |
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*/ |
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flash_protect ( FLAG_PROTECT_SET, |
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CONFIG_SYS_FLASH_BASE, |
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CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1, |
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&flash_info[0]); |
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flash_protect ( FLAG_PROTECT_SET, |
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CONFIG_ENV_ADDR, |
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CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, &flash_info[0]); |
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#ifdef CONFIG_ENV_ADDR_REDUND |
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flash_protect ( FLAG_PROTECT_SET, |
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CONFIG_ENV_ADDR_REDUND, |
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CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1, |
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&flash_info[0]); |
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#endif |
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return size; |
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} |
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/*-----------------------------------------------------------------------
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*/ |
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void flash_print_info (flash_info_t * info) |
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{ |
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int i; |
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switch (info->flash_id & FLASH_VENDMASK) { |
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case (INTEL_MANUFACT & FLASH_VENDMASK): |
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printf ("Intel: "); |
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break; |
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default: |
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printf ("Unknown Vendor "); |
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break; |
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} |
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switch (info->flash_id & FLASH_TYPEMASK) { |
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case (INTEL_ID_28F640J3A & FLASH_TYPEMASK): |
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printf ("2x 28F640J3A (64Mbit)\n"); |
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break; |
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default: |
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printf ("Unknown Chip Type\n"); |
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goto Done; |
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break; |
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} |
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printf (" Size: %ld MB in %d Sectors\n", |
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info->size >> 20, info->sector_count); |
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printf (" Sector Start Addresses:"); |
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for (i = 0; i < info->sector_count; i++) { |
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if ((i % 5) == 0) { |
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printf ("\n "); |
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} |
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printf (" %08lX%s", |
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info->start[i], |
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info->protect[i] ? " (RO)" : " "); |
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} |
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printf ("\n"); |
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Done: ; |
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} |
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/*-----------------------------------------------------------------------
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*/ |
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int flash_error (ulong code) |
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{ |
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/* Check bit patterns */ |
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/* SR.7=0 is busy, SR.7=1 is ready */ |
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/* all other flags indicate error on 1 */ |
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/* SR.0 is undefined */ |
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/* Timeout is our faked flag */ |
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/* sequence is described in Intel 290644-005 document */ |
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/* check Timeout */ |
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if (code & BIT_TIMEOUT) { |
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puts ("Timeout\n"); |
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return ERR_TIMOUT; |
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} |
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/* check Busy, SR.7 */ |
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if (~code & BIT_BUSY) { |
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puts ("Busy\n"); |
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return ERR_PROG_ERROR; |
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} |
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/* check Vpp low, SR.3 */ |
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if (code & BIT_VPP_RANGE_ERROR) { |
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puts ("Vpp range error\n"); |
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return ERR_PROG_ERROR; |
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} |
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/* check Device Protect Error, SR.1 */ |
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if (code & BIT_PROTECT_ERROR) { |
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puts ("Device protect error\n"); |
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return ERR_PROG_ERROR; |
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} |
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/* check Command Seq Error, SR.4 & SR.5 */ |
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if (code & BIT_SEQUENCE_ERROR) { |
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puts ("Command seqence error\n"); |
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return ERR_PROG_ERROR; |
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} |
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/* check Block Erase Error, SR.5 */ |
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if (code & BIT_ERASE_ERROR) { |
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puts ("Block erase error\n"); |
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return ERR_PROG_ERROR; |
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} |
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/* check Program Error, SR.4 */ |
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if (code & BIT_PROGRAM_ERROR) { |
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puts ("Program error\n"); |
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return ERR_PROG_ERROR; |
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} |
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/* check Block Erase Suspended, SR.6 */ |
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if (code & BIT_ERASE_SUSPEND) { |
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puts ("Block erase suspended\n"); |
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return ERR_PROG_ERROR; |
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} |
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/* check Program Suspended, SR.2 */ |
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if (code & BIT_PROGRAM_SUSPEND) { |
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puts ("Program suspended\n"); |
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return ERR_PROG_ERROR; |
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} |
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/* OK, no error */ |
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return ERR_OK; |
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} |
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/*-----------------------------------------------------------------------
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*/ |
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int flash_erase (flash_info_t * info, int s_first, int s_last) |
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{ |
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ulong result, result1; |
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int iflag, prot, sect; |
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int rc = ERR_OK; |
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ulong start; |
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#ifdef USE_920T_MMU |
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int cflag; |
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#endif |
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debug ("flash_erase: s_first %d s_last %d\n", s_first, s_last); |
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/* first look for protection bits */ |
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if (info->flash_id == FLASH_UNKNOWN) |
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return ERR_UNKNOWN_FLASH_TYPE; |
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if ((s_first < 0) || (s_first > s_last)) { |
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return ERR_INVAL; |
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} |
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if ((info->flash_id & FLASH_VENDMASK) != |
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(INTEL_MANUFACT & FLASH_VENDMASK)) { |
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return ERR_UNKNOWN_FLASH_VENDOR; |
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} |
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prot = 0; |
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for (sect = s_first; sect <= s_last; ++sect) { |
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if (info->protect[sect]) { |
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prot++; |
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} |
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} |
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if (prot) { |
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printf ("- Warning: %d protected sectors will not be erased!\n", |
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prot); |
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} else { |
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printf ("\n"); |
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} |
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/*
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* Disable interrupts which might cause a timeout |
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* here. Remember that our exception vectors are |
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* at address 0 in the flash, and we don't want a |
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* (ticker) exception to happen while the flash |
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* chip is in programming mode. |
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*/ |
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#ifdef USE_920T_MMU |
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cflag = dcache_status (); |
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dcache_disable (); |
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#endif |
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iflag = disable_interrupts (); |
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/* Start erase on unprotected sectors */ |
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for (sect = s_first; sect <= s_last && !ctrlc (); sect++) { |
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debug ("Erasing sector %2d @ %08lX... ", |
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sect, info->start[sect]); |
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/* arm simple, non interrupt dependent timer */ |
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start = get_timer(0); |
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if (info->protect[sect] == 0) { /* not protected */ |
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vu_long *addr = (vu_long *) (info->start[sect]); |
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ulong bsR7, bsR7_2, bsR5, bsR5_2; |
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/* *addr = CMD_STATUS_RESET; */ |
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*addr = CMD_ERASE_SETUP; |
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*addr = CMD_ERASE_CONFIRM; |
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/* wait until flash is ready */ |
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do { |
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/* check timeout */ |
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if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { |
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*addr = CMD_STATUS_RESET; |
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result = BIT_TIMEOUT; |
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break; |
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} |
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*addr = CMD_STATUS_READ; |
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result = *addr; |
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bsR7 = result & (1 << 7); |
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bsR7_2 = result & (1 << 23); |
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} while (!bsR7 | !bsR7_2); |
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*addr = CMD_STATUS_READ; |
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result1 = *addr; |
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bsR5 = result1 & (1 << 5); |
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bsR5_2 = result1 & (1 << 21); |
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#ifdef SAMSUNG_FLASH_DEBUG |
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printf ("bsR5 %lx bsR5_2 %lx\n", bsR5, bsR5_2); |
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if (bsR5 != 0 && bsR5_2 != 0) |
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printf ("bsR5 %lx bsR5_2 %lx\n", bsR5, bsR5_2); |
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#endif |
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*addr = CMD_READ_ARRAY; |
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*addr = CMD_RESUME; |
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if ((rc = flash_error (result)) != ERR_OK) |
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goto outahere; |
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#if 0 |
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printf ("ok.\n"); |
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} else { /* it was protected */ |
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printf ("protected!\n"); |
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#endif |
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} |
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} |
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outahere: |
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/* allow flash to settle - wait 10 ms */ |
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udelay_masked (10000); |
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if (iflag) |
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enable_interrupts (); |
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#ifdef USE_920T_MMU |
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if (cflag) |
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dcache_enable (); |
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#endif |
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return rc; |
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} |
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/*-----------------------------------------------------------------------
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* Copy memory to flash |
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*/ |
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static int write_word (flash_info_t * info, ulong dest, ulong data) |
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||||||
{ |
|
||||||
vu_long *addr = (vu_long *) dest; |
|
||||||
ulong result; |
|
||||||
int rc = ERR_OK; |
|
||||||
int iflag; |
|
||||||
ulong start; |
|
||||||
|
|
||||||
#ifdef USE_920T_MMU |
|
||||||
int cflag; |
|
||||||
#endif |
|
||||||
|
|
||||||
/*
|
|
||||||
* Check if Flash is (sufficiently) erased |
|
||||||
*/ |
|
||||||
result = *addr; |
|
||||||
if ((result & data) != data) |
|
||||||
return ERR_NOT_ERASED; |
|
||||||
|
|
||||||
/*
|
|
||||||
* Disable interrupts which might cause a timeout |
|
||||||
* here. Remember that our exception vectors are |
|
||||||
* at address 0 in the flash, and we don't want a |
|
||||||
* (ticker) exception to happen while the flash |
|
||||||
* chip is in programming mode. |
|
||||||
*/ |
|
||||||
#ifdef USE_920T_MMU |
|
||||||
cflag = dcache_status (); |
|
||||||
dcache_disable (); |
|
||||||
#endif |
|
||||||
iflag = disable_interrupts (); |
|
||||||
|
|
||||||
/* *addr = CMD_STATUS_RESET; */ |
|
||||||
*addr = CMD_PROGRAM; |
|
||||||
*addr = data; |
|
||||||
|
|
||||||
/* arm simple, non interrupt dependent timer */ |
|
||||||
start = get_timer(0); |
|
||||||
|
|
||||||
/* wait until flash is ready */ |
|
||||||
do { |
|
||||||
/* check timeout */ |
|
||||||
if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { |
|
||||||
*addr = CMD_SUSPEND; |
|
||||||
result = BIT_TIMEOUT; |
|
||||||
break; |
|
||||||
} |
|
||||||
|
|
||||||
*addr = CMD_STATUS_READ; |
|
||||||
result = *addr; |
|
||||||
} while (~result & BIT_BUSY); |
|
||||||
|
|
||||||
/* *addr = CMD_READ_ARRAY; */ |
|
||||||
*addr = CMD_STATUS_READ; |
|
||||||
result = *addr; |
|
||||||
|
|
||||||
rc = flash_error (result); |
|
||||||
|
|
||||||
if (iflag) |
|
||||||
enable_interrupts (); |
|
||||||
|
|
||||||
#ifdef USE_920T_MMU |
|
||||||
if (cflag) |
|
||||||
dcache_enable (); |
|
||||||
#endif |
|
||||||
*addr = CMD_READ_ARRAY; |
|
||||||
*addr = CMD_RESUME; |
|
||||||
return rc; |
|
||||||
} |
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
|
||||||
* Copy memory to flash. |
|
||||||
*/ |
|
||||||
|
|
||||||
int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) |
|
||||||
{ |
|
||||||
ulong cp, wp, data; |
|
||||||
int l; |
|
||||||
int i, rc; |
|
||||||
|
|
||||||
wp = (addr & ~3); /* get lower word aligned address */ |
|
||||||
|
|
||||||
/*
|
|
||||||
* handle unaligned start bytes |
|
||||||
*/ |
|
||||||
if ((l = addr - wp) != 0) { |
|
||||||
data = 0; |
|
||||||
for (i = 0, cp = wp; i < l; ++i, ++cp) { |
|
||||||
data = (data >> 8) | (*(uchar *) cp << 24); |
|
||||||
} |
|
||||||
for (; i < 4 && cnt > 0; ++i) { |
|
||||||
data = (data >> 8) | (*src++ << 24); |
|
||||||
--cnt; |
|
||||||
++cp; |
|
||||||
} |
|
||||||
for (; cnt == 0 && i < 4; ++i, ++cp) { |
|
||||||
data = (data >> 8) | (*(uchar *) cp << 24); |
|
||||||
} |
|
||||||
|
|
||||||
if ((rc = write_word (info, wp, data)) != 0) { |
|
||||||
return (rc); |
|
||||||
} |
|
||||||
wp += 4; |
|
||||||
} |
|
||||||
|
|
||||||
/*
|
|
||||||
* handle word aligned part |
|
||||||
*/ |
|
||||||
while (cnt >= 4) { |
|
||||||
data = *((vu_long *) src); |
|
||||||
if ((rc = write_word (info, wp, data)) != 0) { |
|
||||||
return (rc); |
|
||||||
} |
|
||||||
src += 4; |
|
||||||
wp += 4; |
|
||||||
cnt -= 4; |
|
||||||
} |
|
||||||
|
|
||||||
if (cnt == 0) { |
|
||||||
return ERR_OK; |
|
||||||
} |
|
||||||
|
|
||||||
/*
|
|
||||||
* handle unaligned tail bytes |
|
||||||
*/ |
|
||||||
data = 0; |
|
||||||
for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) { |
|
||||||
data = (data >> 8) | (*src++ << 24); |
|
||||||
--cnt; |
|
||||||
} |
|
||||||
for (; i < 4; ++i, ++cp) { |
|
||||||
data = (data >> 8) | (*(uchar *) cp << 24); |
|
||||||
} |
|
||||||
|
|
||||||
return write_word (info, wp, data); |
|
||||||
} |
|
||||||
@ -1,163 +0,0 @@ |
|||||||
/* |
|
||||||
* Memory Setup stuff - taken from blob memsetup.S |
|
||||||
* |
|
||||||
* Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
|
|
||||||
* Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
|
|
||||||
* |
|
||||||
* Modified for the Samsung development board by |
|
||||||
* (C) Copyright 2002 |
|
||||||
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
|
||||||
* |
|
||||||
* See file CREDITS for list of people who contributed to this |
|
||||||
* project. |
|
||||||
* |
|
||||||
* This program is free software; you can redistribute it and/or
|
|
||||||
* modify it under the terms of the GNU General Public License as |
|
||||||
* published by the Free Software Foundation; either version 2 of
|
|
||||||
* the License, or (at your option) any later version. |
|
||||||
* |
|
||||||
* This program is distributed in the hope that it will be useful, |
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
||||||
* GNU General Public License for more details. |
|
||||||
* |
|
||||||
* You should have received a copy of the GNU General Public License |
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
|
||||||
* MA 02111-1307 USA |
|
||||||
*/ |
|
||||||
|
|
||||||
|
|
||||||
#include <config.h> |
|
||||||
#include <version.h> |
|
||||||
|
|
||||||
|
|
||||||
/* some parameters for the board */ |
|
||||||
|
|
||||||
/* |
|
||||||
* |
|
||||||
* Taken from linux/arch/arm/boot/compressed/head-s3c2400.S |
|
||||||
* |
|
||||||
* Copyright (C) 2001 Samsung Electronics by chc, 010406 |
|
||||||
* |
|
||||||
* S3C2400 specific tweaks. |
|
||||||
* |
|
||||||
*/ |
|
||||||
|
|
||||||
/* memory controller */ |
|
||||||
#define BWSCON 0x14000000 |
|
||||||
#define BANKCON3 0x14000010 /* for cs8900, ethernet */ |
|
||||||
|
|
||||||
/* Bank0 */ |
|
||||||
#define B0_Tacs 0x0 /* 0 clk */ |
|
||||||
#define B0_Tcos 0x0 /* 0 clk */ |
|
||||||
#define B0_Tacc 0x7 /* 14 clk */ |
|
||||||
#define B0_Tcoh 0x0 /* 0 clk */ |
|
||||||
#define B0_Tah 0x0 /* 0 clk */ |
|
||||||
#define B0_Tacp 0x0 |
|
||||||
#define B0_PMC 0x0 /* normal */ |
|
||||||
|
|
||||||
/* Bank1 */ |
|
||||||
#define B1_Tacs 0x0 /* 0 clk */ |
|
||||||
#define B1_Tcos 0x0 /* 0 clk */ |
|
||||||
#define B1_Tacc 0x7 /* 14 clk */ |
|
||||||
#define B1_Tcoh 0x0 /* 0 clk */ |
|
||||||
#define B1_Tah 0x0 /* 0 clk */ |
|
||||||
#define B1_Tacp 0x0 |
|
||||||
#define B1_PMC 0x0 /* normal */ |
|
||||||
|
|
||||||
/* Bank2 */ |
|
||||||
#define B2_Tacs 0x0 /* 0 clk */ |
|
||||||
#define B2_Tcos 0x0 /* 0 clk */ |
|
||||||
#define B2_Tacc 0x7 /* 14 clk */ |
|
||||||
#define B2_Tcoh 0x0 /* 0 clk */ |
|
||||||
#define B2_Tah 0x0 /* 0 clk */ |
|
||||||
#define B2_Tacp 0x0 |
|
||||||
#define B2_PMC 0x0 /* normal */ |
|
||||||
|
|
||||||
/* Bank3 - setup for the cs8900 */ |
|
||||||
#define B3_Tacs 0x0 /* 0 clk */ |
|
||||||
#define B3_Tcos 0x3 /* 4 clk */ |
|
||||||
#define B3_Tacc 0x7 /* 14 clk */ |
|
||||||
#define B3_Tcoh 0x1 /* 1 clk */ |
|
||||||
#define B3_Tah 0x0 /* 0 clk */ |
|
||||||
#define B3_Tacp 0x3 /* 6 clk */ |
|
||||||
#define B3_PMC 0x0 /* normal */ |
|
||||||
|
|
||||||
/* Bank4 */ |
|
||||||
#define B4_Tacs 0x0 /* 0 clk */ |
|
||||||
#define B4_Tcos 0x0 /* 0 clk */ |
|
||||||
#define B4_Tacc 0x7 /* 14 clk */ |
|
||||||
#define B4_Tcoh 0x0 /* 0 clk */ |
|
||||||
#define B4_Tah 0x0 /* 0 clk */ |
|
||||||
#define B4_Tacp 0x0 |
|
||||||
#define B4_PMC 0x0 /* normal */ |
|
||||||
|
|
||||||
/* Bank5 */ |
|
||||||
#define B5_Tacs 0x0 /* 0 clk */ |
|
||||||
#define B5_Tcos 0x0 /* 0 clk */ |
|
||||||
#define B5_Tacc 0x7 /* 14 clk */ |
|
||||||
#define B5_Tcoh 0x0 /* 0 clk */ |
|
||||||
#define B5_Tah 0x0 /* 0 clk */ |
|
||||||
#define B5_Tacp 0x0 |
|
||||||
#define B5_PMC 0x0 /* normal */ |
|
||||||
|
|
||||||
/* Bank6 */ |
|
||||||
#define B6_MT 0x3 /* SDRAM */ |
|
||||||
#define B6_Trcd 0x1 /* 3clk */ |
|
||||||
#define B6_SCAN 0x1 /* 9 bit */ |
|
||||||
|
|
||||||
/* Bank7 */ |
|
||||||
#define B7_MT 0x3 /* SDRAM */ |
|
||||||
#define B7_Trcd 0x1 /* 3clk */ |
|
||||||
#define B7_SCAN 0x1 /* 9 bit */ |
|
||||||
|
|
||||||
/* refresh parameter */ |
|
||||||
#define REFEN 0x1 /* enable refresh */ |
|
||||||
#define TREFMD 0x0 /* CBR(CAS before RAS)/auto refresh */ |
|
||||||
#define Trp 0x0 /* 2 clk */ |
|
||||||
#define Trc 0x3 /* 7 clk */ |
|
||||||
#define Tchr 0x2 /* 3 clk */ |
|
||||||
|
|
||||||
#define REFCNT 1113 /* period=15.6 us, HCLK=60Mhz, (2048+1-15.6*66) */ |
|
||||||
|
|
||||||
|
|
||||||
_TEXT_BASE: |
|
||||||
.word CONFIG_SYS_TEXT_BASE
|
|
||||||
|
|
||||||
.globl lowlevel_init
|
|
||||||
lowlevel_init: |
|
||||||
/* memory control configuration */ |
|
||||||
/* make r0 relative the current location so that it */ |
|
||||||
/* reads SMRDATA out of FLASH rather than memory ! */ |
|
||||||
ldr r0, =SMRDATA |
|
||||||
ldr r1, _TEXT_BASE |
|
||||||
sub r0, r0, r1 |
|
||||||
ldr r1, =BWSCON /* Bus Width Status Controller */ |
|
||||||
add r2, r0, #52 |
|
||||||
0: |
|
||||||
ldr r3, [r0], #4 |
|
||||||
str r3, [r1], #4 |
|
||||||
cmp r2, r0 |
|
||||||
bne 0b |
|
||||||
|
|
||||||
/* everything is fine now */ |
|
||||||
mov pc, lr |
|
||||||
|
|
||||||
.ltorg |
|
||||||
/* the literal pools origin */ |
|
||||||
|
|
||||||
SMRDATA: |
|
||||||
.word 0x2211d114 /* d->Ethernet, BUSWIDTH=32 */ |
|
||||||
.word ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC)) /* GCS0 */ |
|
||||||
.word ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC)) /* GCS1 */ |
|
||||||
.word ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC)) /* GCS2 */ |
|
||||||
.word ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC)) /* GCS3 */ |
|
||||||
.word ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC)) /* GCS4 */ |
|
||||||
.word ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC)) /* GCS5 */ |
|
||||||
.word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN)) /* GCS6 */ |
|
||||||
.word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN)) /* GCS7 */ |
|
||||||
.word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT) |
|
||||||
.word 0x10 /* BUSWIDTH=32, SCLK power saving mode, BANKSIZE 32M/32M */ |
|
||||||
.word 0x30 /* MRSR6, CL=3clk */ |
|
||||||
.word 0x30 /* MRSR7 */ |
|
||||||
@ -1,125 +0,0 @@ |
|||||||
/*
|
|
||||||
* (C) Copyright 2002 |
|
||||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
|
||||||
* Marius Groeger <mgroeger@sysgo.de> |
|
||||||
* |
|
||||||
* (C) Copyright 2002 |
|
||||||
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> |
|
||||||
* |
|
||||||
* See file CREDITS for list of people who contributed to this |
|
||||||
* project. |
|
||||||
* |
|
||||||
* This program is free software; you can redistribute it and/or |
|
||||||
* modify it under the terms of the GNU General Public License as |
|
||||||
* published by the Free Software Foundation; either version 2 of |
|
||||||
* the License, or (at your option) any later version. |
|
||||||
* |
|
||||||
* This program is distributed in the hope that it will be useful, |
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
||||||
* GNU General Public License for more details. |
|
||||||
* |
|
||||||
* You should have received a copy of the GNU General Public License |
|
||||||
* along with this program; if not, write to the Free Software |
|
||||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
|
||||||
* MA 02111-1307 USA |
|
||||||
*/ |
|
||||||
|
|
||||||
#include <common.h> |
|
||||||
#include <netdev.h> |
|
||||||
#include <asm/arch/s3c24x0_cpu.h> |
|
||||||
|
|
||||||
DECLARE_GLOBAL_DATA_PTR; |
|
||||||
|
|
||||||
#ifdef CONFIG_MODEM_SUPPORT |
|
||||||
static int key_pressed(void); |
|
||||||
int mdm_init (bd_t *); |
|
||||||
extern void disable_putc(void); |
|
||||||
extern void enable_putc(void); |
|
||||||
extern int hwflow_onoff(int); |
|
||||||
extern int do_mdm_init; /* defined in common/main.c */ |
|
||||||
#endif /* CONFIG_MODEM_SUPPORT */ |
|
||||||
|
|
||||||
/*
|
|
||||||
* Miscellaneous platform dependent initialisations |
|
||||||
*/ |
|
||||||
|
|
||||||
int board_init (void) |
|
||||||
{ |
|
||||||
struct s3c24x0_clock_power * const clk_power = |
|
||||||
s3c24x0_get_base_clock_power(); |
|
||||||
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio(); |
|
||||||
|
|
||||||
/* memory and cpu-speed are setup before relocation */ |
|
||||||
/* change the clock to be 50 MHz 1:1:1 */ |
|
||||||
clk_power->mpllcon = 0x5c042; |
|
||||||
clk_power->clkdivn = 0; |
|
||||||
/* set up the I/O ports */ |
|
||||||
gpio->pacon = 0x3ffff; |
|
||||||
gpio->pbcon = 0xaaaaaaaa; |
|
||||||
gpio->pbup = 0xffff; |
|
||||||
gpio->pecon = 0x0; |
|
||||||
gpio->peup = 0x0; |
|
||||||
#ifdef CONFIG_HWFLOW |
|
||||||
/*CTS[0] RTS[0] INPUT INPUT TXD[0] INPUT RXD[0] */ |
|
||||||
/* 10, 10, 00, 00, 10, 00, 10 */ |
|
||||||
gpio->pfcon = 0xa22; |
|
||||||
/* Disable pull-up on Rx, Tx, CTS and RTS pins */ |
|
||||||
gpio->pfup = 0x35; |
|
||||||
#else |
|
||||||
/*INPUT INPUT INPUT INPUT TXD[0] INPUT RXD[0] */ |
|
||||||
/* 00, 00, 00, 00, 10, 00, 10 */ |
|
||||||
gpio->pfcon = 0x22; |
|
||||||
/* Disable pull-up on Rx and Tx pins */ |
|
||||||
gpio->pfup = 0x5; |
|
||||||
#endif /* CONFIG_HWFLOW */ |
|
||||||
gpio->pgcon = 0x0; |
|
||||||
gpio->pgup = 0x0; |
|
||||||
gpio->opencr = 0x0; |
|
||||||
|
|
||||||
/* arch number of SAMSUNG-Board to MACH_TYPE_SMDK2400 */ |
|
||||||
gd->bd->bi_arch_number = MACH_TYPE_SMDK2400; |
|
||||||
|
|
||||||
/* adress of boot parameters */ |
|
||||||
gd->bd->bi_boot_params = 0x0C000100; |
|
||||||
|
|
||||||
#ifdef CONFIG_MODEM_SUPPORT |
|
||||||
if (key_pressed()) { |
|
||||||
disable_putc(); /* modem doesn't understand banner etc */ |
|
||||||
do_mdm_init = 1; |
|
||||||
} |
|
||||||
#endif /* CONFIG_MODEM_SUPPORT */ |
|
||||||
|
|
||||||
return 0; |
|
||||||
} |
|
||||||
|
|
||||||
int dram_init (void) |
|
||||||
{ |
|
||||||
gd->bd->bi_dram[0].start = PHYS_SDRAM_1; |
|
||||||
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; |
|
||||||
|
|
||||||
return 0; |
|
||||||
} |
|
||||||
|
|
||||||
#ifdef CONFIG_MODEM_SUPPORT |
|
||||||
static int key_pressed(void) |
|
||||||
{ |
|
||||||
int rc; |
|
||||||
if (1) { /* check for button push here, now just return 1 */ |
|
||||||
rc = 1; |
|
||||||
} |
|
||||||
|
|
||||||
return rc; |
|
||||||
} |
|
||||||
#endif /* CONFIG_MODEM_SUPPORT */ |
|
||||||
|
|
||||||
#ifdef CONFIG_CMD_NET |
|
||||||
int board_eth_init(bd_t *bis) |
|
||||||
{ |
|
||||||
int rc = 0; |
|
||||||
#ifdef CONFIG_CS8900 |
|
||||||
rc = cs8900_initialize(0, CONFIG_CS8900_BASE); |
|
||||||
#endif |
|
||||||
return rc; |
|
||||||
} |
|
||||||
#endif |
|
||||||
@ -1,189 +0,0 @@ |
|||||||
/*
|
|
||||||
* (C) Copyright 2002-2005 |
|
||||||
* Wolfgang Denk, DENX Software Engineering, <wd@denx.de> |
|
||||||
* (C) Copyright 2002 |
|
||||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
|
||||||
* Marius Groeger <mgroeger@sysgo.de> |
|
||||||
* Gary Jennejohn <garyj@denx.de> |
|
||||||
* |
|
||||||
* Configuation settings for the SAMSUNG board. |
|
||||||
* |
|
||||||
* See file CREDITS for list of people who contributed to this |
|
||||||
* project. |
|
||||||
* |
|
||||||
* This program is free software; you can redistribute it and/or |
|
||||||
* modify it under the terms of the GNU General Public License as |
|
||||||
* published by the Free Software Foundation; either version 2 of |
|
||||||
* the License, or (at your option) any later version. |
|
||||||
* |
|
||||||
* This program is distributed in the hope that it will be useful, |
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
||||||
* GNU General Public License for more details. |
|
||||||
* |
|
||||||
* You should have received a copy of the GNU General Public License |
|
||||||
* along with this program; if not, write to the Free Software |
|
||||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
|
||||||
* MA 02111-1307 USA |
|
||||||
*/ |
|
||||||
|
|
||||||
#ifndef __CONFIG_H |
|
||||||
#define __CONFIG_H |
|
||||||
|
|
||||||
/*
|
|
||||||
* High Level Configuration Options |
|
||||||
* (easy to change) |
|
||||||
*/ |
|
||||||
#define CONFIG_ARM920T 1 /* This is an ARM920T core */ |
|
||||||
#define CONFIG_S3C24X0 1 /* in a SAMSUNG S3C24x0-type SoC */ |
|
||||||
#define CONFIG_S3C2400 1 /* specifically a SAMSUNG S3C2400 SoC */ |
|
||||||
#define CONFIG_SMDK2400 1 /* on an SAMSUNG SMDK2400 Board */ |
|
||||||
|
|
||||||
/* input clock of PLL */ |
|
||||||
#define CONFIG_SYS_CLK_FREQ 12000000 /* SMDK2400 has 12 MHz input clock */ |
|
||||||
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ |
|
||||||
|
|
||||||
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
|
||||||
#define CONFIG_SETUP_MEMORY_TAGS 1 |
|
||||||
#define CONFIG_INITRD_TAG 1 |
|
||||||
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Size of malloc() pool |
|
||||||
*/ |
|
||||||
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) |
|
||||||
|
|
||||||
/*
|
|
||||||
* Hardware drivers |
|
||||||
*/ |
|
||||||
#define CONFIG_NET_MULTI |
|
||||||
#define CONFIG_CS8900 /* we have a CS8900 on-board */ |
|
||||||
#define CONFIG_CS8900_BASE 0x07000300 /* agrees with WIN CE PA */ |
|
||||||
#define CONFIG_CS8900_BUS16 /* the Linux driver does accesses as shorts */ |
|
||||||
|
|
||||||
/*
|
|
||||||
* select serial console configuration |
|
||||||
*/ |
|
||||||
#define CONFIG_S3C24X0_SERIAL |
|
||||||
#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SAMSUNG */ |
|
||||||
|
|
||||||
#undef CONFIG_HWFLOW /* include RTS/CTS flow control support */ |
|
||||||
|
|
||||||
#undef CONFIG_MODEM_SUPPORT /* enable modem initialization stuff */ |
|
||||||
|
|
||||||
/*
|
|
||||||
* The following enables modem debugging stuff. The dbg() and |
|
||||||
* 'char screen[1024]' are used for debug printfs. Unfortunately, |
|
||||||
* it is usable only from BDI |
|
||||||
*/ |
|
||||||
#undef CONFIG_MODEM_SUPPORT_DEBUG |
|
||||||
|
|
||||||
/* allow to overwrite serial and ethaddr */ |
|
||||||
#define CONFIG_ENV_OVERWRITE |
|
||||||
|
|
||||||
#define CONFIG_BAUDRATE 115200 |
|
||||||
|
|
||||||
#define CONFIG_TIMESTAMP 1 /* Print timestamp info for images */ |
|
||||||
|
|
||||||
/* Use s3c2400's RTC */ |
|
||||||
#define CONFIG_RTC_S3C24X0 1 |
|
||||||
|
|
||||||
|
|
||||||
/*
|
|
||||||
* BOOTP options |
|
||||||
*/ |
|
||||||
#define CONFIG_BOOTP_BOOTFILESIZE |
|
||||||
#define CONFIG_BOOTP_BOOTPATH |
|
||||||
#define CONFIG_BOOTP_GATEWAY |
|
||||||
#define CONFIG_BOOTP_HOSTNAME |
|
||||||
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Command line configuration. |
|
||||||
*/ |
|
||||||
#include <config_cmd_default.h> |
|
||||||
|
|
||||||
#define CONFIG_CMD_DATE |
|
||||||
#define CONFIG_CMD_SNTP |
|
||||||
|
|
||||||
#if defined(CONFIG_HWFLOW) |
|
||||||
#define CONFIG_CONFIG_HWFLOW |
|
||||||
#endif |
|
||||||
|
|
||||||
#if !defined(USE_920T_MMU) |
|
||||||
#undef CONFIG_CMD_CACHE |
|
||||||
#endif |
|
||||||
|
|
||||||
|
|
||||||
#define CONFIG_BOOTDELAY 3 |
|
||||||
#define CONFIG_NETMASK 255.255.255.0 |
|
||||||
#define CONFIG_IPADDR 134.98.93.36 |
|
||||||
#define CONFIG_SERVERIP 134.98.93.22 |
|
||||||
|
|
||||||
#if defined(CONFIG_CMD_KGDB) |
|
||||||
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ |
|
||||||
/* what's this ? it's not used anywhere */ |
|
||||||
#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ |
|
||||||
#endif |
|
||||||
|
|
||||||
/*
|
|
||||||
* Miscellaneous configurable options |
|
||||||
*/ |
|
||||||
#define CONFIG_SYS_LONGHELP /* undef to save memory */ |
|
||||||
#define CONFIG_SYS_PROMPT "SMDK2400 # " /* Monitor Command Prompt */ |
|
||||||
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
|
||||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
|
||||||
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
|
||||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ |
|
||||||
|
|
||||||
#define CONFIG_SYS_MEMTEST_START 0x0c000000 /* memtest works on */ |
|
||||||
#define CONFIG_SYS_MEMTEST_END 0x0e000000 /* 32 MB in DRAM */ |
|
||||||
|
|
||||||
#define CONFIG_SYS_LOAD_ADDR 0x0cf00000 /* default load address */ |
|
||||||
|
|
||||||
#define CONFIG_SYS_HZ 1000 |
|
||||||
|
|
||||||
/* valid baudrates */ |
|
||||||
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
|
||||||
* Stack sizes |
|
||||||
* |
|
||||||
* The stack sizes are set up in start.S using the settings below |
|
||||||
*/ |
|
||||||
#define CONFIG_STACKSIZE (128*1024) /* regular stack */ |
|
||||||
#ifdef CONFIG_USE_IRQ |
|
||||||
#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ |
|
||||||
#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ |
|
||||||
#endif |
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
|
||||||
* Physical Memory Map |
|
||||||
*/ |
|
||||||
#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ |
|
||||||
#define PHYS_SDRAM_1 0x0c000000 /* SDRAM Bank #1 */ |
|
||||||
#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ |
|
||||||
|
|
||||||
#define CONFIG_SYS_FLASH_BASE 0x00000000 /* Flash Bank #1 */ |
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
|
||||||
* FLASH and environment organization |
|
||||||
*/ |
|
||||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
|
||||||
#define CONFIG_SYS_MAX_FLASH_SECT (64) /* max number of sectors on one chip */ |
|
||||||
|
|
||||||
/* timeout values are in ticks */ |
|
||||||
#define CONFIG_SYS_FLASH_ERASE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ |
|
||||||
#define CONFIG_SYS_FLASH_WRITE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Write */ |
|
||||||
|
|
||||||
#define CONFIG_ENV_IS_IN_FLASH 1 |
|
||||||
|
|
||||||
/* Address and size of Primary Environment Sector */ |
|
||||||
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x40000) |
|
||||||
#define CONFIG_ENV_SIZE 0x40000 |
|
||||||
|
|
||||||
/* Address and size of Redundant Environment Sector */ |
|
||||||
#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SIZE) |
|
||||||
#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) |
|
||||||
|
|
||||||
#endif /* __CONFIG_H */ |
|
||||||
Loading…
Reference in new issue