code and in SoC code). Boards using the old way have CFG_NAND_LEGACY and BOARDLIBS = drivers/nand_legacy/libnand_legacy.a added. Build breakage for NETTA.ERR and NETTA_ISDN - will go away when the new NAND support is implemented for these boards.master
Bartlomiej Sieka
19 years ago
parent
038ccac511
commit
addb2e1650
File diff suppressed because it is too large
Load Diff
@ -1,364 +0,0 @@ |
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#include <common.h> |
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|
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#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined CONFIG_NEW_NAND_CODE |
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|
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#include <command.h> |
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#include <watchdog.h> |
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#include <malloc.h> |
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#include <asm/byteorder.h> |
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|
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#ifdef CONFIG_SHOW_BOOT_PROGRESS |
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# include <status_led.h> |
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# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg) |
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#else |
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# define SHOW_BOOT_PROGRESS(arg) |
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#endif |
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|
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#include <jffs2/jffs2.h> |
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#include <nand.h> |
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|
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extern nand_info_t nand_info[]; /* info for NAND chips */ |
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|
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static int nand_dump_oob(nand_info_t *nand, ulong off) |
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{ |
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return 0; |
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} |
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|
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static int nand_dump(nand_info_t *nand, ulong off) |
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{ |
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int i; |
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u_char *buf, *p; |
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|
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buf = malloc(nand->oobblock + nand->oobsize); |
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if (!buf) { |
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puts("No memory for page buffer\n"); |
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return 1; |
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} |
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off &= ~(nand->oobblock - 1); |
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i = nand_read_raw(nand, buf, off, nand->oobblock, nand->oobsize); |
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if (i < 0) { |
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printf("Error (%d) reading page %08x\n", i, off); |
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free(buf); |
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return 1; |
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} |
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printf("Page %08x dump:\n", off); |
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i = nand->oobblock >> 4; p = buf; |
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while (i--) { |
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printf( "\t%02x %02x %02x %02x %02x %02x %02x %02x" |
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" %02x %02x %02x %02x %02x %02x %02x %02x\n", |
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p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], |
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p[8], p[9], p[10], p[11], p[12], p[13], p[14], p[15]); |
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p += 16; |
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} |
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puts("OOB:\n"); |
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i = nand->oobsize >> 3; |
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while (i--) { |
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printf( "\t%02x %02x %02x %02x %02x %02x %02x %02x\n", |
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p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7]); |
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p += 8; |
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} |
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free(buf); |
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return 0; |
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} |
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|
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/* ------------------------------------------------------------------------- */ |
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|
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static void |
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arg_off_size(int argc, char *argv[], ulong *off, ulong *size, ulong totsize) |
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{ |
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*off = 0; |
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*size = 0; |
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|
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#if defined(CONFIG_JFFS2_NAND) && defined(CFG_JFFS_CUSTOM_PART) |
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if (argc >= 1 && strcmp(argv[0], "partition") == 0) { |
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int part_num; |
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struct part_info *part; |
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const char *partstr; |
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if (argc >= 2) |
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partstr = argv[1]; |
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else |
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partstr = getenv("partition"); |
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|
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if (partstr) |
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part_num = (int)simple_strtoul(partstr, NULL, 10); |
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else |
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part_num = 0; |
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part = jffs2_part_info(part_num); |
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if (part == NULL) { |
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printf("\nInvalid partition %d\n", part_num); |
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return; |
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} |
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*size = part->size; |
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*off = (ulong)part->offset; |
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} else |
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#endif |
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{ |
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if (argc >= 1) |
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*off = (ulong)simple_strtoul(argv[0], NULL, 16); |
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else |
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*off = 0; |
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|
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if (argc >= 2) |
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*size = (ulong)simple_strtoul(argv[1], NULL, 16); |
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else |
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*size = totsize - *off; |
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} |
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|
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} |
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|
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int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) |
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{ |
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int i, dev, ret; |
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ulong addr, off, size; |
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char *cmd, *s; |
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nand_info_t *nand; |
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/* at least two arguments please */ |
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if (argc < 2) |
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goto usage; |
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cmd = argv[1]; |
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if (strcmp(cmd, "info") == 0) { |
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putc('\n'); |
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for (i = 0; i < CFG_MAX_NAND_DEVICE; i++) { |
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if (nand_info[i].name) |
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printf("Device %d: %s\n", i, nand_info[i].name); |
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} |
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return 0; |
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} |
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if (strcmp(cmd, "device") == 0) { |
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|
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if (argc < 3) { |
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if ((nand_curr_device < 0) || |
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(nand_curr_device >= CFG_MAX_NAND_DEVICE)) |
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puts("\nno devices available\n"); |
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else |
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printf("\nDevice %d: %s\n", nand_curr_device, |
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nand_info[nand_curr_device].name); |
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return 0; |
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} |
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dev = (int)simple_strtoul(argv[2], NULL, 10); |
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if (dev < 0 || dev >= CFG_MAX_NAND_DEVICE || !nand_info[dev].name) { |
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puts("No such device\n"); |
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return 1; |
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} |
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printf("Device %d: %s", dev, nand_info[dev].name); |
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puts("... is now current device\n"); |
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nand_curr_device = dev; |
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return 0; |
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} |
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if (strcmp(cmd, "bad") != 0 && strcmp(cmd, "erase") != 0 && |
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strncmp(cmd, "dump", 4) != 0 && |
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strncmp(cmd, "read", 4) != 0 && strncmp(cmd, "write", 5) != 0) |
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goto usage; |
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/* the following commands operate on the current device */ |
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if (nand_curr_device < 0 || nand_curr_device >= CFG_MAX_NAND_DEVICE || |
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!nand_info[nand_curr_device].name) { |
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puts("\nno devices available\n"); |
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return 1; |
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} |
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nand = &nand_info[nand_curr_device]; |
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if (strcmp(cmd, "bad") == 0) { |
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printf("\nDevice %d bad blocks:\n", nand_curr_device); |
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for (off = 0; off < nand->size; off += nand->erasesize) |
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if (nand_block_isbad(nand, off)) |
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printf(" %08x\n", off); |
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return 0; |
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} |
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if (strcmp(cmd, "erase") == 0) { |
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arg_off_size(argc - 2, argv + 2, &off, &size, nand->size); |
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if (off == 0 && size == 0) |
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return 1; |
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printf("\nNAND erase: device %d offset 0x%x, size 0x%x ", |
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nand_curr_device, off, size); |
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ret = nand_erase(nand, off, size); |
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printf("%s\n", ret ? "ERROR" : "OK"); |
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return ret == 0 ? 0 : 1; |
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} |
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if (strncmp(cmd, "dump", 4) == 0) { |
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if (argc < 3) |
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goto usage; |
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s = strchr(cmd, '.'); |
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off = (int)simple_strtoul(argv[2], NULL, 16); |
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if (s != NULL && strcmp(s, ".oob") == 0) |
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ret = nand_dump_oob(nand, off); |
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else |
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ret = nand_dump(nand, off); |
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return ret == 0 ? 1 : 0; |
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} |
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/* read write */ |
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if (strncmp(cmd, "read", 4) == 0 || strncmp(cmd, "write", 5) == 0) { |
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if (argc < 4) |
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goto usage; |
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/*
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s = strchr(cmd, '.'); |
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clean = CLEAN_NONE; |
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if (s != NULL) { |
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if (strcmp(s, ".jffs2") == 0 || strcmp(s, ".e") == 0 |
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|| strcmp(s, ".i")) |
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clean = CLEAN_JFFS2; |
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} |
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*/ |
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addr = (ulong)simple_strtoul(argv[2], NULL, 16); |
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arg_off_size(argc - 3, argv + 3, &off, &size, nand->size); |
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if (off == 0 && size == 0) |
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return 1; |
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i = strncmp(cmd, "read", 4) == 0; /* 1 = read, 0 = write */ |
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printf("\nNAND %s: device %d offset %u, size %u ... ", |
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i ? "read" : "write", nand_curr_device, off, size); |
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if (i) |
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ret = nand_read(nand, off, &size, (u_char *)addr); |
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else |
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ret = nand_write(nand, off, &size, (u_char *)addr); |
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printf(" %d bytes %s: %s\n", size, |
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i ? "read" : "written", ret ? "ERROR" : "OK"); |
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return ret == 0 ? 0 : 1; |
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} |
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usage: |
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printf("Usage:\n%s\n", cmdtp->usage); |
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return 1; |
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} |
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|
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U_BOOT_CMD(nand, 5, 1, do_nand, |
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"nand - NAND sub-system\n", |
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"info - show available NAND devices\n" |
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"nand device [dev] - show or set current device\n" |
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"nand read[.jffs2] - addr off size\n" |
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"nand write[.jffs2] - addr off size - read/write `size' bytes starting\n" |
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" at offset `off' to/from memory address `addr'\n" |
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"nand erase [clean] [off size] - erase `size' bytes from\n" |
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" offset `off' (entire device if not specified)\n" |
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"nand bad - show bad blocks\n" |
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"nand dump[.oob] off - dump page\n" |
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"nand scrub - really clean NAND erasing bad blocks (UNSAFE)\n" |
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"nand markbad off - mark bad block at offset (UNSAFE)\n" |
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"nand biterr off - make a bit error at offset (UNSAFE)\n"); |
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int do_nandboot(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) |
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{ |
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char *boot_device = NULL; |
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char *ep; |
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int dev; |
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int r; |
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ulong addr, cnt, offset = 0; |
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image_header_t *hdr; |
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nand_info_t *nand; |
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switch (argc) { |
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case 1: |
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addr = CFG_LOAD_ADDR; |
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boot_device = getenv("bootdevice"); |
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break; |
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case 2: |
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addr = simple_strtoul(argv[1], NULL, 16); |
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boot_device = getenv("bootdevice"); |
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break; |
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case 3: |
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addr = simple_strtoul(argv[1], NULL, 16); |
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boot_device = argv[2]; |
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break; |
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case 4: |
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addr = simple_strtoul(argv[1], NULL, 16); |
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boot_device = argv[2]; |
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offset = simple_strtoul(argv[3], NULL, 16); |
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break; |
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default: |
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printf("Usage:\n%s\n", cmdtp->usage); |
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SHOW_BOOT_PROGRESS(-1); |
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return 1; |
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} |
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if (!boot_device) { |
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puts("\n** No boot device **\n"); |
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SHOW_BOOT_PROGRESS(-1); |
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return 1; |
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} |
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dev = simple_strtoul(boot_device, &ep, 16); |
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if (dev < 0 || dev >= CFG_MAX_NAND_DEVICE || !nand_info[dev].name) { |
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printf("\n** Device %d not available\n", dev); |
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SHOW_BOOT_PROGRESS(-1); |
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return 1; |
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} |
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nand = &nand_info[dev]; |
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printf("\nLoading from device %d: %s (offset 0x%lx)\n", |
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dev, nand->name, offset); |
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cnt = nand->oobblock; |
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r = nand_read(nand, offset, &cnt, (u_char *) addr); |
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if (r) { |
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printf("** Read error on %d\n", dev); |
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SHOW_BOOT_PROGRESS(-1); |
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return 1; |
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} |
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hdr = (image_header_t *) addr; |
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if (ntohl(hdr->ih_magic) != IH_MAGIC) { |
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printf("\n** Bad Magic Number 0x%x **\n", hdr->ih_magic); |
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SHOW_BOOT_PROGRESS(-1); |
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return 1; |
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} |
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|
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print_image_hdr(hdr); |
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|
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cnt = (ntohl(hdr->ih_size) + sizeof (image_header_t)); |
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|
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r = nand_read(nand, offset, &cnt, (u_char *) addr); |
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if (r) { |
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printf("** Read error on %d\n", dev); |
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SHOW_BOOT_PROGRESS(-1); |
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return 1; |
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} |
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|
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/* Loading ok, update default load address */ |
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|
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load_addr = addr; |
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|
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/* Check if we should attempt an auto-start */ |
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if (((ep = getenv("autostart")) != NULL) && (strcmp(ep, "yes") == 0)) { |
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char *local_args[2]; |
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extern int do_bootm(cmd_tbl_t *, int, int, char *[]); |
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|
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local_args[0] = argv[0]; |
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local_args[1] = NULL; |
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|
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printf("Automatic boot of image at addr 0x%08lx ...\n", addr); |
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|
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do_bootm(cmdtp, 0, 1, local_args); |
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return 1; |
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} |
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return 0; |
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} |
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|
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U_BOOT_CMD(nboot, 4, 1, do_nandboot, |
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"nboot - boot from NAND device\n", "loadAddr dev\n"); |
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|
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|
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#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */ |
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@ -0,0 +1,16 @@ |
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include $(TOPDIR)/config.mk |
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|
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LIB := libnand_legacy.a
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|
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OBJS := nand_legacy.o
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all: $(LIB) |
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|
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$(LIB): $(OBJS) |
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$(AR) crv $@ $(OBJS)
|
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|
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#########################################################################
|
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|
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.depend: Makefile $(OBJS:.o=.c) |
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$(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@
|
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|
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sinclude .depend |
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File diff suppressed because it is too large
Load Diff
@ -0,0 +1,203 @@ |
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/*
|
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* linux/include/linux/mtd/nand.h |
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* |
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* Copyright (c) 2000 David Woodhouse <dwmw2@mvhi.com> |
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* Steven J. Hill <sjhill@cotw.com> |
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* Thomas Gleixner <gleixner@autronix.de> |
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* |
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* $Id: nand.h,v 1.7 2003/07/24 23:30:46 a0384864 Exp $ |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License version 2 as |
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* published by the Free Software Foundation. |
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* |
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* Info: |
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* Contains standard defines and IDs for NAND flash devices |
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* |
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* Changelog: |
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* 01-31-2000 DMW Created |
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* 09-18-2000 SJH Moved structure out of the Disk-On-Chip drivers |
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* so it can be used by other NAND flash device |
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* drivers. I also changed the copyright since none |
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* of the original contents of this file are specific |
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* to DoC devices. David can whack me with a baseball |
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* bat later if I did something naughty. |
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* 10-11-2000 SJH Added private NAND flash structure for driver |
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* 10-24-2000 SJH Added prototype for 'nand_scan' function |
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* 10-29-2001 TG changed nand_chip structure to support |
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* hardwarespecific function for accessing control lines |
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* 02-21-2002 TG added support for different read/write adress and |
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* ready/busy line access function |
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* 02-26-2002 TG added chip_delay to nand_chip structure to optimize |
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* command delay times for different chips |
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* 04-28-2002 TG OOB config defines moved from nand.c to avoid duplicate |
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* defines in jffs2/wbuf.c |
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*/ |
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#ifndef __LINUX_MTD_NAND_LEGACY_H |
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#define __LINUX_MTD_NAND_LEGACY_H |
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|
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#ifndef CFG_NAND_LEGACY |
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#error This module is for the legacy NAND support |
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#endif |
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|
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/*
|
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* Standard NAND flash commands |
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*/ |
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#define NAND_CMD_READ0 0 |
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#define NAND_CMD_READ1 1 |
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#define NAND_CMD_PAGEPROG 0x10 |
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#define NAND_CMD_READOOB 0x50 |
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#define NAND_CMD_ERASE1 0x60 |
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#define NAND_CMD_STATUS 0x70 |
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#define NAND_CMD_SEQIN 0x80 |
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#define NAND_CMD_READID 0x90 |
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#define NAND_CMD_ERASE2 0xd0 |
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#define NAND_CMD_RESET 0xff |
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|
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/*
|
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* Enumeration for NAND flash chip state |
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*/ |
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typedef enum { |
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FL_READY, |
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FL_READING, |
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FL_WRITING, |
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FL_ERASING, |
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FL_SYNCING |
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} nand_state_t; |
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|
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|
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/*
|
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* NAND Private Flash Chip Data |
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* |
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* Structure overview: |
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* |
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* IO_ADDR - address to access the 8 I/O lines of the flash device |
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* |
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* hwcontrol - hardwarespecific function for accesing control-lines |
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* |
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* dev_ready - hardwarespecific function for accesing device ready/busy line |
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* |
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* chip_lock - spinlock used to protect access to this structure |
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* |
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* wq - wait queue to sleep on if a NAND operation is in progress |
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* |
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* state - give the current state of the NAND device |
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* |
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* page_shift - number of address bits in a page (column address bits) |
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* |
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* data_buf - data buffer passed to/from MTD user modules |
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* |
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* data_cache - data cache for redundant page access and shadow for |
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* ECC failure |
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* |
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* ecc_code_buf - used only for holding calculated or read ECCs for |
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* a page read or written when ECC is in use |
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* |
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* reserved - padding to make structure fall on word boundary if |
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* when ECC is in use |
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*/ |
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struct Nand { |
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char floor, chip; |
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unsigned long curadr; |
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unsigned char curmode; |
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/* Also some erase/write/pipeline info when we get that far */ |
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}; |
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|
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struct nand_chip { |
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int page_shift; |
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u_char *data_buf; |
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u_char *data_cache; |
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int cache_page; |
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u_char ecc_code_buf[6]; |
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u_char reserved[2]; |
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char ChipID; /* Type of DiskOnChip */ |
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struct Nand *chips; |
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int chipshift; |
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char* chips_name; |
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unsigned long erasesize; |
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unsigned long mfr; /* Flash IDs - only one type of flash per device */ |
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unsigned long id; |
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char* name; |
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int numchips; |
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char page256; |
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char pageadrlen; |
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unsigned long IO_ADDR; /* address to access the 8 I/O lines to the flash device */ |
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unsigned long totlen; |
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uint oobblock; /* Size of OOB blocks (e.g. 512) */ |
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uint oobsize; /* Amount of OOB data per block (e.g. 16) */ |
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uint eccsize; |
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int bus16; |
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}; |
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|
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/*
|
||||
* NAND Flash Manufacturer ID Codes |
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*/ |
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#define NAND_MFR_TOSHIBA 0x98 |
||||
#define NAND_MFR_SAMSUNG 0xec |
||||
|
||||
/*
|
||||
* NAND Flash Device ID Structure |
||||
* |
||||
* Structure overview: |
||||
* |
||||
* name - Complete name of device |
||||
* |
||||
* manufacture_id - manufacturer ID code of device. |
||||
* |
||||
* model_id - model ID code of device. |
||||
* |
||||
* chipshift - total number of address bits for the device which |
||||
* is used to calculate address offsets and the total |
||||
* number of bytes the device is capable of. |
||||
* |
||||
* page256 - denotes if flash device has 256 byte pages or not. |
||||
* |
||||
* pageadrlen - number of bytes minus one needed to hold the |
||||
* complete address into the flash array. Keep in |
||||
* mind that when a read or write is done to a |
||||
* specific address, the address is input serially |
||||
* 8 bits at a time. This structure member is used |
||||
* by the read/write routines as a loop index for |
||||
* shifting the address out 8 bits at a time. |
||||
* |
||||
* erasesize - size of an erase block in the flash device. |
||||
*/ |
||||
struct nand_flash_dev { |
||||
char * name; |
||||
int manufacture_id; |
||||
int model_id; |
||||
int chipshift; |
||||
char page256; |
||||
char pageadrlen; |
||||
unsigned long erasesize; |
||||
int bus16; |
||||
}; |
||||
|
||||
/*
|
||||
* Constants for oob configuration |
||||
*/ |
||||
#define NAND_NOOB_ECCPOS0 0 |
||||
#define NAND_NOOB_ECCPOS1 1 |
||||
#define NAND_NOOB_ECCPOS2 2 |
||||
#define NAND_NOOB_ECCPOS3 3 |
||||
#define NAND_NOOB_ECCPOS4 6 |
||||
#define NAND_NOOB_ECCPOS5 7 |
||||
#define NAND_NOOB_BADBPOS -1 |
||||
#define NAND_NOOB_ECCVPOS -1 |
||||
|
||||
#define NAND_JFFS2_OOB_ECCPOS0 0 |
||||
#define NAND_JFFS2_OOB_ECCPOS1 1 |
||||
#define NAND_JFFS2_OOB_ECCPOS2 2 |
||||
#define NAND_JFFS2_OOB_ECCPOS3 3 |
||||
#define NAND_JFFS2_OOB_ECCPOS4 6 |
||||
#define NAND_JFFS2_OOB_ECCPOS5 7 |
||||
#define NAND_JFFS2_OOB_BADBPOS 5 |
||||
#define NAND_JFFS2_OOB_ECCVPOS 4 |
||||
|
||||
#define NAND_JFFS2_OOB8_FSDAPOS 6 |
||||
#define NAND_JFFS2_OOB16_FSDAPOS 8 |
||||
#define NAND_JFFS2_OOB8_FSDALEN 2 |
||||
#define NAND_JFFS2_OOB16_FSDALEN 8 |
||||
|
||||
unsigned long nand_probe(unsigned long physadr); |
||||
#endif /* __LINUX_MTD_NAND_LEGACY_H */ |
||||
@ -1,469 +0,0 @@ |
||||
/*
|
||||
* linux/include/linux/mtd/nand.h |
||||
* |
||||
* Copyright (c) 2000 David Woodhouse <dwmw2@mvhi.com> |
||||
* Steven J. Hill <sjhill@realitydiluted.com> |
||||
* Thomas Gleixner <tglx@linutronix.de> |
||||
* |
||||
* $Id: nand.h,v 1.68 2004/11/12 10:40:37 gleixner Exp $ |
||||
* |
||||
* This program is free software; you can redistribute it and/or modify |
||||
* it under the terms of the GNU General Public License version 2 as |
||||
* published by the Free Software Foundation. |
||||
* |
||||
* Info: |
||||
* Contains standard defines and IDs for NAND flash devices |
||||
* |
||||
* Changelog: |
||||
* 01-31-2000 DMW Created |
||||
* 09-18-2000 SJH Moved structure out of the Disk-On-Chip drivers |
||||
* so it can be used by other NAND flash device |
||||
* drivers. I also changed the copyright since none |
||||
* of the original contents of this file are specific |
||||
* to DoC devices. David can whack me with a baseball |
||||
* bat later if I did something naughty. |
||||
* 10-11-2000 SJH Added private NAND flash structure for driver |
||||
* 10-24-2000 SJH Added prototype for 'nand_scan' function |
||||
* 10-29-2001 TG changed nand_chip structure to support |
||||
* hardwarespecific function for accessing control lines |
||||
* 02-21-2002 TG added support for different read/write adress and |
||||
* ready/busy line access function |
||||
* 02-26-2002 TG added chip_delay to nand_chip structure to optimize |
||||
* command delay times for different chips |
||||
* 04-28-2002 TG OOB config defines moved from nand.c to avoid duplicate |
||||
* defines in jffs2/wbuf.c |
||||
* 08-07-2002 TG forced bad block location to byte 5 of OOB, even if |
||||
* CONFIG_MTD_NAND_ECC_JFFS2 is not set |
||||
* 08-10-2002 TG extensions to nand_chip structure to support HW-ECC |
||||
* |
||||
* 08-29-2002 tglx nand_chip structure: data_poi for selecting |
||||
* internal / fs-driver buffer |
||||
* support for 6byte/512byte hardware ECC |
||||
* read_ecc, write_ecc extended for different oob-layout |
||||
* oob layout selections: NAND_NONE_OOB, NAND_JFFS2_OOB, |
||||
* NAND_YAFFS_OOB |
||||
* 11-25-2002 tglx Added Manufacturer code FUJITSU, NATIONAL |
||||
* Split manufacturer and device ID structures |
||||
* |
||||
* 02-08-2004 tglx added option field to nand structure for chip anomalities |
||||
* 05-25-2004 tglx added bad block table support, ST-MICRO manufacturer id |
||||
* update of nand_chip structure description |
||||
*/ |
||||
#ifndef __LINUX_MTD_NAND_NEW_H |
||||
#define __LINUX_MTD_NAND_NEW_H |
||||
|
||||
#include <linux/mtd/compat.h> |
||||
#include <linux/mtd/mtd.h> |
||||
|
||||
struct mtd_info; |
||||
/* Scan and identify a NAND device */ |
||||
extern int nand_scan (struct mtd_info *mtd, int max_chips); |
||||
/* Free resources held by the NAND device */ |
||||
extern void nand_release (struct mtd_info *mtd); |
||||
|
||||
/* Read raw data from the device without ECC */ |
||||
extern int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_t len, size_t ooblen); |
||||
|
||||
|
||||
|
||||
/* This constant declares the max. oobsize / page, which
|
||||
* is supported now. If you add a chip with bigger oobsize/page |
||||
* adjust this accordingly. |
||||
*/ |
||||
#define NAND_MAX_OOBSIZE 64 |
||||
|
||||
/*
|
||||
* Constants for hardware specific CLE/ALE/NCE function |
||||
*/ |
||||
/* Select the chip by setting nCE to low */ |
||||
#define NAND_CTL_SETNCE 1 |
||||
/* Deselect the chip by setting nCE to high */ |
||||
#define NAND_CTL_CLRNCE 2 |
||||
/* Select the command latch by setting CLE to high */ |
||||
#define NAND_CTL_SETCLE 3 |
||||
/* Deselect the command latch by setting CLE to low */ |
||||
#define NAND_CTL_CLRCLE 4 |
||||
/* Select the address latch by setting ALE to high */ |
||||
#define NAND_CTL_SETALE 5 |
||||
/* Deselect the address latch by setting ALE to low */ |
||||
#define NAND_CTL_CLRALE 6 |
||||
/* Set write protection by setting WP to high. Not used! */ |
||||
#define NAND_CTL_SETWP 7 |
||||
/* Clear write protection by setting WP to low. Not used! */ |
||||
#define NAND_CTL_CLRWP 8 |
||||
|
||||
/*
|
||||
* Standard NAND flash commands |
||||
*/ |
||||
#define NAND_CMD_READ0 0 |
||||
#define NAND_CMD_READ1 1 |
||||
#define NAND_CMD_PAGEPROG 0x10 |
||||
#define NAND_CMD_READOOB 0x50 |
||||
#define NAND_CMD_ERASE1 0x60 |
||||
#define NAND_CMD_STATUS 0x70 |
||||
#define NAND_CMD_STATUS_MULTI 0x71 |
||||
#define NAND_CMD_SEQIN 0x80 |
||||
#define NAND_CMD_READID 0x90 |
||||
#define NAND_CMD_ERASE2 0xd0 |
||||
#define NAND_CMD_RESET 0xff |
||||
|
||||
/* Extended commands for large page devices */ |
||||
#define NAND_CMD_READSTART 0x30 |
||||
#define NAND_CMD_CACHEDPROG 0x15 |
||||
|
||||
/* Status bits */ |
||||
#define NAND_STATUS_FAIL 0x01 |
||||
#define NAND_STATUS_FAIL_N1 0x02 |
||||
#define NAND_STATUS_TRUE_READY 0x20 |
||||
#define NAND_STATUS_READY 0x40 |
||||
#define NAND_STATUS_WP 0x80 |
||||
|
||||
/*
|
||||
* Constants for ECC_MODES |
||||
*/ |
||||
|
||||
/* No ECC. Usage is not recommended ! */ |
||||
#define NAND_ECC_NONE 0 |
||||
/* Software ECC 3 byte ECC per 256 Byte data */ |
||||
#define NAND_ECC_SOFT 1 |
||||
/* Hardware ECC 3 byte ECC per 256 Byte data */ |
||||
#define NAND_ECC_HW3_256 2 |
||||
/* Hardware ECC 3 byte ECC per 512 Byte data */ |
||||
#define NAND_ECC_HW3_512 3 |
||||
/* Hardware ECC 3 byte ECC per 512 Byte data */ |
||||
#define NAND_ECC_HW6_512 4 |
||||
/* Hardware ECC 8 byte ECC per 512 Byte data */ |
||||
#define NAND_ECC_HW8_512 6 |
||||
/* Hardware ECC 12 byte ECC per 2048 Byte data */ |
||||
#define NAND_ECC_HW12_2048 7 |
||||
|
||||
/*
|
||||
* Constants for Hardware ECC |
||||
*/ |
||||
/* Reset Hardware ECC for read */ |
||||
#define NAND_ECC_READ 0 |
||||
/* Reset Hardware ECC for write */ |
||||
#define NAND_ECC_WRITE 1 |
||||
/* Enable Hardware ECC before syndrom is read back from flash */ |
||||
#define NAND_ECC_READSYN 2 |
||||
|
||||
/* Option constants for bizarre disfunctionality and real
|
||||
* features |
||||
*/ |
||||
/* Chip can not auto increment pages */ |
||||
#define NAND_NO_AUTOINCR 0x00000001 |
||||
/* Buswitdh is 16 bit */ |
||||
#define NAND_BUSWIDTH_16 0x00000002 |
||||
/* Device supports partial programming without padding */ |
||||
#define NAND_NO_PADDING 0x00000004 |
||||
/* Chip has cache program function */ |
||||
#define NAND_CACHEPRG 0x00000008 |
||||
/* Chip has copy back function */ |
||||
#define NAND_COPYBACK 0x00000010 |
||||
/* AND Chip which has 4 banks and a confusing page / block
|
||||
* assignment. See Renesas datasheet for further information */ |
||||
#define NAND_IS_AND 0x00000020 |
||||
/* Chip has a array of 4 pages which can be read without
|
||||
* additional ready /busy waits */ |
||||
#define NAND_4PAGE_ARRAY 0x00000040 |
||||
|
||||
/* Options valid for Samsung large page devices */ |
||||
#define NAND_SAMSUNG_LP_OPTIONS \ |
||||
(NAND_NO_PADDING | NAND_CACHEPRG | NAND_COPYBACK) |
||||
|
||||
/* Macros to identify the above */ |
||||
#define NAND_CANAUTOINCR(chip) (!(chip->options & NAND_NO_AUTOINCR)) |
||||
#define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING)) |
||||
#define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG)) |
||||
#define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK)) |
||||
|
||||
/* Mask to zero out the chip options, which come from the id table */ |
||||
#define NAND_CHIPOPTIONS_MSK (0x0000ffff & ~NAND_NO_AUTOINCR) |
||||
|
||||
/* Non chip related options */ |
||||
/* Use a flash based bad block table. This option is passed to the
|
||||
* default bad block table function. */ |
||||
#define NAND_USE_FLASH_BBT 0x00010000 |
||||
/* The hw ecc generator provides a syndrome instead a ecc value on read
|
||||
* This can only work if we have the ecc bytes directly behind the |
||||
* data bytes. Applies for DOC and AG-AND Renesas HW Reed Solomon generators */ |
||||
#define NAND_HWECC_SYNDROME 0x00020000 |
||||
|
||||
|
||||
/* Options set by nand scan */ |
||||
/* Nand scan has allocated oob_buf */ |
||||
#define NAND_OOBBUF_ALLOC 0x40000000 |
||||
/* Nand scan has allocated data_buf */ |
||||
#define NAND_DATABUF_ALLOC 0x80000000 |
||||
|
||||
|
||||
/*
|
||||
* nand_state_t - chip states |
||||
* Enumeration for NAND flash chip state |
||||
*/ |
||||
typedef enum { |
||||
FL_READY, |
||||
FL_READING, |
||||
FL_WRITING, |
||||
FL_ERASING, |
||||
FL_SYNCING, |
||||
FL_CACHEDPRG, |
||||
} nand_state_t; |
||||
|
||||
/* Keep gcc happy */ |
||||
struct nand_chip; |
||||
|
||||
#if 0 |
||||
/**
|
||||
* struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independend devices |
||||
* @lock: protection lock |
||||
* @active: the mtd device which holds the controller currently |
||||
*/ |
||||
struct nand_hw_control { |
||||
spinlock_t lock; |
||||
struct nand_chip *active; |
||||
}; |
||||
#endif |
||||
|
||||
/**
|
||||
* struct nand_chip - NAND Private Flash Chip Data |
||||
* @IO_ADDR_R: [BOARDSPECIFIC] address to read the 8 I/O lines of the flash device |
||||
* @IO_ADDR_W: [BOARDSPECIFIC] address to write the 8 I/O lines of the flash device |
||||
* @read_byte: [REPLACEABLE] read one byte from the chip |
||||
* @write_byte: [REPLACEABLE] write one byte to the chip |
||||
* @read_word: [REPLACEABLE] read one word from the chip |
||||
* @write_word: [REPLACEABLE] write one word to the chip |
||||
* @write_buf: [REPLACEABLE] write data from the buffer to the chip |
||||
* @read_buf: [REPLACEABLE] read data from the chip into the buffer |
||||
* @verify_buf: [REPLACEABLE] verify buffer contents against the chip data |
||||
* @select_chip: [REPLACEABLE] select chip nr |
||||
* @block_bad: [REPLACEABLE] check, if the block is bad |
||||
* @block_markbad: [REPLACEABLE] mark the block bad |
||||
* @hwcontrol: [BOARDSPECIFIC] hardwarespecific function for accesing control-lines |
||||
* @dev_ready: [BOARDSPECIFIC] hardwarespecific function for accesing device ready/busy line |
||||
* If set to NULL no access to ready/busy is available and the ready/busy information |
||||
* is read from the chip status register |
||||
* @cmdfunc: [REPLACEABLE] hardwarespecific function for writing commands to the chip |
||||
* @waitfunc: [REPLACEABLE] hardwarespecific function for wait on ready |
||||
* @calculate_ecc: [REPLACEABLE] function for ecc calculation or readback from ecc hardware |
||||
* @correct_data: [REPLACEABLE] function for ecc correction, matching to ecc generator (sw/hw) |
||||
* @enable_hwecc: [BOARDSPECIFIC] function to enable (reset) hardware ecc generator. Must only |
||||
* be provided if a hardware ECC is available |
||||
* @erase_cmd: [INTERN] erase command write function, selectable due to AND support |
||||
* @scan_bbt: [REPLACEABLE] function to scan bad block table |
||||
* @eccmode: [BOARDSPECIFIC] mode of ecc, see defines |
||||
* @eccsize: [INTERN] databytes used per ecc-calculation |
||||
* @eccbytes: [INTERN] number of ecc bytes per ecc-calculation step |
||||
* @eccsteps: [INTERN] number of ecc calculation steps per page |
||||
* @chip_delay: [BOARDSPECIFIC] chip dependent delay for transfering data from array to read regs (tR) |
||||
* @chip_lock: [INTERN] spinlock used to protect access to this structure and the chip |
||||
* @wq: [INTERN] wait queue to sleep on if a NAND operation is in progress |
||||
* @state: [INTERN] the current state of the NAND device |
||||
* @page_shift: [INTERN] number of address bits in a page (column address bits) |
||||
* @phys_erase_shift: [INTERN] number of address bits in a physical eraseblock |
||||
* @bbt_erase_shift: [INTERN] number of address bits in a bbt entry |
||||
* @chip_shift: [INTERN] number of address bits in one chip |
||||
* @data_buf: [INTERN] internal buffer for one page + oob |
||||
* @oob_buf: [INTERN] oob buffer for one eraseblock |
||||
* @oobdirty: [INTERN] indicates that oob_buf must be reinitialized |
||||
* @data_poi: [INTERN] pointer to a data buffer |
||||
* @options: [BOARDSPECIFIC] various chip options. They can partly be set to inform nand_scan about |
||||
* special functionality. See the defines for further explanation |
||||
* @badblockpos: [INTERN] position of the bad block marker in the oob area |
||||
* @numchips: [INTERN] number of physical chips |
||||
* @chipsize: [INTERN] the size of one chip for multichip arrays |
||||
* @pagemask: [INTERN] page number mask = number of (pages / chip) - 1 |
||||
* @pagebuf: [INTERN] holds the pagenumber which is currently in data_buf |
||||
* @autooob: [REPLACEABLE] the default (auto)placement scheme |
||||
* @bbt: [INTERN] bad block table pointer |
||||
* @bbt_td: [REPLACEABLE] bad block table descriptor for flash lookup |
||||
* @bbt_md: [REPLACEABLE] bad block table mirror descriptor |
||||
* @badblock_pattern: [REPLACEABLE] bad block scan pattern used for initial bad block scan |
||||
* @controller: [OPTIONAL] a pointer to a hardware controller structure which is shared among multiple independend devices |
||||
* @priv: [OPTIONAL] pointer to private chip date |
||||
*/ |
||||
|
||||
struct nand_chip { |
||||
void __iomem *IO_ADDR_R; |
||||
void __iomem *IO_ADDR_W; |
||||
|
||||
u_char (*read_byte)(struct mtd_info *mtd); |
||||
void (*write_byte)(struct mtd_info *mtd, u_char byte); |
||||
u16 (*read_word)(struct mtd_info *mtd); |
||||
void (*write_word)(struct mtd_info *mtd, u16 word); |
||||
|
||||
void (*write_buf)(struct mtd_info *mtd, const u_char *buf, int len); |
||||
void (*read_buf)(struct mtd_info *mtd, u_char *buf, int len); |
||||
int (*verify_buf)(struct mtd_info *mtd, const u_char *buf, int len); |
||||
void (*select_chip)(struct mtd_info *mtd, int chip); |
||||
int (*block_bad)(struct mtd_info *mtd, loff_t ofs, int getchip); |
||||
int (*block_markbad)(struct mtd_info *mtd, loff_t ofs); |
||||
void (*hwcontrol)(struct mtd_info *mtd, int cmd); |
||||
int (*dev_ready)(struct mtd_info *mtd); |
||||
void (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column, int page_addr); |
||||
int (*waitfunc)(struct mtd_info *mtd, struct nand_chip *this, int state); |
||||
int (*calculate_ecc)(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code); |
||||
int (*correct_data)(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc); |
||||
void (*enable_hwecc)(struct mtd_info *mtd, int mode); |
||||
void (*erase_cmd)(struct mtd_info *mtd, int page); |
||||
int (*scan_bbt)(struct mtd_info *mtd); |
||||
int eccmode; |
||||
int eccsize; |
||||
int eccbytes; |
||||
int eccsteps; |
||||
int chip_delay; |
||||
#if 0 |
||||
spinlock_t chip_lock; |
||||
wait_queue_head_t wq; |
||||
nand_state_t state; |
||||
#endif |
||||
int page_shift; |
||||
int phys_erase_shift; |
||||
int bbt_erase_shift; |
||||
int chip_shift; |
||||
u_char *data_buf; |
||||
u_char *oob_buf; |
||||
int oobdirty; |
||||
u_char *data_poi; |
||||
unsigned int options; |
||||
int badblockpos; |
||||
int numchips; |
||||
unsigned long chipsize; |
||||
int pagemask; |
||||
int pagebuf; |
||||
struct nand_oobinfo *autooob; |
||||
uint8_t *bbt; |
||||
struct nand_bbt_descr *bbt_td; |
||||
struct nand_bbt_descr *bbt_md; |
||||
struct nand_bbt_descr *badblock_pattern; |
||||
struct nand_hw_control *controller; |
||||
void *priv; |
||||
}; |
||||
|
||||
/*
|
||||
* NAND Flash Manufacturer ID Codes |
||||
*/ |
||||
#define NAND_MFR_TOSHIBA 0x98 |
||||
#define NAND_MFR_SAMSUNG 0xec |
||||
#define NAND_MFR_FUJITSU 0x04 |
||||
#define NAND_MFR_NATIONAL 0x8f |
||||
#define NAND_MFR_RENESAS 0x07 |
||||
#define NAND_MFR_STMICRO 0x20 |
||||
|
||||
/**
|
||||
* struct nand_flash_dev - NAND Flash Device ID Structure |
||||
* |
||||
* @name: Identify the device type |
||||
* @id: device ID code |
||||
* @pagesize: Pagesize in bytes. Either 256 or 512 or 0 |
||||
* If the pagesize is 0, then the real pagesize |
||||
* and the eraseize are determined from the |
||||
* extended id bytes in the chip |
||||
* @erasesize: Size of an erase block in the flash device. |
||||
* @chipsize: Total chipsize in Mega Bytes |
||||
* @options: Bitfield to store chip relevant options |
||||
*/ |
||||
struct nand_flash_dev { |
||||
char *name; |
||||
int id; |
||||
unsigned long pagesize; |
||||
unsigned long chipsize; |
||||
unsigned long erasesize; |
||||
unsigned long options; |
||||
}; |
||||
|
||||
/**
|
||||
* struct nand_manufacturers - NAND Flash Manufacturer ID Structure |
||||
* @name: Manufacturer name |
||||
* @id: manufacturer ID code of device. |
||||
*/ |
||||
struct nand_manufacturers { |
||||
int id; |
||||
char * name; |
||||
}; |
||||
|
||||
extern struct nand_flash_dev nand_flash_ids[]; |
||||
extern struct nand_manufacturers nand_manuf_ids[]; |
||||
|
||||
/**
|
||||
* struct nand_bbt_descr - bad block table descriptor |
||||
* @options: options for this descriptor |
||||
* @pages: the page(s) where we find the bbt, used with option BBT_ABSPAGE |
||||
* when bbt is searched, then we store the found bbts pages here. |
||||
* Its an array and supports up to 8 chips now |
||||
* @offs: offset of the pattern in the oob area of the page |
||||
* @veroffs: offset of the bbt version counter in the oob are of the page |
||||
* @version: version read from the bbt page during scan |
||||
* @len: length of the pattern, if 0 no pattern check is performed |
||||
* @maxblocks: maximum number of blocks to search for a bbt. This number of |
||||
* blocks is reserved at the end of the device where the tables are |
||||
* written. |
||||
* @reserved_block_code: if non-0, this pattern denotes a reserved (rather than |
||||
* bad) block in the stored bbt |
||||
* @pattern: pattern to identify bad block table or factory marked good / |
||||
* bad blocks, can be NULL, if len = 0 |
||||
* |
||||
* Descriptor for the bad block table marker and the descriptor for the |
||||
* pattern which identifies good and bad blocks. The assumption is made |
||||
* that the pattern and the version count are always located in the oob area |
||||
* of the first block. |
||||
*/ |
||||
struct nand_bbt_descr { |
||||
int options; |
||||
int pages[NAND_MAX_CHIPS]; |
||||
int offs; |
||||
int veroffs; |
||||
uint8_t version[NAND_MAX_CHIPS]; |
||||
int len; |
||||
int maxblocks; |
||||
int reserved_block_code; |
||||
uint8_t *pattern; |
||||
}; |
||||
|
||||
/* Options for the bad block table descriptors */ |
||||
|
||||
/* The number of bits used per block in the bbt on the device */ |
||||
#define NAND_BBT_NRBITS_MSK 0x0000000F |
||||
#define NAND_BBT_1BIT 0x00000001 |
||||
#define NAND_BBT_2BIT 0x00000002 |
||||
#define NAND_BBT_4BIT 0x00000004 |
||||
#define NAND_BBT_8BIT 0x00000008 |
||||
/* The bad block table is in the last good block of the device */ |
||||
#define NAND_BBT_LASTBLOCK 0x00000010 |
||||
/* The bbt is at the given page, else we must scan for the bbt */ |
||||
#define NAND_BBT_ABSPAGE 0x00000020 |
||||
/* The bbt is at the given page, else we must scan for the bbt */ |
||||
#define NAND_BBT_SEARCH 0x00000040 |
||||
/* bbt is stored per chip on multichip devices */ |
||||
#define NAND_BBT_PERCHIP 0x00000080 |
||||
/* bbt has a version counter at offset veroffs */ |
||||
#define NAND_BBT_VERSION 0x00000100 |
||||
/* Create a bbt if none axists */ |
||||
#define NAND_BBT_CREATE 0x00000200 |
||||
/* Search good / bad pattern through all pages of a block */ |
||||
#define NAND_BBT_SCANALLPAGES 0x00000400 |
||||
/* Scan block empty during good / bad block scan */ |
||||
#define NAND_BBT_SCANEMPTY 0x00000800 |
||||
/* Write bbt if neccecary */ |
||||
#define NAND_BBT_WRITE 0x00001000 |
||||
/* Read and write back block contents when writing bbt */ |
||||
#define NAND_BBT_SAVECONTENT 0x00002000 |
||||
/* Search good / bad pattern on the first and the second page */ |
||||
#define NAND_BBT_SCAN2NDPAGE 0x00004000 |
||||
|
||||
/* The maximum number of blocks to scan for a bbt */ |
||||
#define NAND_BBT_SCAN_MAXBLOCKS 4 |
||||
|
||||
extern int nand_scan_bbt (struct mtd_info *mtd, struct nand_bbt_descr *bd); |
||||
extern int nand_update_bbt (struct mtd_info *mtd, loff_t offs); |
||||
extern int nand_default_bbt (struct mtd_info *mtd); |
||||
extern int nand_isbad_bbt (struct mtd_info *mtd, loff_t offs, int allowbbt); |
||||
extern int nand_erase_nand (struct mtd_info *mtd, struct erase_info *instr, int allowbbt); |
||||
|
||||
/*
|
||||
* Constants for oob configuration |
||||
*/ |
||||
#define NAND_SMALL_BADBLOCK_POS 5 |
||||
#define NAND_LARGE_BADBLOCK_POS 0 |
||||
|
||||
#endif /* __LINUX_MTD_NAND_NEW_H */ |
||||
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Reference in new issue