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Merge with /home/hs/TQ/u-boot

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master
Wolfgang Denk 18 years ago
parent 389b6bb50f 07e82cb2e2
commit aea17f9927
3 changed files with 6 additions and 22 deletions
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  1. 2
      board/tqm8272/tqm8272.c
  2. 8
      cpu/mpc8260/cpu_init.c
  3. 18
      cpu/mpc8260/pci.c

2
board/tqm8272/tqm8272.c
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@ -768,7 +768,7 @@ int analyse_hwib (void)
p +=1; p +=1;
p +=1; /* connector */ p +=1; /* connector */
if (*p != '0') { if (*p != '0') {
hw->eeprom = 0x100 << (*p - 'A'); hw->eeprom = 0x1000 << (*p - 'A');
} }
p++; p++;

8
cpu/mpc8260/cpu_init.c
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@ -129,9 +129,9 @@ void cpu_init_f (volatile immap_t * immr)
/* BCR - Bus Configuration Register (4-25) */ /* BCR - Bus Configuration Register (4-25) */
#if defined(CFG_BCR_60x) && (CFG_BCR_SINGLE) #if defined(CFG_BCR_60x) && (CFG_BCR_SINGLE)
if (immr->im_siu_conf.sc_bcr & BCR_EBM) { if (immr->im_siu_conf.sc_bcr & BCR_EBM) {
immr->im_siu_conf.sc_bcr = CFG_BCR_60x; immr->im_siu_conf.sc_bcr = SET_VAL_MASK(immr->im_siu_conf.sc_bcr, CFG_BCR_60x, 0x80000010);
} else { } else {
immr->im_siu_conf.sc_bcr = CFG_BCR_SINGLE; immr->im_siu_conf.sc_bcr = SET_VAL_MASK(immr->im_siu_conf.sc_bcr, CFG_BCR_SINGLE, 0x80000010);
} }
#else #else
immr->im_siu_conf.sc_bcr = CFG_BCR; immr->im_siu_conf.sc_bcr = CFG_BCR;
@ -141,9 +141,9 @@ void cpu_init_f (volatile immap_t * immr)
#if defined(CFG_SIUMCR_LOW) && (CFG_SIUMCR_HIGH) #if defined(CFG_SIUMCR_LOW) && (CFG_SIUMCR_HIGH)
cpu_clk = board_get_cpu_clk_f (); cpu_clk = board_get_cpu_clk_f ();
if (cpu_clk >= 100000000) { if (cpu_clk >= 100000000) {
immr->im_siu_conf.sc_siumcr = CFG_SIUMCR_HIGH; immr->im_siu_conf.sc_siumcr = SET_VAL_MASK(immr->im_siu_conf.sc_siumcr, CFG_SIUMCR_HIGH, 0x9f3cc000);
} else { } else {
immr->im_siu_conf.sc_siumcr = CFG_SIUMCR_LOW; immr->im_siu_conf.sc_siumcr = SET_VAL_MASK(immr->im_siu_conf.sc_siumcr, CFG_SIUMCR_LOW, 0x9f3cc000);
} }
#else #else
immr->im_siu_conf.sc_siumcr = CFG_SIUMCR; immr->im_siu_conf.sc_siumcr = CFG_SIUMCR;

18
cpu/mpc8260/pci.c
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@ -275,22 +275,7 @@ void pci_mpc8250_init (struct pci_controller *hose)
| SIUMCR_BCTLC00 | SIUMCR_BCTLC00
| SIUMCR_MMR11; | SIUMCR_MMR11;
#elif defined(CONFIG_TQM8272) #elif defined(CONFIG_TQM8272)
#if 0 /* nothing to do for this Board here */
immap->im_siu_conf.sc_siumcr = (immap->im_siu_conf.sc_siumcr &
~SIUMCR_LBPC11 &
~SIUMCR_CS10PC11 &
~SIUMCR_LBPC11) |
SIUMCR_LBPC01 |
SIUMCR_CS10PC01 |
SIUMCR_APPC10;
#else
#if 0
immap->im_siu_conf.sc_siumcr = (immap->im_siu_conf.sc_siumcr |
SIUMCR_APPC10);
#else
immap->im_siu_conf.sc_siumcr = 0x88000000;
#endif
#endif
#else #else
/* /*
* Setting required to enable IRQ1-IRQ7 (SIUMCR [DPPC]), * Setting required to enable IRQ1-IRQ7 (SIUMCR [DPPC]),
@ -304,7 +289,6 @@ void pci_mpc8250_init (struct pci_controller *hose)
SIUMCR_CS10PC01 | SIUMCR_CS10PC01 |
SIUMCR_APPC10; SIUMCR_APPC10;
#endif #endif
printf("%s siumcr: %x\n", __FUNCTION__, immap->im_siu_conf.sc_siumcr);
/* Make PCI lowest priority */ /* Make PCI lowest priority */
/* Each 4 bits is a device bus request and the MS 4bits /* Each 4 bits is a device bus request and the MS 4bits

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