Michael Schwingen
17 years ago
committed by
Jean-Christophe PLAGNIOL-VILLARD
parent
ea99e8f05b
commit
aebf00fc4d
@ -0,0 +1,50 @@ |
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#
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# (C) Copyright 2000-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk |
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LIB = $(obj)lib$(BOARD).a
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COBJS := actux2.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS) |
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$(AR) $(ARFLAGS) $@ $(OBJS)
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clean: |
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rm -f $(SOBJS) $(OBJS)
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distclean: clean |
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rm -f $(LIB) core *.bak .depend
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk |
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sinclude $(obj).depend |
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#########################################################################
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@ -0,0 +1,134 @@ |
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/*
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* (C) Copyright 2007 |
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* Michael Schwingen, michael@schwingen.org |
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* |
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* (C) Copyright 2006 |
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* Stefan Roese, DENX Software Engineering, sr@denx.de. |
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* |
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* (C) Copyright 2002 |
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* Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net |
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* |
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* (C) Copyright 2002 |
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
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* Marius Groeger <mgroeger@sysgo.de> |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <command.h> |
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#include <malloc.h> |
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#include <asm/arch/ixp425.h> |
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#include <asm/io.h> |
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#include <miiphy.h> |
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#include "actux2_hw.h" |
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DECLARE_GLOBAL_DATA_PTR; |
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int board_init (void) |
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{ |
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gd->bd->bi_arch_number = MACH_TYPE_ACTUX2; |
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/* adress of boot parameters */ |
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gd->bd->bi_boot_params = 0x00000100; |
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GPIO_OUTPUT_ENABLE (CFG_GPIO_IORST); |
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GPIO_OUTPUT_ENABLE (CFG_GPIO_ETHRST); |
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GPIO_OUTPUT_ENABLE (CFG_GPIO_DSR); |
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GPIO_OUTPUT_ENABLE (CFG_GPIO_DCD); |
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GPIO_OUTPUT_CLEAR (CFG_GPIO_IORST); |
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GPIO_OUTPUT_CLEAR (CFG_GPIO_ETHRST); |
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GPIO_OUTPUT_CLEAR (CFG_GPIO_DSR); |
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GPIO_OUTPUT_SET (CFG_GPIO_DCD); |
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/* Setup GPIO's for Interrupt inputs */ |
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GPIO_OUTPUT_DISABLE (CFG_GPIO_DBGINT); |
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GPIO_OUTPUT_DISABLE (CFG_GPIO_ETHINT); |
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/* Setup GPIO's for 33MHz clock output */ |
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GPIO_OUTPUT_ENABLE (CFG_GPIO_PCI_CLK); |
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GPIO_OUTPUT_ENABLE (CFG_GPIO_EXTBUS_CLK); |
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*IXP425_GPIO_GPCLKR = 0x011001FF; |
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/* CS1: IPAC-X */ |
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*IXP425_EXP_CS1 = 0x94d10013; |
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/* CS5: Debug port */ |
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*IXP425_EXP_CS5 = 0x9d520003; |
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/* CS6: HW release register */ |
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*IXP425_EXP_CS6 = 0x81860001; |
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/* CS7: LEDs */ |
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*IXP425_EXP_CS7 = 0x80900003; |
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udelay (533); |
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GPIO_OUTPUT_SET (CFG_GPIO_IORST); |
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GPIO_OUTPUT_SET (CFG_GPIO_ETHRST); |
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ACTUX2_LED1 (1); |
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ACTUX2_LED2 (0); |
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ACTUX2_LED3 (0); |
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ACTUX2_LED4 (0); |
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return 0; |
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} |
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/*
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* Check Board Identity |
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*/ |
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int checkboard (void) |
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{ |
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char revision; |
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char *s = getenv ("serial#"); |
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puts ("Board: AcTux-2 rev."); |
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putc (ACTUX2_BOARDREL + 'A' - 1); |
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putc ('\n'); |
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return (0); |
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} |
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int dram_init (void) |
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{ |
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1; |
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; |
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return (0); |
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} |
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/*************************************************************************
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* get_board_rev() - setup to pass kernel board revision information |
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* 0 = reserved |
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* 1 = Rev. A |
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* 2 = Rev. B |
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*************************************************************************/ |
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u32 get_board_rev (void) |
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{ |
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return ACTUX2_BOARDREL; |
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} |
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void reset_phy (void) |
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{ |
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int i; |
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/* init IcPlus IP175C ethernet switch to native IP175C mode */ |
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miiphy_write ("NPE0", 29, 31, 0x175C); |
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} |
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@ -0,0 +1,59 @@ |
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/*
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* (C) Copyright 2007 |
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* Michael Schwingen, michael@schwingen.org |
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* |
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* hardware register definitions for the AcTux-2 board. |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#ifndef _ACTUX2_HW_H |
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#define _ACTUX2_HW_H |
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/* 0 = LED off,1 = green, 2 = red, 3 = orange */ |
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#define ACTUX2_LED1(a) writeb((a ? 2 : 0), IXP425_EXP_BUS_CS7_BASE_PHYS + 0) |
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#define ACTUX2_LED2(a) writeb((a ? 2 : 0), IXP425_EXP_BUS_CS7_BASE_PHYS + 1) |
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#define ACTUX2_LED3(a) writeb((a ? 0 : 2), IXP425_EXP_BUS_CS7_BASE_PHYS + 2) |
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#define ACTUX2_LED4(a) writeb((a ? 0 : 2), IXP425_EXP_BUS_CS7_BASE_PHYS + 3) |
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#define ACTUX2_DBG_PORT IXP425_EXP_BUS_CS5_BASE_PHYS |
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#define ACTUX2_BOARDREL (readb(IXP425_EXP_BUS_CS6_BASE_PHYS) & 0x0F) |
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#define ACTUX2_OPTION (readb(IXP425_EXP_BUS_CS6_BASE_PHYS) & 0xF0) |
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/*
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* GPIO settings |
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*/ |
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#define CFG_GPIO_DBGINT 0 |
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#define CFG_GPIO_ETHINT 1 |
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#define CFG_GPIO_ETHRST 2 /* Out */ |
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#define CFG_GPIO_LED5_GN 3 /* Out */ |
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#define CFG_GPIO_UNUSED4 4 |
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#define CFG_GPIO_UNUSED5 5 |
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#define CFG_GPIO_DSR 6 /* Out */ |
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#define CFG_GPIO_DCD 7 /* Out */ |
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#define CFG_GPIO_IPAC_INT 8 |
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#define CFG_GPIO_DBGJUMPER 9 |
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#define CFG_GPIO_BUTTON1 10 |
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#define CFG_GPIO_DBGSENSE 11 |
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#define CFG_GPIO_DTR 12 |
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#define CFG_GPIO_IORST 13 /* Out */ |
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#define CFG_GPIO_PCI_CLK 14 /* Out */ |
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#define CFG_GPIO_EXTBUS_CLK 15 /* Out */ |
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#endif |
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@ -0,0 +1,4 @@ |
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TEXT_BASE = 0x00e00000
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# include NPE ethernet driver
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BOARDLIBS = cpu/ixp/npe/libnpe.a
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@ -0,0 +1,74 @@ |
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/* |
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* (C) Copyright 2000 |
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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OUTPUT_FORMAT ("elf32-bigarm", "elf32-bigarm", "elf32-bigarm") |
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OUTPUT_ARCH (arm) |
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ENTRY (_start) |
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SECTIONS |
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{ |
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. = 0x00000000; |
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. = ALIGN (4); |
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.text : { |
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cpu/ixp/start.o(.text) |
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lib_generic/string.o(.text) |
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lib_generic/vsprintf.o(.text) |
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lib_arm/board.o(.text) |
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common/dlmalloc.o(.text) |
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cpu/ixp/cpu.o(.text) |
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. = env_offset; |
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common/environment.o (.ppcenv) |
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* (.text) |
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} |
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. = ALIGN (4); |
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.rodata : { |
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*(.rodata) |
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} |
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. = ALIGN (4); |
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.data : { |
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*(.data) |
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} |
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. = ALIGN (4); |
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.got : { |
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*(.got) |
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} |
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. =.; |
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__u_boot_cmd_start =.; |
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.u_boot_cmd : { |
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*(.u_boot_cmd) |
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} |
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__u_boot_cmd_end =.; |
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. = ALIGN (4); |
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__bss_start =.; |
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.bss (NOLOAD): { |
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*(.bss) |
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} |
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_end =.; |
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} |
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@ -0,0 +1,224 @@ |
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/*
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* (C) Copyright 2007 |
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* Michael Schwingen, michael@schwingen.org |
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* |
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* Configuration settings for the AcTux-2 board. |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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|
* |
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* You should have received a copy of the GNU General Public License |
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|
* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#ifndef __CONFIG_H |
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#define __CONFIG_H |
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#define CONFIG_IXP425 1 |
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#define CONFIG_ACTUX2 1 |
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#define CONFIG_DISPLAY_CPUINFO 1 |
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#define CONFIG_DISPLAY_BOARDINFO 1 |
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#define CFG_IXP425_CONSOLE IXP425_UART2 |
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#define CONFIG_BAUDRATE 115200 |
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#define CONFIG_BOOTDELAY 5 |
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#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ |
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/***************************************************************
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* U-boot generic defines start here. |
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***************************************************************/ |
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#undef CONFIG_USE_IRQ |
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/* Size of malloc() pool */ |
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#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) |
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/* size in bytes reserved for initial data */ |
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#define CFG_GBL_DATA_SIZE 128 |
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/* allow to overwrite serial and ethaddr */ |
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#define CONFIG_ENV_OVERWRITE |
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/* Command line configuration. */ |
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#include <config_cmd_default.h> |
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#define CONFIG_CMD_ELF |
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#undef CONFIG_CMD_PCI |
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#undef CONFIG_PCI |
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#define CONFIG_BOOTCOMMAND "run boot_flash" |
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/* enable passing of ATAGs */ |
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#define CONFIG_CMDLINE_TAG 1 |
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#define CONFIG_SETUP_MEMORY_TAGS 1 |
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#define CONFIG_INITRD_TAG 1 |
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#define CONFIG_REVISION_TAG 1 |
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#if defined(CONFIG_CMD_KGDB) |
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# define CONFIG_KGDB_BAUDRATE 230400 |
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/* which serial port to use */ |
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# define CONFIG_KGDB_SER_INDEX 1 |
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#endif |
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/* Miscellaneous configurable options */ |
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#define CFG_LONGHELP |
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#define CFG_PROMPT "=> " |
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/* Console I/O Buffer Size */ |
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#define CFG_CBSIZE 256 |
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/* Print Buffer Size */ |
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#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) |
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/* max number of command args */ |
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#define CFG_MAXARGS 16 |
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/* Boot Argument Buffer Size */ |
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#define CFG_BARGSIZE CFG_CBSIZE |
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#define CFG_MEMTEST_START 0x00400000 |
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#define CFG_MEMTEST_END 0x00800000 |
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/* everything, incl board info, in Hz */ |
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#undef CFG_CLKS_IN_HZ |
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/* spec says 66.666 MHz, but it appears to be 33 */ |
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#define CFG_HZ 3333333 |
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/* default load address */ |
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#define CFG_LOAD_ADDR 0x00010000 |
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/* valid baudrates */ |
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#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ |
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115200, 230400 } |
||||||
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#define CONFIG_SERIAL_RTS_ACTIVE 1 |
||||||
|
|
||||||
|
/*
|
||||||
|
* Stack sizes |
||||||
|
* The stack sizes are set up in start.S using the settings below |
||||||
|
*/ |
||||||
|
#define CONFIG_STACKSIZE (128*1024) /* regular stack */ |
||||||
|
#ifdef CONFIG_USE_IRQ |
||||||
|
# define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ |
||||||
|
# define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ |
||||||
|
#endif |
||||||
|
|
||||||
|
/* Expansion bus settings */ |
||||||
|
#define CFG_EXP_CS0 0xbd113042 |
||||||
|
|
||||||
|
/* SDRAM settings */ |
||||||
|
#define CONFIG_NR_DRAM_BANKS 1 |
||||||
|
#define PHYS_SDRAM_1 0x00000000 |
||||||
|
#define CFG_DRAM_BASE 0x00000000 |
||||||
|
|
||||||
|
/* 16MB SDRAM */ |
||||||
|
#define CFG_SDR_CONFIG 0x3A |
||||||
|
#define PHYS_SDRAM_1_SIZE 0x01000000 |
||||||
|
#define CFG_SDRAM_REFRESH_CNT 0x81a |
||||||
|
#define CFG_SDR_MODE_CONFIG 0x1 |
||||||
|
#define CFG_DRAM_SIZE 0x01000000 |
||||||
|
|
||||||
|
/* FLASH organization */ |
||||||
|
#define CFG_MAX_FLASH_BANKS 1 |
||||||
|
/* max number of sectors on one chip */ |
||||||
|
#define CFG_MAX_FLASH_SECT 140 |
||||||
|
#define PHYS_FLASH_1 0x50000000 |
||||||
|
#define CFG_FLASH_BANKS_LIST { PHYS_FLASH_1 } |
||||||
|
|
||||||
|
#define CFG_FLASH_BASE PHYS_FLASH_1 |
||||||
|
#define CFG_MONITOR_BASE PHYS_FLASH_1 |
||||||
|
#define CFG_MONITOR_LEN (256 << 10) |
||||||
|
|
||||||
|
/* Use common CFI driver */ |
||||||
|
#define CFG_FLASH_CFI |
||||||
|
#define CFG_FLASH_CFI_DRIVER |
||||||
|
/* no byte writes on IXP4xx */ |
||||||
|
#define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT |
||||||
|
|
||||||
|
/* print 'E' for empty sector on flinfo */ |
||||||
|
#define CFG_FLASH_EMPTY_INFO |
||||||
|
|
||||||
|
/* Ethernet */ |
||||||
|
|
||||||
|
/* include IXP4xx NPE support */ |
||||||
|
#define CONFIG_IXP4XX_NPE 1 |
||||||
|
/* use separate flash sector with ucode images */ |
||||||
|
#define CONFIG_IXP4XX_NPE_EXT_UCODE_BASE 0x50040000 |
||||||
|
#define CONFIG_NET_MULTI 1 |
||||||
|
/* NPE0 PHY address */ |
||||||
|
#define CONFIG_PHY_ADDR 0x00 |
||||||
|
/* MII PHY management */ |
||||||
|
#define CONFIG_MII 1 |
||||||
|
/* Number of ethernet rx buffers & descriptors */ |
||||||
|
#define CFG_RX_ETH_BUFFER 16 |
||||||
|
#define CONFIG_RESET_PHY_R 1 |
||||||
|
/* ethernet switch connected to MII port */ |
||||||
|
#define CONFIG_MII_ETHSWITCH 1 |
||||||
|
|
||||||
|
#define CONFIG_CMD_DHCP |
||||||
|
#define CONFIG_CMD_NET |
||||||
|
#define CONFIG_CMD_MII |
||||||
|
#define CONFIG_CMD_PING |
||||||
|
#undef CONFIG_CMD_NFS |
||||||
|
|
||||||
|
/* BOOTP options */ |
||||||
|
#define CONFIG_BOOTP_BOOTFILESIZE |
||||||
|
#define CONFIG_BOOTP_BOOTPATH |
||||||
|
#define CONFIG_BOOTP_GATEWAY |
||||||
|
#define CONFIG_BOOTP_HOSTNAME |
||||||
|
|
||||||
|
/* Cache Configuration */ |
||||||
|
#define CFG_CACHELINE_SIZE 32 |
||||||
|
|
||||||
|
/*
|
||||||
|
* environment organization: |
||||||
|
* one flash sector, embedded in uboot area (bottom bootblock flash) |
||||||
|
*/ |
||||||
|
#define CFG_ENV_IS_IN_FLASH 1 |
||||||
|
#define CFG_ENV_SIZE 0x2000 |
||||||
|
#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x4000) |
||||||
|
#define CFG_USE_PPCENV 1 |
||||||
|
|
||||||
|
#define CONFIG_EXTRA_ENV_SETTINGS \ |
||||||
|
"mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \
|
||||||
|
"kerneladdr=50050000\0" \
|
||||||
|
"rootaddr=50170000\0" \
|
||||||
|
"loadaddr=10000\0" \
|
||||||
|
"updateboot_ser=mw.b 10000 ff 40000;" \
|
||||||
|
" loady ${loadaddr};" \
|
||||||
|
" run eraseboot writeboot\0" \
|
||||||
|
"updateboot_net=mw.b 10000 ff 40000;" \
|
||||||
|
" tftp ${loadaddr} u-boot.bin;" \
|
||||||
|
" run eraseboot writeboot\0" \
|
||||||
|
"eraseboot=protect off 50000000 50003fff;" \
|
||||||
|
" protect off 50006000 5003ffff;" \
|
||||||
|
" erase 50000000 50003fff;" \
|
||||||
|
" erase 50006000 5003ffff\0" \
|
||||||
|
"writeboot=cp.b 10000 50000000 4000;" \
|
||||||
|
" cp.b 16000 50006000 3a000\0" \
|
||||||
|
"eraseenv=protect off 50004000 50005fff;" \
|
||||||
|
" erase 50004000 50005fff\0" \
|
||||||
|
"updateroot=tftp ${loadaddr} ${rootfile};" \
|
||||||
|
" era ${rootaddr} +${filesize};" \
|
||||||
|
" cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \
|
||||||
|
"updatekern=tftp ${loadaddr} ${kernelfile};" \
|
||||||
|
" era ${kerneladdr} +${filesize};" \
|
||||||
|
" cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \
|
||||||
|
"flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
|
||||||
|
" rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
|
||||||
|
"netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
|
||||||
|
" rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
|
||||||
|
"addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \
|
||||||
|
"addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
|
||||||
|
"boot_flash=run flashargs addtty addeth;" \
|
||||||
|
" bootm ${kerneladdr}\0" \
|
||||||
|
"boot_net=run netargs addtty addeth;" \
|
||||||
|
" tftpboot ${loadaddr} ${kernelfile};" \
|
||||||
|
" bootm\0" |
||||||
|
|
||||||
|
#endif /* __CONFIG_H */ |
||||||
Loading…
Reference in new issue