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@ -33,7 +33,7 @@ |
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#ifndef CPU_CLOCK_RATE |
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#ifndef CPU_CLOCK_RATE |
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/* allowed values: 100000000, 133000000, and 150000000 */ |
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/* allowed values: 100000000, 133000000, and 150000000 */ |
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#define CPU_CLOCK_RATE 150000000 /* 133 MHz clock for the MIPS core */ |
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#define CPU_CLOCK_RATE 150000000 /* default: 150 MHz clock for the MIPS core */ |
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#endif |
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#endif |
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#define INFINEON_EBU_BOOTCFG 0x40C4 /* CMULT = 8 */ |
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#define INFINEON_EBU_BOOTCFG 0x40C4 /* CMULT = 8 */ |
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