riscv: Make start.S available for all targets

Currently start.S is inside arch/riscv/cpu/ax25/, but it can be
common for all RISC-V targets.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>

arch/riscv/Makefile

@@ -3,7 +3,7 @@
 # Copyright (C) 2017 Andes Technology Corporation.
 # Rick Chen, Andes Technology Corporation <rick@andestech.com>
 
-head-y := arch/riscv/cpu/$(CPU)/start.o
+head-y := arch/riscv/cpu/start.o
 
 libs-y += arch/riscv/cpu/
 libs-y += arch/riscv/cpu/$(CPU)/

arch/riscv/cpu/Makefile

@@ -2,4 +2,6 @@
 #
 # Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
 
+extra-y = start.o
+
 obj-y += cpu.o

arch/riscv/cpu/ax25/Makefile

@@ -3,6 +3,4 @@
 # Copyright (C) 2017 Andes Technology Corporation
 # Rick Chen, Andes Technology Corporation <rick@andestech.com>
 
-extra-y	= start.o
-
 obj-y	:= cpu.o

arch/riscv/cpu/u-boot.lds

@@ -11,7 +11,7 @@ SECTIONS
 {
 	. = ALIGN(4);
 	.text : {
-		arch/riscv/cpu/ax25/start.o	(.text)
+		arch/riscv/cpu/start.o	(.text)
 	}
 
 	/* This needs to come before *(.text*) */