Whitebox
/
u-boot
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

GCC4.6: Squash warnings in denali_data_eye.c

Browse Source 
denali_data_eye.c: In function
'denali_core_search_data_eye':denali_spd_ddr2.c:646: warning: format '%d'
expects type 'int', but argument 2 has type 'long unsigned int'

denali_data_eye.c:320: warning: format '%08lx' expects type 'long unsigned int',
but argument 2 has type 'u32'
denali_data_eye.c:330: warning: format '%08lx' expects type 'long unsigned int',
but argument 2 has type 'u32'
denali_spd_ddr2.c:676: warning: format '%d' expects type 'int', but argument 2
has type 'long unsigned int'
denali_data_eye.c:340: warning: format '%08lx' expects type 'long unsigned int',
but argument 2 has type 'u32'
denali_data_eye.c:350: warning: format '%08lx' expects type 'long unsigned int',
but argument 2 has type 'u32'
denali_data_eye.c:360: warning: format '%08lx' expects type 'long unsigned int',
but argument 2 has type 'u32'

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Mike Frysinger <vapier@gentoo.org>
master
Marek Vasut 13 years ago committed by Wolfgang Denk
parent 506b9f2b2d
commit b6d5040b0d
1 changed files with 5 additions and 5 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
Show Stats Download Patch File Download Diff File
  1. 10
      arch/powerpc/cpu/ppc4xx/denali_data_eye.c

10
arch/powerpc/cpu/ppc4xx/denali_data_eye.c
Unescape View File

@ -317,7 +317,7 @@ void denali_core_search_data_eye(void)
val = (mfdcr(ddrcfgd) & ~DDR0_09_WR_DQS_SHIFT_MASK)
| DDR0_09_WR_DQS_SHIFT_ENCODE(wr_dqs_shift);
mtdcr(ddrcfgd, val);
debug("DDR0_09=0x%08lx\n", val);
debug("DDR0_09=0x%08x\n", val);
/* -----------------------------------------------------------+
* Set 'dqs_out_shift' = wr_dqs_shift + 32
@ -327,7 +327,7 @@ void denali_core_search_data_eye(void)
val = (mfdcr(ddrcfgd) & ~DDR0_22_DQS_OUT_SHIFT_MASK)
| DDR0_22_DQS_OUT_SHIFT_ENCODE(dqs_out_shift);
mtdcr(ddrcfgd, val);
debug("DDR0_22=0x%08lx\n", val);
debug("DDR0_22=0x%08x\n", val);
/* -----------------------------------------------------------+
* Set 'dll_dqs_delay_X'.
@ -337,7 +337,7 @@ void denali_core_search_data_eye(void)
val = (mfdcr(ddrcfgd) & ~DDR0_17_DLL_DQS_DELAY_0_MASK)
| DDR0_17_DLL_DQS_DELAY_0_ENCODE(dll_dqs_delay_X);
mtdcr(ddrcfgd, val);
debug("DDR0_17=0x%08lx\n", val);
debug("DDR0_17=0x%08x\n", val);
/* dll_dqs_delay_1 to dll_dqs_delay_4 */
mtdcr(ddrcfga, DDR0_18);
@ -347,7 +347,7 @@ void denali_core_search_data_eye(void)
| DDR0_18_DLL_DQS_DELAY_2_ENCODE(dll_dqs_delay_X)
| DDR0_18_DLL_DQS_DELAY_1_ENCODE(dll_dqs_delay_X);
mtdcr(ddrcfgd, val);
debug("DDR0_18=0x%08lx\n", val);
debug("DDR0_18=0x%08x\n", val);
/* dll_dqs_delay_5 to dll_dqs_delay_8 */
mtdcr(ddrcfga, DDR0_19);
@ -357,7 +357,7 @@ void denali_core_search_data_eye(void)
| DDR0_19_DLL_DQS_DELAY_6_ENCODE(dll_dqs_delay_X)
| DDR0_19_DLL_DQS_DELAY_5_ENCODE(dll_dqs_delay_X);
mtdcr(ddrcfgd, val);
debug("DDR0_19=0x%08lx\n", val);
debug("DDR0_19=0x%08x\n", val);
/* -----------------------------------------------------------+
* Assert 'start' parameter.

Write Preview
Loading…
Cancel
Save