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@ -683,19 +683,39 @@ again: |
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*/ |
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#ifdef USE_32_BIT |
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SMC_outsl (SMC91111_DATA_REG, buf, length >> 2); |
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#ifndef CONFIG_XAENIAX |
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if (length & 0x2) |
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SMC_outw (*((word *) (buf + (length & 0xFFFFFFFC))), |
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SMC91111_DATA_REG); |
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#else |
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/* On XANEIAX, we can only use 32-bit writes, so we need to handle
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* unaligned tail part specially. The standard code doesn't work. |
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*/ |
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if ((length & 3) == 3) { |
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u16 * ptr = (u16*) &buf[length-3]; |
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SMC_outl((*ptr) | ((0x2000 | buf[length-1]) << 16), |
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SMC91111_DATA_REG); |
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} else if ((length & 2) == 2) { |
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u16 * ptr = (u16*) &buf[length-2]; |
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SMC_outl(*ptr, SMC91111_DATA_REG); |
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} else if (length & 1) { |
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SMC_outl((0x2000 | buf[length-1]), SMC91111_DATA_REG); |
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} else { |
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SMC_outl(0, SMC91111_DATA_REG); |
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} |
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#endif |
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#else |
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SMC_outsw (SMC91111_DATA_REG, buf, (length) >> 1); |
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#endif /* USE_32_BIT */ |
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#ifndef CONFIG_XAENIAX |
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/* Send the last byte, if there is one. */ |
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if ((length & 1) == 0) { |
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SMC_outw (0, SMC91111_DATA_REG); |
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} else { |
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SMC_outw (buf[length - 1] | 0x2000, SMC91111_DATA_REG); |
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} |
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#endif |
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/* and let the chipset deal with it */ |
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SMC_outw (MC_ENQUEUE, MMU_CMD_REG); |
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