ARM:OMAP+:MMC: Add parameters to MMC init

Add parameters to the OMAP MMC initialization function so the board can
mask host capabilities and set the maximum clock frequency.  While the
OMAP supports a certain set of MMC host capabilities, individual boards
may be more restricted and the OMAP may need to be configured to match
the board.  The PRG_SDMMC1_SPEEDCTRL bit in the OMAP3 is an example.

Signed-off-by: Jonathan Solnit <jsolnit@gmail.com>
master
Jonathan Solnit 13 years ago committed by Albert ARIBAUD
parent 1d0f5fa11d
commit bbbc1ae921
  1. 2
      arch/arm/cpu/armv7/am33xx/board.c
  2. 4
      arch/arm/cpu/armv7/omap-common/spl_mmc.c
  3. 2
      arch/arm/include/asm/arch-am33xx/mmc_host_def.h
  4. 8
      arch/arm/include/asm/arch-omap3/mmc_host_def.h
  5. 2
      arch/arm/include/asm/arch-omap4/mmc_host_def.h
  6. 2
      arch/arm/include/asm/arch-omap5/mmc_host_def.h
  7. 2
      board/cm_t35/cm_t35.c
  8. 2
      board/comelit/dig297/dig297.c
  9. 2
      board/corscience/tricorder/tricorder.c
  10. 2
      board/htkw/mcx/mcx.c
  11. 2
      board/isee/igep0020/igep0020.c
  12. 2
      board/isee/igep0030/igep0030.c
  13. 2
      board/logicpd/am3517evm/am3517evm.c
  14. 2
      board/logicpd/omap3som/omap3logic.c
  15. 2
      board/logicpd/zoom1/zoom1.c
  16. 2
      board/logicpd/zoom2/zoom2.c
  17. 4
      board/matrix_vision/mvblx/mvblx.c
  18. 2
      board/overo/overo.c
  19. 2
      board/pandora/pandora.c
  20. 2
      board/technexion/twister/twister.c
  21. 2
      board/teejet/mt_ventoux/mt_ventoux.c
  22. 2
      board/ti/am3517crane/am3517crane.c
  23. 2
      board/ti/beagle/beagle.c
  24. 2
      board/ti/evm/evm.c
  25. 4
      board/ti/omap5_evm/evm.c
  26. 2
      board/ti/panda/panda.c
  27. 2
      board/ti/sdp3430/sdp.c
  28. 4
      board/ti/sdp4430/sdp.c
  29. 2
      board/timll/devkit8000/devkit8000.c
  30. 24
      drivers/mmc/omap_hsmmc.c

@ -105,7 +105,7 @@ void init_timer(void)
#if defined(CONFIG_OMAP_HSMMC) && !defined(CONFIG_SPL_BUILD)
int board_mmc_init(bd_t *bis)
{
return omap_mmc_init(0);
return omap_mmc_init(0, 0, 0);
}
#endif

@ -39,10 +39,10 @@ int board_mmc_init(bd_t *bis)
{
switch (omap_boot_device()) {
case BOOT_DEVICE_MMC1:
omap_mmc_init(0);
omap_mmc_init(0, 0, 0);
break;
case BOOT_DEVICE_MMC2:
omap_mmc_init(1);
omap_mmc_init(1, 0, 0);
break;
}
return 0;

@ -159,6 +159,6 @@ typedef struct hsmmc {
#define mmc_reg_out(addr, mask, val)\
writel((readl(addr) & (~(mask))) | ((val) & (mask)), (addr))
int omap_mmc_init(int dev_index);
int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max);
#endif /* MMC_HOST_DEF_H */

@ -33,7 +33,9 @@ typedef struct t2 {
unsigned int devconf0; /* 0x274 */
unsigned char res2[0x060]; /* 0x278 */
unsigned int devconf1; /* 0x2D8 */
unsigned char res3[0x244]; /* 0x2DC */
unsigned char res3[0x16C]; /* 0x2DC */
unsigned int ctl_prog_io1; /* 0x448 */
unsigned char res4[0x0D4]; /* 0x44C */
unsigned int pbias_lite; /* 0x520 */
} t2_t;
@ -48,6 +50,8 @@ typedef struct t2 {
#define PBIASSPEEDCTRL0 (1 << 2)
#define PBIASLITEPWRDNZ1 (1 << 9)
#define CTLPROGIO1SPEEDCTRL (1 << 20)
/*
* OMAP HSMMC register definitions
*/
@ -191,6 +195,6 @@ struct hsmmc {
#define mmc_reg_out(addr, mask, val)\
writel((readl(addr) & (~(mask))) | ((val) & (mask)), (addr))
int omap_mmc_init(int dev_index);
int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max);
#endif /* MMC_HOST_DEF_H */

@ -169,6 +169,6 @@ struct hsmmc {
#define mmc_reg_out(addr, mask, val)\
writel((readl(addr) & (~(mask))) | ((val) & (mask)), (addr))
int omap_mmc_init(int dev_index);
int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max);
#endif /* MMC_HOST_DEF_H */

@ -169,6 +169,6 @@ struct hsmmc {
#define mmc_reg_out(addr, mask, val)\
writel((readl(addr) & (~(mask))) | ((val) & (mask)), (addr))
int omap_mmc_init(int dev_index);
int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max);
#endif /* MMC_HOST_DEF_H */

@ -318,7 +318,7 @@ void set_muxconf_regs(void)
#ifdef CONFIG_GENERIC_MMC
int board_mmc_init(bd_t *bis)
{
return omap_mmc_init(0);
return omap_mmc_init(0, 0, 0);
}
#endif

@ -147,7 +147,7 @@ void set_muxconf_regs(void)
#ifdef CONFIG_GENERIC_MMC
int board_mmc_init(bd_t *bis)
{
omap_mmc_init(0);
omap_mmc_init(0, 0, 0);
return 0;
}
#endif

@ -80,7 +80,7 @@ void set_muxconf_regs(void)
#if defined(CONFIG_GENERIC_MMC) && !(defined(CONFIG_SPL_BUILD))
int board_mmc_init(bd_t *bis)
{
return omap_mmc_init(0);
return omap_mmc_init(0, 0, 0);
}
#endif

@ -93,7 +93,7 @@ void set_muxconf_regs(void)
#if defined(CONFIG_OMAP_HSMMC) && !defined(CONFIG_SPL_BUILD)
int board_mmc_init(bd_t *bis)
{
return omap_mmc_init(0);
return omap_mmc_init(0, 0, 0);
}
#endif

@ -96,7 +96,7 @@ static void setup_net_chip(void)
#ifdef CONFIG_GENERIC_MMC
int board_mmc_init(bd_t *bis)
{
omap_mmc_init(0);
omap_mmc_init(0, 0, 0);
return 0;
}
#endif

@ -50,7 +50,7 @@ int board_init(void)
#ifdef CONFIG_GENERIC_MMC
int board_mmc_init(bd_t *bis)
{
omap_mmc_init(0);
omap_mmc_init(0, 0, 0);
return 0;
}
#endif

@ -79,7 +79,7 @@ void set_muxconf_regs(void)
#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
int board_mmc_init(bd_t *bis)
{
omap_mmc_init(0);
omap_mmc_init(0, 0, 0);
return 0;
}
#endif

@ -140,7 +140,7 @@ int board_init(void)
#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
int board_mmc_init(bd_t *bis)
{
return omap_mmc_init(0);
return omap_mmc_init(0, 0, 0);
}
#endif

@ -92,7 +92,7 @@ void set_muxconf_regs(void)
#ifdef CONFIG_GENERIC_MMC
int board_mmc_init(bd_t *bis)
{
omap_mmc_init(0);
omap_mmc_init(0, 0, 0);
return 0;
}
#endif

@ -183,7 +183,7 @@ void set_muxconf_regs (void)
#ifdef CONFIG_GENERIC_MMC
int board_mmc_init(bd_t *bis)
{
omap_mmc_init(0);
omap_mmc_init(0, 0, 0);
return 0;
}
#endif

@ -106,8 +106,8 @@ void set_muxconf_regs(void)
#ifdef CONFIG_GENERIC_MMC
int board_mmc_init(bd_t *bis)
{
omap_mmc_init(0);
omap_mmc_init(1);
omap_mmc_init(0, 0, 0);
omap_mmc_init(1, 0, 0);
return 0;
}
#endif

@ -403,7 +403,7 @@ int board_eth_init(bd_t *bis)
#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
int board_mmc_init(bd_t *bis)
{
omap_mmc_init(0);
omap_mmc_init(0, 0, 0);
return 0;
}
#endif

@ -108,7 +108,7 @@ void set_muxconf_regs(void)
#ifdef CONFIG_GENERIC_MMC
int board_mmc_init(bd_t *bis)
{
omap_mmc_init(0);
omap_mmc_init(0, 0, 0);
return 0;
}
#endif

@ -133,7 +133,7 @@ int board_eth_init(bd_t *bis)
!defined(CONFIG_SPL_BUILD)
int board_mmc_init(bd_t *bis)
{
return omap_mmc_init(0);
return omap_mmc_init(0, 0, 0);
}
#endif

@ -228,6 +228,6 @@ int board_eth_init(bd_t *bis)
!defined(CONFIG_SPL_BUILD)
int board_mmc_init(bd_t *bis)
{
return omap_mmc_init(0);
return omap_mmc_init(0, 0, 0);
}
#endif

@ -78,7 +78,7 @@ void set_muxconf_regs(void)
#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
int board_mmc_init(bd_t *bis)
{
omap_mmc_init(0);
omap_mmc_init(0, 0, 0);
return 0;
}
#endif

@ -477,7 +477,7 @@ void set_muxconf_regs(void)
#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
int board_mmc_init(bd_t *bis)
{
omap_mmc_init(0);
omap_mmc_init(0, 0, 0);
return 0;
}
#endif

@ -278,7 +278,7 @@ int board_eth_init(bd_t *bis)
#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
int board_mmc_init(bd_t *bis)
{
omap_mmc_init(0);
omap_mmc_init(0, 0, 0);
return 0;
}
#endif

@ -94,8 +94,8 @@ void set_muxconf_regs_non_essential(void)
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC)
int board_mmc_init(bd_t *bis)
{
omap_mmc_init(0);
omap_mmc_init(1);
omap_mmc_init(0, 0, 0);
omap_mmc_init(1, 0, 0);
return 0;
}
#endif

@ -179,7 +179,7 @@ void set_muxconf_regs_non_essential(void)
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC)
int board_mmc_init(bd_t *bis)
{
omap_mmc_init(0);
omap_mmc_init(0, 0, 0);
return 0;
}
#endif

@ -209,7 +209,7 @@ void set_muxconf_regs(void)
#ifdef CONFIG_GENERIC_MMC
int board_mmc_init(bd_t *bis)
{
omap_mmc_init(0);
omap_mmc_init(0, 0, 0);
return 0;
}
#endif

@ -108,8 +108,8 @@ void set_muxconf_regs_non_essential(void)
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC)
int board_mmc_init(bd_t *bis)
{
omap_mmc_init(0);
omap_mmc_init(1);
omap_mmc_init(0, 0, 0);
omap_mmc_init(1, 0, 0);
return 0;
}
#endif

@ -136,7 +136,7 @@ void set_muxconf_regs(void)
#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
int board_mmc_init(bd_t *bis)
{
omap_mmc_init(0);
omap_mmc_init(0, 0, 0);
return 0;
}
#endif

@ -80,6 +80,11 @@ unsigned char mmc_board_init(struct mmc *mmc)
writel(readl(&t2_base->devconf1) | MMCSDIO2ADPCLKISEL,
&t2_base->devconf1);
/* Change from default of 52MHz to 26MHz if necessary */
if (!(mmc->host_caps & MMC_MODE_HS_52MHz))
writel(readl(&t2_base->ctl_prog_io1) & ~CTLPROGIO1SPEEDCTRL,
&t2_base->ctl_prog_io1);
writel(readl(&prcm_base->fclken1_core) |
EN_MMC1 | EN_MMC2 | EN_MMC3,
&prcm_base->fclken1_core);
@ -463,7 +468,7 @@ static void mmc_set_ios(struct mmc *mmc)
writel(readl(&mmc_base->sysctl) | CEN_ENABLE, &mmc_base->sysctl);
}
int omap_mmc_init(int dev_index)
int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max)
{
struct mmc *mmc;
@ -494,11 +499,22 @@ int omap_mmc_init(int dev_index)
return 1;
}
mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
mmc->host_caps = MMC_MODE_4BIT | MMC_MODE_HS_52MHz | MMC_MODE_HS |
MMC_MODE_HC;
mmc->host_caps = (MMC_MODE_4BIT | MMC_MODE_HS_52MHz | MMC_MODE_HS |
MMC_MODE_HC) & ~host_caps_mask;
mmc->f_min = 400000;
mmc->f_max = 52000000;
if (f_max != 0)
mmc->f_max = f_max;
else {
if (mmc->host_caps & MMC_MODE_HS) {
if (mmc->host_caps & MMC_MODE_HS_52MHz)
mmc->f_max = 52000000;
else
mmc->f_max = 26000000;
} else
mmc->f_max = 20000000;
}
mmc->b_max = 0;

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