* The PS/2 mux on the BMS2003 board needs 450 ms after power on

before we can access it; add delay in case we are faster (with no
  CF card inserted)

* Cleanup of some init functions

* Make sure SCC Ethernet is always stopped by the time we boot Linux
  to avoid Linux crashes by early packets coming in.

* Accelerate flash accesses on LWMON board by using buffered writes

CHANGELOG

@@ -2,6 +2,17 @@
 Changes since U-Boot 1.0.1:
 ======================================================================
 
+* The PS/2 mux on the BMS2003 board needs 450 ms after power on
+  before we can access it; add delay in case we are faster (with no
+  CF card inserted)
+
+* Cleanup of some init functions
+
+* Make sure SCC Ethernet is always stopped by the time we boot Linux
+  to avoid Linux crashes by early packets coming in.
+
+* Accelerate flash accesses on LWMON board by using buffered writes
+
 * Fix typo in Makefile;
   fix problem with PARTNUM detection
 

board/LEOX/elpt860/elpt860.c

@@ -33,7 +33,7 @@
 /*
 ** Note 1: In this file, you have to provide the following functions:
 ** ------
-**              int             board_pre_init(void)
+**              int             board_early_init_f(void)
 **              int             checkboard(void)
 **              long int        initdram(int board_type)
 ** called from 'board_init_f()' into 'common/board.c'
@@ -145,7 +145,7 @@ const uint sdram_table[] = {
 /*
  * Very early board init code (fpga boot, etc.)
  */
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	volatile immap_t *immr = (immap_t *) CFG_IMMR;
 

board/MAI/AmigaOneG3SE/articiaS.c

@@ -675,7 +675,7 @@ static __inline__ void set_msr (unsigned long msr)
 	asm volatile ("mtmsr %0"::"r" (msr));
 }
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	unsigned char c_value = 0;
 	unsigned long msr;

board/Marvell/common/bootseq.txt

@@ -58,7 +58,7 @@ in_flash:
     call cpu_init_f
     	debug leds
     board_init_f: (common/board.c)
-	board_pre_init:
+	board_early_init_f:
 	    remap gt regs?
 	    map PCI mem/io
 	    map device space

board/Marvell/db64360/db64360.c

@@ -61,7 +61,7 @@ extern void invalidate_l1_instruction_cache (void);
 
 /* Unfortunately, we cant change it while we are in flash, so we initialize it
  * to the "final" value. This means that any debug_led calls before
- * board_pre_init wont work right (like in cpu_init_f).
+ * board_early_init_f wont work right (like in cpu_init_f).
  * See also my_remap_gt_regs below. (NTL)
  */
 
@@ -237,11 +237,11 @@ static void gt_cpu_config (void)
 }
 
 /*
- * board_pre_init.
+ * board_early_init_f.
  *
  * set up gal. device mappings, etc.
  */
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	uchar sram_boot = 0;
 

board/Marvell/db64460/db64460.c

@@ -61,7 +61,7 @@ extern void invalidate_l1_instruction_cache (void);
 
 /* Unfortunately, we cant change it while we are in flash, so we initialize it
  * to the "final" value. This means that any debug_led calls before
- * board_pre_init wont work right (like in cpu_init_f).
+ * board_early_init_f wont work right (like in cpu_init_f).
  * See also my_remap_gt_regs below. (NTL)
  */
 
@@ -237,11 +237,11 @@ static void gt_cpu_config (void)
 }
 
 /*
- * board_pre_init.
+ * board_early_init_f.
  *
  * set up gal. device mappings, etc.
  */
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	uchar sram_boot = 0;
 

board/altera/dk1c20/dk1c20.c

@@ -31,7 +31,7 @@ void _default_hdlr (void)
 	printf ("default_hdlr\n");
 }
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	/* init seven segment led display and switch off */
 	sevenseg_set(SEVENSEG_OFF);

board/altera/dk1s10/dk1s10.c

@@ -31,7 +31,7 @@ void _default_hdlr (void)
 	printf ("default_hdlr\n");
 }
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	/* init seven segment led display and switch off */
 	sevenseg_set(SEVENSEG_OFF);

board/bubinga405ep/bubinga405ep.c

@@ -26,7 +26,7 @@ long int spd_sdram (void);
 #include <asm/processor.h>
 
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	mtdcr (uicsr, 0xFFFFFFFF);      /* clear all ints */
 	mtdcr (uicer, 0x00000000);      /* disable all ints */

board/cpc45/cpc45.c

@@ -32,7 +32,7 @@ extern void Plx9030Init(void);
 	/* We have to clear the initial data area here. Couldn't have done it
 	 * earlier because DRAM had not been initialized.
 	 */
-int board_pre_init(void)
+int board_early_init_f(void)
 {
 
 	/* enable DUAL UART Mode on CPC45 */

board/cradle/cradle.c

@@ -170,7 +170,7 @@ init_sio (int led, unsigned long base)
 
 int
 /**********************************************************/
-board_post_init (void)
+board_late_init (void)
 /**********************************************************/
 {
 	return (0);

board/cray/L1/L1.c

@@ -109,7 +109,7 @@ extern char bootscript[];
 static void init_sdram (void);
 
 /* ------------------------------------------------------------------------- */
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	/* Running from ROM: global data is still READONLY */
 	init_sdram ();

board/dave/PPChameleonEVB/PPChameleonEVB.c

@@ -51,7 +51,7 @@ const unsigned char fpgadata[] =
 int gunzip(void *, int, unsigned char *, int *);
 
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	out32(GPIO0_OR, CFG_NAND0_CE);                 /* set initial outputs     */
 	out32(GPIO0_OR, CFG_NAND1_CE);                 /* set initial outputs     */

board/ebony/ebony.c

@@ -32,7 +32,7 @@
 
 long int fixed_sdram (void);
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	uint reg;
 	unsigned char *fpga_base = (unsigned char *) CFG_FPGA_BASE;

board/eltec/mhpc/mhpc.c

@@ -104,7 +104,7 @@ static const unsigned int sdram_table[] =
 
 /* ------------------------------------------------------------------------- */
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
     volatile immap_t  *im = (immap_t *)CFG_IMMR;
     volatile cpm8xx_t *cp = &(im->im_cpm);

board/ep8260/ep8260.c

@@ -188,7 +188,7 @@ const iop_conf_t iop_conf_tab[4][32] = {
  * Setup CS4 to enable the Board Control/Status registers.
  * Otherwise the smcs won't work.
 */
-int board_pre_init (void)
+int board_early_init_f (void)
 {
     volatile t_ep_regs *regs = (t_ep_regs*)CFG_REGS_BASE;
     volatile immap_t *immap  = (immap_t *)CFG_IMMR;

board/eric/eric.c

@@ -31,7 +31,7 @@
 #define IBM405GP_GPIO0_ODR     0xef600718	/* GPIO Open Drain */
 #define IBM405GP_GPIO0_IR      0xef60071c	/* GPIO Input */
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 
    /*-------------------------------------------------------------------------+

board/esd/adciop/adciop.c

@@ -31,7 +31,7 @@
 /* ------------------------------------------------------------------------- */
 
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	/*
 	 * Set port pin in escc2 to keep living, and configure user led output

board/esd/ar405/ar405.c

@@ -46,7 +46,7 @@ const unsigned char fpgadata[] = {
 #include "../common/fpga.c"
 
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	DECLARE_GLOBAL_DATA_PTR;
 

board/esd/ash405/ash405.c

@@ -50,7 +50,7 @@ const unsigned char fpgadata[] =
 int gunzip(void *, int, unsigned char *, int *);
 
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	/*
 	 * IRQ 0-15  405GP internally generated; active high; level sensitive

board/esd/canbt/canbt.c

@@ -48,7 +48,7 @@ const unsigned char fpgadata[] = {
 #include "../common/fpga.c"
 
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	DECLARE_GLOBAL_DATA_PTR;
 

board/esd/cpci405/cpci405.c

@@ -57,7 +57,7 @@ int cpci405_version(void);
 int gunzip(void *, int, unsigned char *, int *);
 
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 #ifndef CONFIG_CPCI405_VER2
 	int index, len, i;

board/esd/cpci440/cpci440.c

@@ -28,7 +28,7 @@
 
 long int fixed_sdram( void );
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	uint reg;
 

board/esd/cpciiser4/cpciiser4.c

@@ -52,7 +52,7 @@ const unsigned char fpgadata[] = {
 #include "../common/fpga.c"
 
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	DECLARE_GLOBAL_DATA_PTR;
 

board/esd/dasa_sim/dasa_sim.c

@@ -137,7 +137,7 @@ static int fpgaBoot (void)
 }
 
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	/*
 	 * Init pci regs

board/esd/dp405/dp405.c

@@ -35,7 +35,7 @@ const unsigned char fpgadata[] =
 int filesize = sizeof(fpgadata);
 
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	/*
 	 * IRQ 0-15  405GP internally generated; active high; level sensitive

board/esd/du405/du405.c

@@ -53,7 +53,7 @@ const unsigned char fpgadata[] = {
 #include "../common/fpga.c"
 
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	DECLARE_GLOBAL_DATA_PTR;
 

board/esd/hub405/hub405.c

@@ -29,7 +29,7 @@
 /* ------------------------------------------------------------------------- */
 
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	/*
 	 * IRQ 0-15  405GP internally generated; active high; level sensitive

board/esd/ocrtc/ocrtc.c

@@ -29,7 +29,7 @@
 
 /* ------------------------------------------------------------------------- */
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	/*
 	 * IRQ 0-15  405GP internally generated; active high; level sensitive

board/esd/pci405/pci405.c

@@ -53,7 +53,7 @@ const unsigned char fpgadata[] =
 int gunzip(void *, int, unsigned char *, int *);
 
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	unsigned long cntrl0Reg;
 

board/esd/plu405/plu405.c

@@ -50,7 +50,7 @@ const unsigned char fpgadata[] =
 int gunzip(void *, int, unsigned char *, int *);
 
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	/*
 	 * IRQ 0-15  405GP internally generated; active high; level sensitive

board/esd/pmc405/pmc405.c

@@ -35,7 +35,7 @@ const unsigned char fpgadata[] =
 int filesize = sizeof(fpgadata);
 
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	/*
 	 * IRQ 0-15  405GP internally generated; active high; level sensitive

board/esd/voh405/voh405.c

@@ -50,7 +50,7 @@ const unsigned char fpgadata[] =
 int gunzip(void *, int, unsigned char *, int *);
 
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	/*
 	 * IRQ 0-15  405GP internally generated; active high; level sensitive

board/evb64260/bootseq.txt

@@ -58,7 +58,7 @@ in_flash:
     call cpu_init_f
     	debug leds
     board_init_f: (common/board.c)
-	board_pre_init:
+	board_early_init_f:
 	    remap gt regs?
 	    map PCI mem/io
 	    map device space

board/evb64260/evb64260.c

@@ -57,7 +57,7 @@ extern void zuma_mbox_init(void);
 
 /* Unfortunately, we cant change it while we are in flash, so we initialize it
  * to the "final" value. This means that any debug_led calls before
- * board_pre_init wont work right (like in cpu_init_f).
+ * board_early_init_f wont work right (like in cpu_init_f).
  * See also my_remap_gt_regs below. (NTL)
  */
 
@@ -182,11 +182,11 @@ gt_cpu_config(void)
 }
 
 /*
- * board_pre_init.
+ * board_early_init_f.
  *
  * set up gal. device mappings, etc.
  */
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	uchar sram_boot = 0;
 

board/exbitgen/exbitgen.c

@@ -4,7 +4,7 @@
 #include "exbitgen.h"
 
 /* ************************************************************************ */
-int board_pre_init (void)
+int board_early_init_f (void)
 /* ------------------------------------------------------------------------ --
  * Purpose     :
  * Remarks     :

board/ip860/ip860.c

@@ -85,7 +85,7 @@ const uint sdram_table[] = {
 
 
 /* ------------------------------------------------------------------------- */
-int board_pre_init(void)
+int board_early_init_f(void)
 {
     volatile immap_t     *immap  = (immap_t *)CFG_IMMR;
     volatile memctl8xx_t *memctl = &immap->im_memctl;

board/ixdp425/ixdp425.c

@@ -40,7 +40,7 @@
 
 int
 /**********************************************************/
-board_post_init (void)
+board_late_init (void)
 /**********************************************************/
 {
 	return (0);

board/lubbock/lubbock.c

@@ -50,7 +50,7 @@ int board_init (void)
 	return 0;
 }
 
-int board_post_init(void)
+int board_late_init(void)
 {
 	setenv("stdout", "serial");
 	setenv("stderr", "serial");

board/lwmon/flash.c

@@ -47,6 +47,9 @@ flash_info_t	flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips	*/
  */
 static ulong flash_get_size (vu_long *addr, flash_info_t *info);
 static int write_data (flash_info_t *info, ulong dest, ulong data);
+#ifdef CFG_FLASH_USE_BUFFER_WRITE
+static int write_data_buf (flash_info_t * info, ulong dest, uchar * cp, int len);
+#endif
 static void flash_get_offsets (ulong base, flash_info_t *info);
 
 /*-----------------------------------------------------------------------
@@ -480,6 +483,17 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
 	/*
 	 * handle FLASH_WIDTH aligned part
 	 */
+#ifdef CFG_FLASH_USE_BUFFER_WRITE
+	while(cnt >= FLASH_WIDTH) {
+		i = CFG_FLASH_BUFFER_SIZE > cnt ?
+		    (cnt & ~(FLASH_WIDTH - 1)) : CFG_FLASH_BUFFER_SIZE;
+		if((rc = write_data_buf(info, wp, src,i)) != 0)
+			return rc;
+		wp += i;
+		src += i;
+		cnt -=i;
+	}
+#else
 	while (cnt >= FLASH_WIDTH) {
 		data = 0;
 		for (i=0; i<FLASH_WIDTH; ++i) {
@@ -491,6 +505,7 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
 		wp  += FLASH_WIDTH;
 		cnt -= FLASH_WIDTH;
 	}
+#endif /* CFG_FLASH_USE_BUFFER_WRITE */
 
 	if (cnt == 0) {
 		return (0);
@@ -512,6 +527,28 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
 }
 
 /*-----------------------------------------------------------------------
+ * Check flash status, returns:
+ * 0 - OK
+ * 1 - timeout
+ */
+static int flash_status_check(vu_long *addr, ulong tout, char * prompt)
+{
+	ulong status;
+	ulong start;
+
+	/* Wait for command completion */
+	start = get_timer (0);
+	while(((status = *addr) & 0x00800080) != 0x00800080) {
+		if (get_timer(start) > tout) {
+			printf("Flash %s timeout at address %p\n", prompt, addr);
+			*addr = 0x00FF00FF;	/* restore read mode */
+			return (1);
+		}
+	}
+	return 0;
+}
+
+/*-----------------------------------------------------------------------
  * Write a word to Flash, returns:
  * 0 - OK
  * 1 - write timeout
@@ -520,8 +557,6 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
 static int write_data (flash_info_t *info, ulong dest, ulong data)
 {
 	vu_long *addr = (vu_long *)dest;
-	ulong status;
-	ulong start;
 	int flag;
 
 	/* Check if Flash is (sufficiently) erased */
@@ -538,19 +573,55 @@ static int write_data (flash_info_t *info, ulong dest, ulong data)
 	if (flag)
 		enable_interrupts();
 
-	start = get_timer (0);
-
-	while (((status = *addr) & 0x00800080) != 0x00800080) {
-		if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
-			*addr = 0x00FF00FF;	/* restore read mode */
+	if (flash_status_check(addr, CFG_FLASH_WRITE_TOUT, "write") != 0) {
 		return (1);
 	}
-	}
 
 	*addr = 0x00FF00FF;	/* restore read mode */
 
 	return (0);
 }
 
+#ifdef CFG_FLASH_USE_BUFFER_WRITE
+/*-----------------------------------------------------------------------
+ * Write a buffer to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ */
+static int write_data_buf(flash_info_t * info, ulong dest, uchar * cp, int len)
+{
+	vu_long *addr = (vu_long *)dest;
+	int sector;
+	int cnt;
+	int retcode;
+	vu_long * src = (vu_long *)cp;
+	vu_long * dst = (vu_long *)dest;
+
+	/* find sector */
+	for(sector = info->sector_count - 1; sector >= 0; sector--) {
+		if(dest >= info->start[sector])
+			break;
+	}
+
+	*addr = 0x00500050;		/* clear status */
+	*addr = 0x00e800e8;		/* write buffer */
+
+	if((retcode = flash_status_check(addr, CFG_FLASH_BUFFER_WRITE_TOUT,
+					 "write to buffer")) == 0) {
+		cnt = len / FLASH_WIDTH;
+		*addr = (cnt-1) | ((cnt-1) << 16);
+		while(cnt-- > 0) {
+			*dst++ = *src++;
+		}
+		*addr = 0x00d000d0;		/* write buffer confirm */
+		retcode = flash_status_check(addr, CFG_FLASH_BUFFER_WRITE_TOUT,
+						 "buffer write");
+	}
+	*addr = 0x00FF00FF;	/* restore read mode */
+	*addr = 0x00500050;	/* clear status */
+	return retcode;
+}
+#endif /* CFG_USE_FLASH_BUFFER_WRITE */
+
 /*-----------------------------------------------------------------------
  */

board/lwmon/lwmon.c

@@ -339,14 +339,14 @@ static long int dram_size (long int mamr_value, long int *base, long int maxsize
 #endif
 
 /***********************************************************************
-F* Function:     int board_pre_init (void) P*A*Z*
+F* Function:     int board_early_init_f (void) P*A*Z*
  *
 P* Parameters:   none
 P*
 P* Returnvalue:  int
 P*                - 0 is always returned.
  *
-Z* Intention:    This function is the board_pre_init() method implementation
+Z* Intention:    This function is the board_early_init_f() method implementation
 Z*               for the lwmon board.
 Z*               Disable Ethernet TENA on Port B.
  *
@@ -354,7 +354,7 @@ D* Design:       wd@denx.de
 C* Coding:       wd@denx.de
 V* Verification: dzu@denx.de
  ***********************************************************************/
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	volatile immap_t *immr = (immap_t *) CFG_IMMR;
 

board/ml2/ml2.c

@@ -22,7 +22,7 @@
 #include <asm/processor.h>
 
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	return 0;
 }

board/mpc8260ads/mpc8260ads.c

@@ -225,7 +225,7 @@ void reset_phy (void)
 #endif /* CONFIG_MII */
 }
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	vu_long *bcsr = (vu_long *)CFG_BCSR;
 

board/mpc8266ads/mpc8266ads.c

@@ -232,7 +232,7 @@ void reset_phy(void)
 }
 
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
     volatile bcsr_t  *bcsr         = (bcsr_t *)CFG_BCSR;
     volatile pci_ic_t *pci_ic      = (pci_ic_t *) CFG_PCI_INT;

board/mpc8540ads/mpc8540ads.c

@@ -47,7 +47,7 @@ typedef struct bscr_ {
 } bcsr_t;
 #endif
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 #if defined(CONFIG_PCI)
     volatile immap_t *immr = (immap_t *)CFG_IMMR;

board/mpc8560ads/mpc8560ads.c

@@ -199,7 +199,7 @@ typedef struct bscr_ {
 	volatile unsigned char bcsr5;
 } bcsr_t;
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 #if defined(CONFIG_PCI)
     volatile immap_t *immr = (immap_t *)CFG_IMMR;

board/mpl/mip405/mip405.c

@@ -469,7 +469,7 @@ int init_sdram (void)
 	return (0);
 }
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	init_sdram ();
 

board/mpl/pip405/pip405.c

@@ -176,7 +176,7 @@ void write_4hex (unsigned long val)
 
 #endif
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	unsigned char dataout[1];
 	unsigned char datain[128];

board/netvia/netvia.c

@@ -356,7 +356,7 @@ int misc_init_r(void)
 #error Unknown NETVIA board version.
 #endif
 
-int board_pre_init(void)
+int board_early_init_f(void)
 {
 	volatile immap_t *immap = (immap_t *) CFG_IMMR;
 	volatile iop8xx_t *ioport = &immap->im_ioport;

board/oxc/oxc.c

@@ -87,7 +87,7 @@ void pci_init_board (void)
 	pci_mpc824x_init(&hose);
 }
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	*(volatile unsigned char *)(CFG_CPLD_RESET) = 0x89;
 	return 0;

board/pcippc2/pcippc2.c

@@ -75,7 +75,7 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	return (-1);
 }
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	out32 (REG (CPC0, RSTR), 0xC0000000);
 	iobarrier_rw ();

board/rpxsuper/rpxsuper.c

@@ -191,7 +191,7 @@ const iop_conf_t iop_conf_tab[4][32] = {
  * Setup CS4 to enable the Board Control/Status registers.
  * Otherwise the smcs won't work.
 */
-int board_pre_init (void)
+int board_early_init_f (void)
 {
     volatile t_rpx_regs *regs = (t_rpx_regs*)CFG_REGS_BASE;
     volatile immap_t *immap  = (immap_t *)CFG_IMMR;

board/siemens/IAD210/IAD210.c

@@ -228,7 +228,7 @@ void board_ether_init (void)
 	iop->iop_pdpar |= 0x0080;	/* set pin as MII_clock */
 }
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	volatile immap_t *immap = (immap_t *) CFG_IMMR;
 	volatile cpmtimer8xx_t *timers = &immap->im_cpmtimer;

board/tqm8xx/tqm8xx.c

@@ -419,6 +419,14 @@ struct serial_state rs_table[] = {
 	{ BASE_BAUD, 6,  (void*)0xec160000 },
 	{ BASE_BAUD, 10, (void*)0xec170000 },
 };
+
+#ifdef CONFIG_BOARD_EARLY_INIT_R
+int board_early_init_r (void)
+{
+	ps2mult_early_init();
+	return (0);
+}
+#endif
 #endif /* CONFIG_BMS2003 */
 
 #endif /* CONFIG_PS2MULT */

board/w7o/w7o.c

@@ -41,7 +41,7 @@ unsigned long get_dram_size (void);
 
 /* ------------------------------------------------------------------------- */
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
 #if defined(CONFIG_W7OLMG)
 	/*

board/walnut405/walnut405.c

@@ -26,7 +26,7 @@
 #include <asm/processor.h>
 #include <spd_sdram.h>
 
-int board_pre_init (void)
+int board_early_init_f (void)
 {
    /*-------------------------------------------------------------------------+
    | Interrupt controller setup for the Walnut board.

cpu/74xx_7xx/start.S

@@ -267,7 +267,7 @@ in_flash:
 	 * everything is write-through.
 	 * The init-mem BAT can be reused after reloc. The old
 	 * gt-regs BAT can be reused after board_init_f calls
-	 * board_pre_init (EVB only).
+	 * board_early_init_f (EVB only).
 	 */
 #if !defined(CONFIG_BAB7xx) && !defined(CONFIG_ELPPC)
 	/* enable address translation */

cpu/mpc8xx/spi.c

@@ -503,8 +503,7 @@ static int packet_check (char * packet, int length)
 	char c = (char) length;
 	int i;
 
-	for (i = 0; i < length; i++)
-	{
+	for (i = 0; i < length; i++) {
 	    if (packet[i] != c++) return -1;
 	}
 
@@ -513,8 +512,6 @@ static int packet_check (char * packet, int length)
 
 int spi_post_test (int flags)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	int res = -1;
 	volatile immap_t *immr = (immap_t *) CFG_IMMR;
 	volatile cpm8xx_t *cp = (cpm8xx_t *) & immr->im_cpm;
@@ -526,16 +523,13 @@ int spi_post_test (int flags)
 
 	cp->cp_spmode |= SPMODE_LOOP;
 
-	for (i = 0; i < TEST_NUM; i++)
-	{
-	    for (l = TEST_MIN_LENGTH; l <= TEST_MAX_LENGTH; l += 8)
-	    {
+	for (i = 0; i < TEST_NUM; i++) {
+		for (l = TEST_MIN_LENGTH; l <= TEST_MAX_LENGTH; l += 8) {
 			packet_fill (txbuf, l);
 
 			spi_xfer (l);
 
-		if (packet_check(rxbuf, l) < 0)
-		{
+			if (packet_check (rxbuf, l) < 0) {
 				goto Done;
 			}
 		}
@@ -557,12 +551,7 @@ int spi_post_test (int flags)
 	serial_init ();
 #endif
 
-#if defined(SCC_ENET) && (SCC_ENET == 1)
-	eth_init(gd->bd);
-#endif
-
-	if (res != 0)
-	{
+	if (res != 0) {
 		post_log ("SPI test failed\n");
 	}
 

drivers/keyboard.c

@@ -194,8 +194,14 @@ void handle_scancode(unsigned char scancode)
 	case 0xBA: /* caps lock released */
 		return; /* just swallow */
 	}
+#if 0
 	if((scancode&0x80)==0x80) /* key released */
 		return;
+#else
+	if((scancode&0x80)==0x00) /* key pressed */
+		return;
+	scancode &= ~0x80;
+#endif
 	/* now, decide which table we need */
 	if(scancode > (sizeof(kbd_plain_xlate)/sizeof(kbd_plain_xlate[0]))) { /* scancode not in list */
 		PRINTF("unkown scancode %X\n",scancode);

drivers/ps2mult.c

@@ -42,6 +42,7 @@
 #endif
 
 
+static ulong start_time;
 static int init_done = 0;
 
 static int received_escape = 0;
@@ -63,6 +64,13 @@ static int ps2mult_buf_out_idx;
 
 static u_char ps2mult_buf_status [PS2BUF_SIZE];
 
+#ifndef CONFIG_BOARD_EARLY_INIT_R
+#error #define CONFIG_BOARD_EARLY_INIT_R and call ps2mult_early_init() in board_early_init_r()
+#endif
+void ps2mult_early_init (void)
+{
+	start_time = get_timer(0);
+}
 
 static void ps2mult_send_byte(u_char byte, u_char sel)
 {
@@ -360,6 +368,8 @@ int ps2mult_init (void)
 	int kbd_found = 0;
 	int mouse_found = 0;
 
+	while (get_timer(start_time) < CONFIG_PS2MULT_DELAY);
+
 	ps2ser_init();
 
 	ps2ser_putc(PS2MULT_SESSION_START);

include/common.h

@@ -285,9 +285,10 @@ void  perform_soft_reset(void);
 void	load_sernum_ethaddr (void);
 
 /* $(BOARD)/$(BOARD).c */
-int board_pre_init (void);
-int board_post_init (void);
+int board_early_init_f (void);
+int board_late_init (void);
 int board_postclk_init (void); /* after clocks/timebase, before env/serial */
+int board_early_init_r (void);
 void board_poweroff (void);
 
 #if defined(CFG_DRAM_TEST)

include/configs/ADCIOP.h

@@ -36,7 +36,7 @@
 #define CONFIG_IOP480		1	/* This is a IOP480 CPU		*/
 #define CONFIG_ADCIOP		1	/* ...on a ADCIOP board		*/
 
-#define CONFIG_BOARD_PRE_INIT   1       /* call board_pre_init()        */
+#define CONFIG_BOARD_EARLY_INIT_F 1	/* call board_early_init_f()	*/
 
 #define CONFIG_CLOCKS_IN_MHZ	1	/* clocks passsed to Linux in MHz */
 

include/configs/AR405.h

@@ -37,7 +37,7 @@
 #define CONFIG_4xx		1	/* ...member of PPC4xx family	*/
 #define CONFIG_AR405		1	/* ...on a AR405 board		*/
 
-#define CONFIG_BOARD_PRE_INIT   1       /* call board_pre_init()        */
+#define CONFIG_BOARD_EARLY_INIT_F 1	/* call board_early_init_f()	*/
 
 #define CONFIG_SYS_CLK_FREQ	33000000 /* external frequency to pll	*/
 

include/configs/ASH405.h

@@ -37,7 +37,7 @@
 #define CONFIG_4xx		1	/* ...member of PPC4xx family	*/
 #define CONFIG_ASH405		1	/* ...on a ASH405 board		*/
 
-#define CONFIG_BOARD_PRE_INIT   1       /* call board_pre_init()        */
+#define CONFIG_BOARD_EARLY_INIT_F 1	/* call board_early_init_f()	*/
 #define CONFIG_MISC_INIT_R	1	/* call misc_init_r()		*/
 
 #define CONFIG_SYS_CLK_FREQ	33333334 /* external frequency to pll	*/

include/configs/AmigaOneG3SE.h

@@ -43,7 +43,7 @@
 
 #define CONFIG_AMIGAONEG3SE	1
 
-#define CONFIG_BOARD_PRE_INIT	1
+#define CONFIG_BOARD_EARLY_INIT_F 1
 #define CONFIG_MISC_INIT_R	1
 
 #define CONFIG_VERY_BIG_RAM	1

include/configs/BMW.h

@@ -45,6 +45,8 @@
 #define CONFIG_MPC8245		1
 #define CONFIG_BMW		1
 
+#define	CONFIG_MISC_INIT_F	1	/* Use misc_init_f()			*/
+
 #define CONFIG_BCM570x		1	/* Use Broadcom BCM570x Ethernet Driver */
 #define	CONFIG_TIGON3		1
 

include/configs/BUBINGA405EP.h

@@ -42,7 +42,7 @@
 #define CONFIG_4xx		1	/* ...member of PPC4xx family   */
 #define CONFIG_BUBINGA405EP	1	/* ...on a BUBINGA405EP board	*/
 
-#define CONFIG_BOARD_PRE_INIT	1	/* Call board_pre_init	*/
+#define CONFIG_BOARD_EARLY_INIT_F 1	/* Call board_early_init_f	*/
 
 #define CONFIG_SYS_CLK_FREQ     33333333 /* external frequency to pll   */
 

include/configs/CANBT.h

@@ -37,7 +37,7 @@
 #define CONFIG_4xx		1	/* ...member of PPC4xx family	*/
 #define CONFIG_CANBT		1	/* ...on a CANBT board		*/
 
-#define CONFIG_BOARD_PRE_INIT   1       /* call board_pre_init()        */
+#define CONFIG_BOARD_EARLY_INIT_F 1	/* call board_early_init_f()	*/
 
 #define CONFIG_SYS_CLK_FREQ	25000000 /* external frequency to pll	*/
 

include/configs/CPCI405.h

@@ -37,7 +37,7 @@
 #define CONFIG_4xx		1	/* ...member of PPC4xx family	*/
 #define CONFIG_CPCI405		1	/* ...on a CPCI405 board	*/
 
-#define CONFIG_BOARD_PRE_INIT   1       /* call board_pre_init()        */
+#define CONFIG_BOARD_EARLY_INIT_F 1	/* call board_early_init_f()	*/
 
 #define CONFIG_SYS_CLK_FREQ	33000000 /* external frequency to pll	*/
 

include/configs/CPCI4052.h

@@ -38,7 +38,7 @@
 #define CONFIG_CPCI405		1	/* ...on a CPCI405 board	*/
 #define CONFIG_CPCI405_VER2	1	/* ...version 2			*/
 
-#define CONFIG_BOARD_PRE_INIT   1       /* call board_pre_init()        */
+#define CONFIG_BOARD_EARLY_INIT_F 1	/* call board_early_init_f()	*/
 
 #define CONFIG_SYS_CLK_FREQ	33333333 /* external frequency to pll	*/
 

include/configs/CPCI405AB.h

@@ -39,7 +39,7 @@
 #define CONFIG_CPCI405_VER2	1	/* ...version 2			*/
 #define CONFIG_CPCI405AB	1	/* ...and special AB version	*/
 
-#define CONFIG_BOARD_PRE_INIT   1       /* call board_pre_init()        */
+#define CONFIG_BOARD_EARLY_INIT_F 1	/* call board_early_init_f()	*/
 
 #define CONFIG_SYS_CLK_FREQ	33333333 /* external frequency to pll	*/
 

include/configs/CPCI440.h

@@ -33,7 +33,7 @@
  *----------------------------------------------------------------------*/
 #define CONFIG_EBONY		1	    /* Board is ebony		*/
 #define CONFIG_4xx		1	    /* ... PPC4xx family	*/
-#define CONFIG_BOARD_PRE_INIT	1	    /* Call board_pre_init	*/
+#define CONFIG_BOARD_EARLY_INIT_F 1	    /* Call board_early_init_f	*/
 #undef	CFG_DRAM_TEST			    /* Disable-takes long time! */
 #define CONFIG_SYS_CLK_FREQ	33333333    /* external freq to pll	*/
 

include/configs/CPCIISER4.h

@@ -37,7 +37,7 @@
 #define CONFIG_4xx		1	/* ...member of PPC4xx family	*/
 #define CONFIG_CPCIISER4	1	/* ...on a CPCIISER4 board	*/
 
-#define CONFIG_BOARD_PRE_INIT   1       /* call board_pre_init()        */
+#define CONFIG_BOARD_EARLY_INIT_F 1	/* call board_early_init_f()	*/
 
 #define CONFIG_SYS_CLK_FREQ	25000000 /* external frequency to pll	*/
 

include/configs/CRAYL1.h

@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2000, 2001
+ * (C) Copyright 2000-2004
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  * David Updegraff, Cray, Inc.  dave@cray.com: our 405 is walnut-lite..
  *
@@ -41,7 +41,7 @@
 #define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds	*/
 #define CONFIG_MII		    1	/* MII PHY management */
 #define	CONFIG_PHY_ADDR		1	/* PHY address; handling of ENET */
-#define CONFIG_BOARD_PRE_INIT 1 /* early setup for 405gp */
+#define CONFIG_BOARD_EARLY_INIT_F 1	/* early setup for 405gp */
 #define CONFIG_MISC_INIT_R	1	/* so that a misc_init_r() is called */
 
 /* set PRAM to keep U-Boot out, mem= to keep linux out, and initrd_hi to

include/configs/DASA_SIM.h

@@ -36,7 +36,7 @@
 #define CONFIG_IOP480		1	/* This is a IOP480 CPU		*/
 #define CONFIG_DASA_SIM		1	/* ...on a DASA_SIM board	*/
 
-#define CONFIG_BOARD_PRE_INIT   1       /* call board_pre_init()        */
+#define CONFIG_BOARD_EARLY_INIT_F 1	/* call board_early_init_f()	*/
 
 #define CONFIG_CLOCKS_IN_MHZ	1	/* clocks passsed to Linux in MHz */
 

include/configs/DB64360.h

@@ -131,7 +131,7 @@ if we use PCI it has its own MAC addr */
 
 /* which initialization functions to call for this board */
 #define CONFIG_MISC_INIT_R     /* initialize the icache L1 */
-#define CONFIG_BOARD_PRE_INIT
+#define CONFIG_BOARD_EARLY_INIT_F
 
 #define CFG_BOARD_NAME		"DB64360"
 #define CONFIG_IDENT_STRING	"Marvell DB64360 (1.1)"

include/configs/DB64460.h

@@ -68,7 +68,7 @@
 
 /* which initialization functions to call for this board */
 #define CONFIG_MISC_INIT_R     /* initialize the icache L1 */
-#define CONFIG_BOARD_PRE_INIT
+#define CONFIG_BOARD_EARLY_INIT_F
 
 #define CFG_BOARD_NAME		"DB64460"
 #define CONFIG_IDENT_STRING	"Marvell DB64460 (1.0)"

include/configs/DK1C20.h

@@ -295,7 +295,7 @@
 #define CONFIG_SYS_CLK_FREQ	CFG_NIOS_CPU_CLK/* 50 MHz core clock	*/
 #define	CFG_HZ			1000		/* 1 msec time tick	*/
 #undef  CFG_CLKS_IN_HZ
-#define	CONFIG_BOARD_PRE_INIT	1	/* enable early board-spec. init*/
+#define	CONFIG_BOARD_EARLY_INIT_F 1	/* enable early board-spec. init*/
 
 /*------------------------------------------------------------------------
  * BASE ADDRESSES / SIZE (Flash, SRAM, SDRAM)

include/configs/DK1S10.h

@@ -294,7 +294,7 @@
 #define CONFIG_SYS_CLK_FREQ	CFG_NIOS_CPU_CLK/* 50 MHz core clock	*/
 #define	CFG_HZ			1000		/* 1 msec time tick	*/
 #undef  CFG_CLKS_IN_HZ
-#define	CONFIG_BOARD_PRE_INIT	1	/* enable early board-spec. init*/
+#define	CONFIG_BOARD_EARLY_INIT_F 1	/* enable early board-spec. init*/
 
 /*------------------------------------------------------------------------
  * BASE ADDRESSES / SIZE (Flash, SRAM, SDRAM)

include/configs/DP405.h

@@ -37,7 +37,7 @@
 #define CONFIG_4xx		1	/* ...member of PPC4xx family	*/
 #define CONFIG_DP405		1	/* ...on a DP405 board		*/
 
-#define CONFIG_BOARD_PRE_INIT   1       /* call board_pre_init()        */
+#define CONFIG_BOARD_EARLY_INIT_F 1	/* call board_early_init_f()	*/
 #define CONFIG_MISC_INIT_R	1	/* call misc_init_r()		*/
 
 #define CONFIG_SYS_CLK_FREQ	33333334 /* external frequency to pll	*/

include/configs/DU405.h

@@ -37,7 +37,7 @@
 #define CONFIG_4xx		1	/* ...member of PPC4xx family	*/
 #define CONFIG_DU405		1	/* ...on a DU405 board		*/
 
-#define CONFIG_BOARD_PRE_INIT   1       /* call board_pre_init()        */
+#define CONFIG_BOARD_EARLY_INIT_F 1	/* call board_early_init_f()	*/
 
 #define CONFIG_SYS_CLK_FREQ	25000000 /* external frequency to pll	*/
 

include/configs/EBONY.h

@@ -32,7 +32,7 @@
  *----------------------------------------------------------------------*/
 #define CONFIG_EBONY		1	    /* Board is ebony		*/
 #define CONFIG_4xx		1	    /* ... PPC4xx family	*/
-#define CONFIG_BOARD_PRE_INIT	1	    /* Call board_pre_init	*/
+#define CONFIG_BOARD_EARLY_INIT_F 1	    /* Call board_early_init_f	*/
 #undef	CFG_DRAM_TEST			    /* Disable-takes long time! */
 #define CONFIG_SYS_CLK_FREQ	33333333    /* external freq to pll	*/
 

include/configs/ELPT860.h

@@ -56,7 +56,7 @@
 
 #define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds	*/
 
-#define CONFIG_BOARD_PRE_INIT   1       /* Call board_pre_init          */
+#define CONFIG_BOARD_EARLY_INIT_F 1	/* Call board_early_init_f	*/
 
 /* BOOT arguments */
 #define CONFIG_PREBOOT							   \

include/configs/ERIC.h

@@ -37,7 +37,7 @@
 #define CONFIG_4xx		1	/* ...member of PPC4xx family	*/
 #define CONFIG_ERIC		1	/* ...on a ERIC board	*/
 
-#define	CONFIG_BOARD_PRE_INIT	1	/* run board_pre_init() */
+#define	CONFIG_BOARD_EARLY_INIT_F 1	/* run board_early_init_f() */
 
 #define CONFIG_SYS_CLK_FREQ	33333333 /* external frequency to pll	*/
 

include/configs/EVB64260.h

@@ -51,7 +51,7 @@
 
 /* which initialization functions to call for this board */
 #define CONFIG_MISC_INIT_R	1
-#define CONFIG_BOARD_PRE_INIT	1
+#define CONFIG_BOARD_EARLY_INIT_F 1
 
 #ifndef CONFIG_EVB64260_750CX
 #define CFG_BOARD_NAME		"EVB64260"

include/configs/EXBITGEN.h

@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2000
+ * (C) Copyright 2000-2004
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
  * See file CREDITS for list of people who contributed to this
@@ -37,7 +37,7 @@
 #define CONFIG_4xx		1	/* ...member of PPC4xx family   */
 #define CONFIG_EXBITGEN		1	/* on a Exbit Generic board     */
 
-#define CONFIG_BOARD_PRE_INIT	1	/* Call board_pre_init		*/
+#define CONFIG_BOARD_EARLY_INIT_F 1	/* Call board_early_init_f	*/
 
 #define CONFIG_SYS_CLK_FREQ     25000000 /* external frequency to pll   */
 

include/configs/HUB405.h

@@ -37,7 +37,7 @@
 #define CONFIG_4xx		1	/* ...member of PPC4xx family	*/
 #define CONFIG_HUB405		1	/* ...on a ASH405 board		*/
 
-#define CONFIG_BOARD_PRE_INIT   1       /* call board_pre_init()        */
+#define CONFIG_BOARD_EARLY_INIT_F 1	/* call board_early_init_f()	*/
 #define CONFIG_MISC_INIT_R	1	/* call misc_init_r()		*/
 
 #define CONFIG_SYS_CLK_FREQ	33333334 /* external frequency to pll	*/

include/configs/IAD210.h

@@ -66,7 +66,7 @@
 #define CONFIG_PREBOOT	"echo;echo Type \"run flash_nfs\" to mount root filesystem over NFS;echo"
 
 /* using this define saves us updating another source file */
-#define CONFIG_BOARD_PRE_INIT  1
+#define CONFIG_BOARD_EARLY_INIT_F 1
 
 #undef	CONFIG_BOOTARGS
 /* #define CONFIG_BOOTCOMMAND							\

include/configs/IP860.h

@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2000
+ * (C) Copyright 2000-2004
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
  * See file CREDITS for list of people who contributed to this
@@ -35,7 +35,7 @@
 
 #define CONFIG_MPC860		1	/* This is a MPC860 CPU		*/
 #define CONFIG_IP860		1	/* ...on a IP860 board		*/
-#define CONFIG_BOARD_PRE_INIT	1	    /* Call board_pre_init	*/
+#define CONFIG_BOARD_EARLY_INIT_F 1	/* Call board_early_init_f	*/
 
 #define	CONFIG_8xx_CONS_SMC1	1	/* Console is on SMC1		*/
 #define CONFIG_BAUDRATE		9600

include/configs/MHPC.h

@@ -40,7 +40,7 @@
  */
 #define CONFIG_MPC823		1	/* This is a MPC823 CPU		*/
 #define CONFIG_MHPC		1	/* on a miniHiPerCam		*/
-#define CONFIG_BOARD_PRE_INIT   1       /* do special hardware init.    */
+#define CONFIG_BOARD_EARLY_INIT_F 1	/* do special hardware init.	*/
 #define CONFIG_MISC_INIT_R	1
 
 #define CONFIG_8xx_GCLK_FREQ	MPC8XX_SPEED

include/configs/MIP405.h

@@ -252,7 +252,7 @@
 /* Size: 0=1MB, 1=2MB, 2=4MB, 3=8MB, 4=16MB, 5=32MB, 6=64MB, 7=128MB */
 #define FLASH_SIZE_PRELIM	 3  /* maximal flash FLASH size bank #0	*/
 
-#define CONFIG_BOARD_PRE_INIT
+#define CONFIG_BOARD_EARLY_INIT_F 1
 
 /* Peripheral Bus Mapping */
 #define PER_PLD_ADDR		0xF4000000 /* smallest window is 1MByte 0x10 0000*/

include/configs/MPC8260ADS.h

@@ -51,7 +51,7 @@
 #define CONFIG_ADSTYPE		CFG_8260ADS
 #endif /* CONFIG_ADSTYPE */
 
-#define CONFIG_BOARD_PRE_INIT	1	/* Call board_pre_init	*/
+#define CONFIG_BOARD_EARLY_INIT_F 1	/* Call board_early_init_f	*/
 
 /* allow serial and ethaddr to be overwritten */
 #define CONFIG_ENV_OVERWRITE

include/configs/MPC8266ADS.h

@@ -50,9 +50,9 @@
  */
 
 #define CONFIG_MPC8260		1	/* This is an MPC8260 CPU	*/
-#define CONFIG_MPC8266ADS	1	/* ...on motorola ads board */
+#define CONFIG_MPC8266ADS	1	/* ...on motorola ADS board	*/
 
-#define CONFIG_BOARD_PRE_INIT	1	/* Call board_pre_init	*/
+#define CONFIG_BOARD_EARLY_INIT_F 1	/* Call board_early_init_f	*/
 
 /* allow serial and ethaddr to be overwritten */
 #define CONFIG_ENV_OVERWRITE

include/configs/MPC8540ADS.h

@@ -68,7 +68,7 @@
 #undef	CONFIG_BTB			    /* toggle branch predition	*/
 #undef	CONFIG_ADDR_STREAMING		    /* toggle addr streaming	*/
 
-#define CONFIG_BOARD_PRE_INIT	1	    /* Call board_pre_init	*/
+#define CONFIG_BOARD_EARLY_INIT_F 1	    /* Call board_early_init_f	*/
 
 #undef	CFG_DRAM_TEST			    /* memory test, takes time	*/
 #define CFG_MEMTEST_START	0x00200000	/* memtest works on	*/

include/configs/MPC8560ADS.h

@@ -69,7 +69,7 @@
 #undef	CONFIG_BTB			    /* toggle branch predition	*/
 #undef	CONFIG_ADDR_STREAMING		    /* toggle addr streaming	*/
 
-#define CONFIG_BOARD_PRE_INIT   1           /* Call board_pre_init      */
+#define CONFIG_BOARD_EARLY_INIT_F 1	    /* Call board_early_init_f	*/
 
 #undef	CFG_DRAM_TEST			    /* memory test, takes time	*/
 #define CFG_MEMTEST_START	0x00200000  /* memtest region */

include/configs/NETVIA.h

@@ -105,7 +105,7 @@
 #define CONFIG_COMMANDS		CONFIG_COMMANDS_BASE
 #endif
 
-#define CONFIG_BOARD_PRE_INIT
+#define CONFIG_BOARD_EARLY_INIT_F 1
 #define CONFIG_MISC_INIT_R
 
 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */

include/configs/OCRTC.h

@@ -37,7 +37,7 @@
 #define CONFIG_4xx		1	/* ...member of PPC4xx family	*/
 #define CONFIG_OCRTC		1	/* ...on a OCRTC board		*/
 
-#define CONFIG_BOARD_PRE_INIT   1       /* call board_pre_init()        */
+#define CONFIG_BOARD_EARLY_INIT_F 1	/* call board_early_init_f()	*/
 
 #define CONFIG_SYS_CLK_FREQ	33000000 /* external frequency to pll	*/
 

include/configs/ORSG.h

@@ -37,7 +37,7 @@
 #define CONFIG_4xx		1	/* ...member of PPC4xx family	*/
 #define CONFIG_ORSG		1	/* ...on a ORSG board		*/
 
-#define CONFIG_BOARD_PRE_INIT   1       /* call board_pre_init()        */
+#define CONFIG_BOARD_EARLY_INIT_F 1	/* call board_early_init_f()	*/
 
 #define CONFIG_SYS_CLK_FREQ	33000000 /* external frequency to pll	*/
 

include/configs/OXC.h

@@ -39,7 +39,7 @@
 #define CONFIG_MPC8240		1
 #define CONFIG_OXC		1
 
-#define CONFIG_BOARD_PRE_INIT	1	/* Call board_pre_init	*/
+#define CONFIG_BOARD_EARLY_INIT_F 1	/* Call board_early_init_f	*/
 
 #define CONFIG_IDENT_STRING     " [oxc] "
 

include/configs/P3G4.h

@@ -51,7 +51,7 @@
 
 /* which initialization functions to call for this board */
 #define CONFIG_MISC_INIT_R	1
-#define CONFIG_BOARD_PRE_INIT	1
+#define CONFIG_BOARD_EARLY_INIT_F 1
 
 #define CFG_BOARD_NAME		"P3G4"