Every makefile in sub directories has common lines at the top and the bottom. This commit pushes the common parts into script/Makefile.build. Going forward sub-makefiles only need to describe this part: COBJS := ... COBJS += ... SOBJS := ... But using obj-y is preferable to prepare for switching to Kbuild. The conventional (non-Kbuild) Makefile style is still supported. This is achieved by greping the Makefile before entering into it. U-Boot conventional sub makefiles always include some other makefiles. So the build system searches a line beginning with "include" keyword in the makefile in order to distinguish which style it is. If the Makefile include a "include" line, we assume it is a conventional U-Boot style. Otherwise, it is treated as a Kbuild-style makefile. With this tweak, we can switch sub-makefiles from U-Boot style to Kbuild style little by little. obj-y := foo/ syntax (descending into the sub directory) is not supportd yet. It will be implemented in the upcomming commit. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@ti.com>master
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# our default target
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.PHONY: all |
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all: |
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include $(TOPDIR)/config.mk |
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LIB := $(obj)built-in.o
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LIBGCC = $(obj)libgcc.o
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SRCS :=
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include Makefile |
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# Backward compatible: obj-y is preferable
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COBJS := $(sort $(COBJS) $(COBJS-y))
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SOBJS := $(sort $(SOBJS) $(SOBJS-y))
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# Going forward use the following
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obj-y := $(sort $(obj-y))
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extra-y := $(sort $(extra-y))
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lib-y := $(sort $(lib-y))
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SRCS += $(COBJS:.o=.c) $(SOBJS:.o=.S) \
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$(wildcard $(obj-y:.o=.c) $(obj-y:.o=.S) $(lib-y:.o=.c) $(lib-y:.o=.S) $(extra-y:.o=.c) $(extra-y:.o=.S))
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OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS) $(obj-y))
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LGOBJS := $(addprefix $(obj),$(sort $(GLSOBJS) $(GLCOBJS)) $(lib-y))
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all: $(LIB) $(addprefix $(obj),$(extra-y)) |
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$(LIB): $(obj).depend $(OBJS) |
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$(call cmd_link_o_target, $(OBJS))
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ifneq ($(strip $(lib-y)),) |
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all: $(LIBGCC) |
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$(LIBGCC): $(obj).depend $(LGOBJS) |
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$(call cmd_link_o_target, $(LGOBJS))
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endif |
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#########################################################################
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# defines $(obj).depend target
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include $(TOPDIR)/rules.mk |
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sinclude $(obj).depend |
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#########################################################################
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