net: sh-eth: Add to Kconfig and convert

This adds SH_ETHER to drivers/net/Kconfig and convert to Kconfig.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
master
Nobuhiro Iwamatsu 7 years ago committed by Joe Hershberger
parent aae5d237b9
commit dcd18eaf61
  1. 3
      configs/alt_defconfig
  2. 3
      configs/ap_sh4a_4a_defconfig
  3. 3
      configs/armadillo-800eva_defconfig
  4. 3
      configs/ecovec_defconfig
  5. 3
      configs/espt_defconfig
  6. 3
      configs/gose_defconfig
  7. 3
      configs/koelsch_defconfig
  8. 3
      configs/lager_defconfig
  9. 3
      configs/porter_defconfig
  10. 3
      configs/r0p7734_defconfig
  11. 3
      configs/sh7752evb_defconfig
  12. 3
      configs/sh7753evb_defconfig
  13. 3
      configs/sh7757lcr_defconfig
  14. 3
      configs/sh7763rdp_defconfig
  15. 3
      configs/silk_defconfig
  16. 3
      configs/stout_defconfig
  17. 6
      drivers/net/Kconfig
  18. 1
      include/configs/alt.h
  19. 1
      include/configs/ap_sh4a_4a.h
  20. 1
      include/configs/armadillo-800eva.h
  21. 1
      include/configs/ecovec.h
  22. 1
      include/configs/espt.h
  23. 1
      include/configs/gose.h
  24. 1
      include/configs/koelsch.h
  25. 1
      include/configs/lager.h
  26. 1
      include/configs/porter.h
  27. 1
      include/configs/r0p7734.h
  28. 1
      include/configs/sh7752evb.h
  29. 1
      include/configs/sh7753evb.h
  30. 1
      include/configs/sh7757lcr.h
  31. 1
      include/configs/sh7763rdp.h
  32. 1
      include/configs/silk.h
  33. 1
      include/configs/stout.h
  34. 1
      scripts/config_whitelist.txt

@ -24,7 +24,8 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
CONFIG_SH_ETHER=y
CONFIG_PHY_MICREL=y
CONFIG_BAUDRATE=38400
CONFIG_SCIF_CONSOLE=y

@ -25,6 +25,7 @@ CONFIG_CMD_PING=y
# CONFIG_CMD_MISC is not set
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
CONFIG_SH_ETHER=y
CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y

@ -27,6 +27,7 @@ CONFIG_CMD_PING=y
# CONFIG_CMD_MISC is not set
CONFIG_ENV_IS_IN_FLASH=y
# CONFIG_MMC is not set
CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
CONFIG_SH_ETHER=y
CONFIG_SCIF_CONSOLE=y
CONFIG_OF_LIBFDT=y

@ -29,7 +29,8 @@ CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
CONFIG_SH_ETHER=y
CONFIG_SCIF_CONSOLE=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y

@ -25,6 +25,7 @@ CONFIG_CMD_PING=y
# CONFIG_CMD_MISC is not set
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
CONFIG_SH_ETHER=y
CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y

@ -24,8 +24,9 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
CONFIG_NETDEVICES=y
CONFIG_SH_ETHER=y
CONFIG_BAUDRATE=38400
CONFIG_SCIF_CONSOLE=y
CONFIG_USB=y

@ -24,8 +24,9 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
CONFIG_NETDEVICES=y
CONFIG_SH_ETHER=y
CONFIG_BAUDRATE=38400
CONFIG_SCIF_CONSOLE=y
CONFIG_USB=y

@ -24,8 +24,9 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
CONFIG_NETDEVICES=y
CONFIG_SH_ETHER=y
CONFIG_BAUDRATE=38400
CONFIG_SCIF_CONSOLE=y
CONFIG_USB=y

@ -24,8 +24,9 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
CONFIG_NETDEVICES=y
CONFIG_SH_ETHER=y
CONFIG_BAUDRATE=38400
CONFIG_SCIF_CONSOLE=y
CONFIG_USB=y

@ -25,6 +25,7 @@ CONFIG_CMD_PING=y
# CONFIG_CMD_MISC is not set
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
CONFIG_SH_ETHER=y
CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y

@ -34,6 +34,7 @@ CONFIG_MMC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
CONFIG_SH_ETHER=y
CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y

@ -33,6 +33,7 @@ CONFIG_MMC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
CONFIG_SH_ETHER=y
CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y

@ -33,6 +33,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_MMC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
CONFIG_SH_ETHER=y
CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y

@ -26,6 +26,7 @@ CONFIG_CMD_PING=y
CONFIG_CMD_JFFS2=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
CONFIG_SH_ETHER=y
CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y

@ -24,8 +24,9 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
CONFIG_NETDEVICES=y
CONFIG_SH_ETHER=y
CONFIG_BAUDRATE=38400
CONFIG_SCIF_CONSOLE=y
CONFIG_USB=y

@ -24,8 +24,9 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
CONFIG_NETDEVICES=y
CONFIG_SH_ETHER=y
CONFIG_BAUDRATE=38400
CONFIG_SCIF_CONSOLE=y
CONFIG_USB=y

@ -276,6 +276,12 @@ config SUN8I_EMAC
It can be found in H3/A64/A83T based SoCs and compatible with both
External and Internal PHYs.
config SH_ETHER
bool "Renesas SH Ethernet MAC"
select PHYLIB
help
This driver supports the Ethernet for Renesas SH and ARM SoCs.
config XILINX_AXIEMAC
depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP)
select PHYLIB

@ -44,7 +44,6 @@
#define CONFIG_SPI_FLASH_QUAD
/* SH Ether */
#define CONFIG_SH_ETHER
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII

@ -18,7 +18,6 @@
#undef CONFIG_SHOW_BOOT_PROGRESS
/* Ether */
#define CONFIG_SH_ETHER 1
#define CONFIG_SH_ETHER_USE_PORT (0)
#define CONFIG_SH_ETHER_PHY_ADDR (0x0)
#define CONFIG_SH_ETHER_PHY_MODE (PHY_INTERFACE_MODE_GMII)

@ -88,7 +88,6 @@
#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
/* SH Ether */
#define CONFIG_SH_ETHER
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x0
#define CONFIG_SH_ETHER_BASE_ADDR 0xe9a00000

@ -44,7 +44,6 @@
#define CONFIG_SH_I2C_CLOCK 41666666
/* Ether */
#define CONFIG_SH_ETHER 1
#define CONFIG_SH_ETHER_USE_PORT (0)
#define CONFIG_SH_ETHER_PHY_ADDR (0x1f)
#define CONFIG_PHY_SMSC 1

@ -77,7 +77,6 @@
#define CONFIG_SYS_TMU_CLK_DIV 4
/* Ether */
#define CONFIG_SH_ETHER 1
#define CONFIG_SH_ETHER_USE_PORT (1)
#define CONFIG_SH_ETHER_PHY_ADDR (0x00)
#define CONFIG_BITBANGMII

@ -44,7 +44,6 @@
#define CONFIG_SH_QSPI
/* SH Ether */
#define CONFIG_SH_ETHER
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII

@ -44,7 +44,6 @@
#define CONFIG_SH_QSPI
/* SH Ether */
#define CONFIG_SH_ETHER
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII

@ -44,7 +44,6 @@
#define CONFIG_SH_QSPI
/* SH Ether */
#define CONFIG_SH_ETHER
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII

@ -45,7 +45,6 @@
#define CONFIG_SPI_FLASH_QUAD
/* SH Ether */
#define CONFIG_SH_ETHER
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII

@ -18,7 +18,6 @@
#undef CONFIG_SHOW_BOOT_PROGRESS
/* Ether */
#define CONFIG_SH_ETHER 1
#define CONFIG_SH_ETHER_USE_PORT (0)
#define CONFIG_SH_ETHER_PHY_ADDR (0x0)
#define CONFIG_PHY_SMSC 1

@ -47,7 +47,6 @@
#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
/* Ether */
#define CONFIG_SH_ETHER 1
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 18
#define CONFIG_SH_ETHER_CACHE_WRITEBACK 1

@ -47,7 +47,6 @@
#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
/* Ether */
#define CONFIG_SH_ETHER 1
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 18
#define CONFIG_SH_ETHER_CACHE_WRITEBACK 1

@ -48,7 +48,6 @@
#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
/* Ether */
#define CONFIG_SH_ETHER 1
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 1
#define CONFIG_SH_ETHER_CACHE_WRITEBACK 1

@ -77,7 +77,6 @@
#define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */
/* Ether */
#define CONFIG_SH_ETHER 1
#define CONFIG_SH_ETHER_USE_PORT (1)
#define CONFIG_SH_ETHER_PHY_ADDR (0x01)
#define CONFIG_BITBANGMII

@ -45,7 +45,6 @@
#define CONFIG_SPI_FLASH_QUAD
/* SH Ether */
#define CONFIG_SH_ETHER
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII

@ -48,7 +48,6 @@
#define CONFIG_SPI_FLASH_QUAD
/* SH Ether */
#define CONFIG_SH_ETHER
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII

@ -1924,7 +1924,6 @@ CONFIG_SHOW_ACTIVITY
CONFIG_SHOW_BOOT_PROGRESS
CONFIG_SH_CMT_CLK_FREQ
CONFIG_SH_DSP
CONFIG_SH_ETHER
CONFIG_SH_ETHER_ALIGNE_SIZE
CONFIG_SH_ETHER_BASE_ADDR
CONFIG_SH_ETHER_CACHE_INVALIDATE

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