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@ -149,6 +149,36 @@ static struct nand_ecclayout nand_soft_eccoob = { |
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}; |
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#endif |
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#ifdef CONFIG_MX27 |
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static int is_16bit_nand(void) |
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{ |
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struct system_control_regs *sc_regs = |
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(struct system_control_regs *)IMX_SYSTEM_CTL_BASE; |
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if (readl(&sc_regs->fmcr) & NF_16BIT_SEL) |
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return 1; |
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else |
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return 0; |
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} |
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#elif defined(CONFIG_MX31) |
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static int is_16bit_nand(void) |
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{ |
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struct clock_control_regs *sc_regs = |
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(struct clock_control_regs *)CCM_BASE; |
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if (readl(&sc_regs->rcsr) & CCM_RCSR_NF16B) |
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return 1; |
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else |
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return 0; |
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} |
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#else |
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#warning "8/16 bit NAND autodetection not supported" |
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static int is_16bit_nand(void) |
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{ |
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return 0; |
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} |
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#endif |
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static uint32_t *mxc_nand_memcpy32(uint32_t *dest, uint32_t *source, size_t size) |
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{ |
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uint32_t *d = dest; |
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@ -808,8 +838,6 @@ static void mxc_nand_command(struct mtd_info *mtd, unsigned command, |
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int board_nand_init(struct nand_chip *this) |
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{ |
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struct system_control_regs *sc_regs = |
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(struct system_control_regs *)IMX_SYSTEM_CTL_BASE; |
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struct mtd_info *mtd; |
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uint16_t tmp; |
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int err = 0; |
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@ -871,7 +899,7 @@ int board_nand_init(struct nand_chip *this) |
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writew(0x4, &host->regs->nfc_wrprot); |
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/* NAND bus width determines access funtions used by upper layer */ |
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if (readl(&sc_regs->fmcr) & NF_16BIT_SEL) |
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if (is_16bit_nand()) |
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this->options |= NAND_BUSWIDTH_16; |
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host->pagesize_2k = 0; |
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