Wolfgang Denk
17 years ago
commit
f9eabcb357
@ -0,0 +1,661 @@ |
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/* Gaisler.com GRETH 10/100/1000 Ethernet MAC driver
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* |
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* Driver use polling mode (no Interrupt) |
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* |
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* (C) Copyright 2007 |
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* Daniel Hellstrom, Gaisler Research, daniel@gaisler.com |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <command.h> |
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#include <net.h> |
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#include <malloc.h> |
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#include <asm/processor.h> |
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#include <ambapp.h> |
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#include <asm/leon.h> |
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/* #define DEBUG */ |
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#include "greth.h" |
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/* Default to 3s timeout on autonegotiation */ |
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#ifndef GRETH_PHY_TIMEOUT_MS |
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#define GRETH_PHY_TIMEOUT_MS 3000 |
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#endif |
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/* ByPass Cache when reading regs */ |
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#define GRETH_REGLOAD(addr) SPARC_NOCACHE_READ(addr) |
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/* Write-through cache ==> no bypassing needed on writes */ |
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#define GRETH_REGSAVE(addr,data) (*(unsigned int *)(addr) = (data)) |
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#define GRETH_REGORIN(addr,data) GRETH_REGSAVE(addr,GRETH_REGLOAD(addr)|data) |
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#define GRETH_REGANDIN(addr,data) GRETH_REGSAVE(addr,GRETH_REGLOAD(addr)&data) |
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#define GRETH_RXBD_CNT 4 |
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#define GRETH_TXBD_CNT 1 |
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#define GRETH_RXBUF_SIZE 1540 |
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#define GRETH_BUF_ALIGN 4 |
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#define GRETH_RXBUF_EFF_SIZE \ |
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( (GRETH_RXBUF_SIZE&~(GRETH_BUF_ALIGN-1))+GRETH_BUF_ALIGN ) |
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typedef struct { |
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greth_regs *regs; |
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int irq; |
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struct eth_device *dev; |
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/* Hardware info */ |
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unsigned char phyaddr; |
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int gbit_mac; |
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/* Current operating Mode */ |
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int gb; /* GigaBit */ |
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int fd; /* Full Duplex */ |
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int sp; /* 10/100Mbps speed (1=100,0=10) */ |
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int auto_neg; /* Auto negotiate done */ |
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unsigned char hwaddr[6]; /* MAC Address */ |
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/* Descriptors */ |
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greth_bd *rxbd_base, *rxbd_max; |
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greth_bd *txbd_base, *txbd_max; |
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greth_bd *rxbd_curr; |
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/* rx buffers in rx descriptors */ |
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void *rxbuf_base; /* (GRETH_RXBUF_SIZE+ALIGNBYTES) * GRETH_RXBD_CNT */ |
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/* unused for gbit_mac, temp buffer for sending packets with unligned
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* start. |
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* Pointer to packet allocated with malloc. |
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*/ |
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void *txbuf; |
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struct { |
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/* rx status */ |
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unsigned int rx_packets, |
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rx_crc_errors, rx_frame_errors, rx_length_errors, rx_errors; |
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/* tx stats */ |
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unsigned int tx_packets, |
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tx_latecol_errors, |
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tx_underrun_errors, tx_limit_errors, tx_errors; |
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} stats; |
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} greth_priv; |
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/* Read MII register 'addr' from core 'regs' */ |
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static int read_mii(int addr, volatile greth_regs * regs) |
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{ |
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while (GRETH_REGLOAD(®s->mdio) & GRETH_MII_BUSY) { |
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} |
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GRETH_REGSAVE(®s->mdio, (0 << 11) | ((addr & 0x1F) << 6) | 2); |
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while (GRETH_REGLOAD(®s->mdio) & GRETH_MII_BUSY) { |
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} |
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if (!(GRETH_REGLOAD(®s->mdio) & GRETH_MII_NVALID)) { |
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return (GRETH_REGLOAD(®s->mdio) >> 16) & 0xFFFF; |
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} else { |
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return -1; |
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} |
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} |
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static void write_mii(int addr, int data, volatile greth_regs * regs) |
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{ |
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while (GRETH_REGLOAD(®s->mdio) & GRETH_MII_BUSY) { |
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} |
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GRETH_REGSAVE(®s->mdio, |
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((data & 0xFFFF) << 16) | (0 << 11) | ((addr & 0x1F) << 6) |
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| 1); |
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while (GRETH_REGLOAD(®s->mdio) & GRETH_MII_BUSY) { |
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} |
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} |
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/* init/start hardware and allocate descriptor buffers for rx side
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* |
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*/ |
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int greth_init(struct eth_device *dev, bd_t * bis) |
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{ |
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int i; |
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greth_priv *greth = dev->priv; |
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greth_regs *regs = greth->regs; |
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#ifdef DEBUG |
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printf("greth_init\n"); |
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#endif |
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GRETH_REGSAVE(®s->control, 0); |
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if (!greth->rxbd_base) { |
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/* allocate descriptors */ |
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greth->rxbd_base = (greth_bd *) |
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memalign(0x1000, GRETH_RXBD_CNT * sizeof(greth_bd)); |
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greth->txbd_base = (greth_bd *) |
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memalign(0x1000, GRETH_RXBD_CNT * sizeof(greth_bd)); |
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/* allocate buffers to all descriptors */ |
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greth->rxbuf_base = |
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malloc(GRETH_RXBUF_EFF_SIZE * GRETH_RXBD_CNT); |
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} |
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/* initate rx decriptors */ |
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for (i = 0; i < GRETH_RXBD_CNT; i++) { |
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greth->rxbd_base[i].addr = (unsigned int) |
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greth->rxbuf_base + (GRETH_RXBUF_EFF_SIZE * i); |
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/* enable desciptor & set wrap bit if last descriptor */ |
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if (i >= (GRETH_RXBD_CNT - 1)) { |
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greth->rxbd_base[i].stat = GRETH_BD_EN | GRETH_BD_WR; |
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} else { |
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greth->rxbd_base[i].stat = GRETH_BD_EN; |
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} |
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} |
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/* initiate indexes */ |
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greth->rxbd_curr = greth->rxbd_base; |
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greth->rxbd_max = greth->rxbd_base + (GRETH_RXBD_CNT - 1); |
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greth->txbd_max = greth->txbd_base + (GRETH_TXBD_CNT - 1); |
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/*
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* greth->txbd_base->addr = 0; |
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* greth->txbd_base->stat = GRETH_BD_WR; |
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*/ |
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/* initate tx decriptors */ |
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for (i = 0; i < GRETH_TXBD_CNT; i++) { |
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greth->txbd_base[i].addr = 0; |
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/* enable desciptor & set wrap bit if last descriptor */ |
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if (i >= (GRETH_RXBD_CNT - 1)) { |
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greth->txbd_base[i].stat = GRETH_BD_WR; |
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} else { |
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greth->txbd_base[i].stat = 0; |
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} |
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} |
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/**** SET HARDWARE REGS ****/ |
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/* Set pointer to tx/rx descriptor areas */ |
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GRETH_REGSAVE(®s->rx_desc_p, (unsigned int)&greth->rxbd_base[0]); |
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GRETH_REGSAVE(®s->tx_desc_p, (unsigned int)&greth->txbd_base[0]); |
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/* Enable Transmitter, GRETH will now scan descriptors for packets
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* to transmitt */ |
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#ifdef DEBUG |
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printf("greth_init: enabling receiver\n"); |
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#endif |
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GRETH_REGORIN(®s->control, GRETH_RXEN); |
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return 0; |
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} |
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/* Initiate PHY to a relevant speed
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* return: |
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* - 0 = success |
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* - 1 = timeout/fail |
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*/ |
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int greth_init_phy(greth_priv * dev, bd_t * bis) |
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{ |
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greth_regs *regs = dev->regs; |
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int tmp, tmp1, tmp2, i; |
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unsigned int start, timeout; |
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/* X msecs to ticks */ |
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timeout = usec2ticks(GRETH_PHY_TIMEOUT_MS * 1000); |
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/* Get system timer0 current value
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* Total timeout is 5s |
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*/ |
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start = get_timer(0); |
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/* get phy control register default values */ |
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while ((tmp = read_mii(0, regs)) & 0x8000) { |
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if (get_timer(start) > timeout) |
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return 1; /* Fail */ |
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} |
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/* reset PHY and wait for completion */ |
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write_mii(0, 0x8000 | tmp, regs); |
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while (((tmp = read_mii(0, regs))) & 0x8000) { |
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if (get_timer(start) > timeout) |
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return 1; /* Fail */ |
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} |
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/* Check if PHY is autoneg capable and then determine operating
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* mode, otherwise force it to 10 Mbit halfduplex |
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*/ |
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dev->gb = 0; |
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dev->fd = 0; |
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dev->sp = 0; |
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dev->auto_neg = 0; |
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if (!((tmp >> 12) & 1)) { |
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write_mii(0, 0, regs); |
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} else { |
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/* wait for auto negotiation to complete and then check operating mode */ |
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dev->auto_neg = 1; |
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i = 0; |
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while (!(((tmp = read_mii(1, regs)) >> 5) & 1)) { |
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if (get_timer(start) > timeout) { |
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printf("Auto negotiation timed out. " |
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"Selecting default config\n"); |
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tmp = read_mii(0, regs); |
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dev->gb = ((tmp >> 6) & 1) |
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&& !((tmp >> 13) & 1); |
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dev->sp = !((tmp >> 6) & 1) |
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&& ((tmp >> 13) & 1); |
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dev->fd = (tmp >> 8) & 1; |
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goto auto_neg_done; |
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} |
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} |
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if ((tmp >> 8) & 1) { |
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tmp1 = read_mii(9, regs); |
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tmp2 = read_mii(10, regs); |
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if ((tmp1 & GRETH_MII_EXTADV_1000FD) && |
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(tmp2 & GRETH_MII_EXTPRT_1000FD)) { |
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dev->gb = 1; |
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dev->fd = 1; |
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} |
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if ((tmp1 & GRETH_MII_EXTADV_1000HD) && |
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(tmp2 & GRETH_MII_EXTPRT_1000HD)) { |
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dev->gb = 1; |
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dev->fd = 0; |
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} |
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} |
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if ((dev->gb == 0) || ((dev->gb == 1) && (dev->gbit_mac == 0))) { |
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tmp1 = read_mii(4, regs); |
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tmp2 = read_mii(5, regs); |
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if ((tmp1 & GRETH_MII_100TXFD) && |
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(tmp2 & GRETH_MII_100TXFD)) { |
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dev->sp = 1; |
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dev->fd = 1; |
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} |
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if ((tmp1 & GRETH_MII_100TXHD) && |
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(tmp2 & GRETH_MII_100TXHD)) { |
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dev->sp = 1; |
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dev->fd = 0; |
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} |
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if ((tmp1 & GRETH_MII_10FD) && (tmp2 & GRETH_MII_10FD)) { |
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dev->fd = 1; |
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} |
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if ((dev->gb == 1) && (dev->gbit_mac == 0)) { |
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dev->gb = 0; |
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dev->fd = 0; |
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write_mii(0, dev->sp << 13, regs); |
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} |
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} |
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} |
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auto_neg_done: |
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#ifdef DEBUG |
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printf("%s GRETH Ethermac at [0x%x] irq %d. Running \
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%d Mbps %s duplex\n", dev->gbit_mac ? "10/100/1000" : "10/100", (unsigned int)(regs), (unsigned int)(dev->irq), dev->gb ? 1000 : (dev->sp ? 100 : 10), dev->fd ? "full" : "half"); |
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#endif |
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/* Read out PHY info if extended registers are available */ |
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if (tmp & 1) { |
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tmp1 = read_mii(2, regs); |
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tmp2 = read_mii(3, regs); |
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tmp1 = (tmp1 << 6) | ((tmp2 >> 10) & 0x3F); |
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tmp = tmp2 & 0xF; |
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tmp2 = (tmp2 >> 4) & 0x3F; |
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#ifdef DEBUG |
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printf("PHY: Vendor %x Device %x Revision %d\n", tmp1, |
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tmp2, tmp); |
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#endif |
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} else { |
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printf("PHY info not available\n"); |
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} |
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/* set speed and duplex bits in control register */ |
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GRETH_REGORIN(®s->control, |
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(dev->gb << 8) | (dev->sp << 7) | (dev->fd << 4)); |
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return 0; |
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} |
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void greth_halt(struct eth_device *dev) |
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{ |
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greth_priv *greth; |
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greth_regs *regs; |
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int i; |
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#ifdef DEBUG |
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printf("greth_halt\n"); |
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#endif |
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if (!dev || !dev->priv) |
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return; |
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greth = dev->priv; |
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regs = greth->regs; |
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if (!regs) |
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return; |
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/* disable receiver/transmitter by clearing the enable bits */ |
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GRETH_REGANDIN(®s->control, ~(GRETH_RXEN | GRETH_TXEN)); |
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/* reset rx/tx descriptors */ |
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if (greth->rxbd_base) { |
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for (i = 0; i < GRETH_RXBD_CNT; i++) { |
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greth->rxbd_base[i].stat = |
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(i >= (GRETH_RXBD_CNT - 1)) ? GRETH_BD_WR : 0; |
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} |
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} |
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if (greth->txbd_base) { |
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for (i = 0; i < GRETH_TXBD_CNT; i++) { |
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greth->txbd_base[i].stat = |
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(i >= (GRETH_TXBD_CNT - 1)) ? GRETH_BD_WR : 0; |
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} |
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} |
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} |
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int greth_send(struct eth_device *dev, volatile void *eth_data, int data_length) |
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{ |
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greth_priv *greth = dev->priv; |
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greth_regs *regs = greth->regs; |
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greth_bd *txbd; |
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void *txbuf; |
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unsigned int status; |
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#ifdef DEBUG |
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printf("greth_send\n"); |
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#endif |
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/* send data, wait for data to be sent, then return */ |
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if (((unsigned int)eth_data & (GRETH_BUF_ALIGN - 1)) |
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&& !greth->gbit_mac) { |
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/* data not aligned as needed by GRETH 10/100, solve this by allocating 4 byte aligned buffer
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* and copy data to before giving it to GRETH. |
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*/ |
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if (!greth->txbuf) { |
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greth->txbuf = malloc(GRETH_RXBUF_SIZE); |
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#ifdef DEBUG |
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printf("GRETH: allocated aligned tx-buf\n"); |
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#endif |
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} |
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txbuf = greth->txbuf; |
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/* copy data info buffer */ |
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memcpy((char *)txbuf, (char *)eth_data, data_length); |
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/* keep buffer to next time */ |
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} else { |
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txbuf = (void *)eth_data; |
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} |
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/* get descriptor to use, only 1 supported... hehe easy */ |
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txbd = greth->txbd_base; |
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/* setup descriptor to wrap around to it self */ |
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txbd->addr = (unsigned int)txbuf; |
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txbd->stat = GRETH_BD_EN | GRETH_BD_WR | data_length; |
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/* Remind Core which descriptor to use when sending */ |
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GRETH_REGSAVE(®s->tx_desc_p, (unsigned int)txbd); |
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/* initate send by enabling transmitter */ |
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GRETH_REGORIN(®s->control, GRETH_TXEN); |
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/* Wait for data to be sent */ |
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while ((status = GRETH_REGLOAD(&txbd->stat)) & GRETH_BD_EN) { |
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; |
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} |
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/* was the packet transmitted succesfully? */ |
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if (status & GRETH_TXBD_ERR_AL) { |
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greth->stats.tx_limit_errors++; |
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} |
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if (status & GRETH_TXBD_ERR_UE) { |
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greth->stats.tx_underrun_errors++; |
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} |
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if (status & GRETH_TXBD_ERR_LC) { |
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greth->stats.tx_latecol_errors++; |
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} |
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if (status & |
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(GRETH_TXBD_ERR_LC | GRETH_TXBD_ERR_UE | GRETH_TXBD_ERR_AL)) { |
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/* any error */ |
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greth->stats.tx_errors++; |
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return -1; |
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} |
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/* bump tx packet counter */ |
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greth->stats.tx_packets++; |
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/* return succefully */ |
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return 0; |
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} |
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int greth_recv(struct eth_device *dev) |
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{ |
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greth_priv *greth = dev->priv; |
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greth_regs *regs = greth->regs; |
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greth_bd *rxbd; |
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unsigned int status, len = 0, bad; |
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unsigned char *d; |
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int enable = 0; |
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int i; |
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#ifdef DEBUG |
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/* printf("greth_recv\n"); */ |
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#endif |
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/* Receive One packet only, but clear as many error packets as there are
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* available. |
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*/ |
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{ |
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/* current receive descriptor */ |
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rxbd = greth->rxbd_curr; |
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/* get status of next received packet */ |
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status = GRETH_REGLOAD(&rxbd->stat); |
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bad = 0; |
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/* stop if no more packets received */ |
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if (status & GRETH_BD_EN) { |
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goto done; |
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} |
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#ifdef DEBUG |
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printf("greth_recv: packet 0x%lx, 0x%lx, len: %d\n", |
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(unsigned int)rxbd, status, status & GRETH_BD_LEN); |
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#endif |
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/* Check status for errors.
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*/ |
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if (status & GRETH_RXBD_ERR_FT) { |
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greth->stats.rx_length_errors++; |
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bad = 1; |
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} |
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if (status & (GRETH_RXBD_ERR_AE | GRETH_RXBD_ERR_OE)) { |
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greth->stats.rx_frame_errors++; |
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bad = 1; |
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} |
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if (status & GRETH_RXBD_ERR_CRC) { |
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greth->stats.rx_crc_errors++; |
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bad = 1; |
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} |
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if (bad) { |
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greth->stats.rx_errors++; |
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printf |
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("greth_recv: Bad packet (%d, %d, %d, 0x%08x, %d)\n", |
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greth->stats.rx_length_errors, |
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greth->stats.rx_frame_errors, |
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greth->stats.rx_crc_errors, status, |
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greth->stats.rx_packets); |
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/* print all rx descriptors */ |
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for (i = 0; i < GRETH_RXBD_CNT; i++) { |
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printf("[%d]: Stat=0x%lx, Addr=0x%lx\n", i, |
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GRETH_REGLOAD(&greth->rxbd_base[i].stat), |
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GRETH_REGLOAD(&greth->rxbd_base[i]. |
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addr)); |
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} |
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} else { |
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/* Process the incoming packet. */ |
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len = status & GRETH_BD_LEN; |
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d = (char *)rxbd->addr; |
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#ifdef DEBUG |
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printf |
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("greth_recv: new packet, length: %d. data: %x %x %x %x %x %x %x %x\n", |
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len, d[0], d[1], d[2], d[3], d[4], d[5], d[6], |
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d[7]); |
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#endif |
||||
/* flush all data cache to make sure we're not reading old packet data */ |
||||
sparc_dcache_flush_all(); |
||||
|
||||
/* pass packet on to network subsystem */ |
||||
NetReceive((void *)d, len); |
||||
|
||||
/* bump stats counters */ |
||||
greth->stats.rx_packets++; |
||||
|
||||
/* bad is now 0 ==> will stop loop */ |
||||
} |
||||
|
||||
/* reenable descriptor to receive more packet with this descriptor, wrap around if needed */ |
||||
rxbd->stat = |
||||
GRETH_BD_EN | |
||||
(((unsigned int)greth->rxbd_curr >= |
||||
(unsigned int)greth->rxbd_max) ? GRETH_BD_WR : 0); |
||||
enable = 1; |
||||
|
||||
/* increase index */ |
||||
greth->rxbd_curr = |
||||
((unsigned int)greth->rxbd_curr >= |
||||
(unsigned int)greth->rxbd_max) ? greth-> |
||||
rxbd_base : (greth->rxbd_curr + 1); |
||||
|
||||
}; |
||||
|
||||
if (enable) { |
||||
GRETH_REGORIN(®s->control, GRETH_RXEN); |
||||
} |
||||
done: |
||||
/* return positive length of packet or 0 if non recieved */ |
||||
return len; |
||||
} |
||||
|
||||
void greth_set_hwaddr(greth_priv * greth, unsigned char *mac) |
||||
{ |
||||
/* save new MAC address */ |
||||
greth->dev->enetaddr[0] = greth->hwaddr[0] = mac[0]; |
||||
greth->dev->enetaddr[1] = greth->hwaddr[1] = mac[1]; |
||||
greth->dev->enetaddr[2] = greth->hwaddr[2] = mac[2]; |
||||
greth->dev->enetaddr[3] = greth->hwaddr[3] = mac[3]; |
||||
greth->dev->enetaddr[4] = greth->hwaddr[4] = mac[4]; |
||||
greth->dev->enetaddr[5] = greth->hwaddr[5] = mac[5]; |
||||
greth->regs->esa_msb = (mac[0] << 8) | mac[1]; |
||||
greth->regs->esa_lsb = |
||||
(mac[2] << 24) | (mac[3] << 16) | (mac[4] << 8) | mac[5]; |
||||
#ifdef DEBUG |
||||
printf("GRETH: New MAC address: %02x:%02x:%02x:%02x:%02x:%02x\n", |
||||
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); |
||||
#endif |
||||
} |
||||
|
||||
int greth_initialize(bd_t * bis) |
||||
{ |
||||
greth_priv *greth; |
||||
ambapp_apbdev apbdev; |
||||
struct eth_device *dev; |
||||
int i; |
||||
char *addr_str, *end; |
||||
unsigned char addr[6]; |
||||
#ifdef DEBUG |
||||
printf("Scanning for GRETH\n"); |
||||
#endif |
||||
/* Find Device & IRQ via AMBA Plug&Play information */ |
||||
if (ambapp_apb_first(VENDOR_GAISLER, GAISLER_ETHMAC, &apbdev) != 1) { |
||||
return -1; /* GRETH not found */ |
||||
} |
||||
|
||||
greth = (greth_priv *) malloc(sizeof(greth_priv)); |
||||
dev = (struct eth_device *)malloc(sizeof(struct eth_device)); |
||||
memset(dev, 0, sizeof(struct eth_device)); |
||||
memset(greth, 0, sizeof(greth_priv)); |
||||
|
||||
greth->regs = (greth_regs *) apbdev.address; |
||||
greth->irq = apbdev.irq; |
||||
#ifdef DEBUG |
||||
printf("Found GRETH at 0x%lx, irq %d\n", greth->regs, greth->irq); |
||||
#endif |
||||
dev->priv = (void *)greth; |
||||
dev->iobase = (unsigned int)greth->regs; |
||||
dev->init = greth_init; |
||||
dev->halt = greth_halt; |
||||
dev->send = greth_send; |
||||
dev->recv = greth_recv; |
||||
greth->dev = dev; |
||||
|
||||
/* Reset Core */ |
||||
GRETH_REGSAVE(&greth->regs->control, GRETH_RESET); |
||||
|
||||
/* Wait for core to finish reset cycle */ |
||||
while (GRETH_REGLOAD(&greth->regs->control) & GRETH_RESET) ; |
||||
|
||||
/* Get the phy address which assumed to have been set
|
||||
correctly with the reset value in hardware */ |
||||
greth->phyaddr = (GRETH_REGLOAD(&greth->regs->mdio) >> 11) & 0x1F; |
||||
|
||||
/* Check if mac is gigabit capable */ |
||||
greth->gbit_mac = (GRETH_REGLOAD(&greth->regs->control) >> 27) & 1; |
||||
|
||||
/* Make descriptor string */ |
||||
if (greth->gbit_mac) { |
||||
sprintf(dev->name, "GRETH 10/100/GB"); |
||||
} else { |
||||
sprintf(dev->name, "GRETH 10/100"); |
||||
} |
||||
|
||||
/* initiate PHY, select speed/duplex depending on connected PHY */ |
||||
if (greth_init_phy(greth, bis)) { |
||||
/* Failed to init PHY (timedout) */ |
||||
return -1; |
||||
} |
||||
|
||||
/* Register Device to EtherNet subsystem */ |
||||
eth_register(dev); |
||||
|
||||
/* Get MAC address */ |
||||
if ((addr_str = getenv("ethaddr")) != NULL) { |
||||
for (i = 0; i < 6; i++) { |
||||
addr[i] = |
||||
addr_str ? simple_strtoul(addr_str, &end, 16) : 0; |
||||
if (addr_str) { |
||||
addr_str = (*end) ? end + 1 : end; |
||||
} |
||||
} |
||||
} else { |
||||
/* HW Address not found in environment, Set default HW address */ |
||||
addr[0] = GRETH_HWADDR_0; /* MSB */ |
||||
addr[1] = GRETH_HWADDR_1; |
||||
addr[2] = GRETH_HWADDR_2; |
||||
addr[3] = GRETH_HWADDR_3; |
||||
addr[4] = GRETH_HWADDR_4; |
||||
addr[5] = GRETH_HWADDR_5; /* LSB */ |
||||
} |
||||
|
||||
/* set and remember MAC address */ |
||||
greth_set_hwaddr(greth, addr); |
||||
|
||||
return 1; |
||||
} |
||||
@ -0,0 +1,97 @@ |
||||
/* Gaisler.com GRETH 10/100/1000 Ethernet MAC driver
|
||||
* |
||||
* (C) Copyright 2007 |
||||
* Daniel Hellstrom, Gaisler Research, daniel@gaisler.com |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#define GRETH_FD 0x10 |
||||
#define GRETH_RESET 0x40 |
||||
#define GRETH_MII_BUSY 0x8 |
||||
#define GRETH_MII_NVALID 0x10 |
||||
|
||||
/* MII registers */ |
||||
#define GRETH_MII_EXTADV_1000FD 0x00000200 |
||||
#define GRETH_MII_EXTADV_1000HD 0x00000100 |
||||
#define GRETH_MII_EXTPRT_1000FD 0x00000800 |
||||
#define GRETH_MII_EXTPRT_1000HD 0x00000400 |
||||
|
||||
#define GRETH_MII_100T4 0x00000200 |
||||
#define GRETH_MII_100TXFD 0x00000100 |
||||
#define GRETH_MII_100TXHD 0x00000080 |
||||
#define GRETH_MII_10FD 0x00000040 |
||||
#define GRETH_MII_10HD 0x00000020 |
||||
|
||||
#define GRETH_BD_EN 0x800 |
||||
#define GRETH_BD_WR 0x1000 |
||||
#define GRETH_BD_IE 0x2000 |
||||
#define GRETH_BD_LEN 0x7FF |
||||
|
||||
#define GRETH_TXEN 0x1 |
||||
#define GRETH_INT_TX 0x8 |
||||
#define GRETH_TXI 0x4 |
||||
#define GRETH_TXBD_STATUS 0x0001C000 |
||||
#define GRETH_TXBD_MORE 0x20000 |
||||
#define GRETH_TXBD_IPCS 0x40000 |
||||
#define GRETH_TXBD_TCPCS 0x80000 |
||||
#define GRETH_TXBD_UDPCS 0x100000 |
||||
#define GRETH_TXBD_ERR_LC 0x10000 |
||||
#define GRETH_TXBD_ERR_UE 0x4000 |
||||
#define GRETH_TXBD_ERR_AL 0x8000 |
||||
#define GRETH_TXBD_NUM 128 |
||||
#define GRETH_TXBD_NUM_MASK (GRETH_TXBD_NUM-1) |
||||
#define GRETH_TX_BUF_SIZE 2048 |
||||
|
||||
#define GRETH_INT_RX 0x4 |
||||
#define GRETH_RXEN 0x2 |
||||
#define GRETH_RXI 0x8 |
||||
#define GRETH_RXBD_STATUS 0xFFFFC000 |
||||
#define GRETH_RXBD_ERR_AE 0x4000 |
||||
#define GRETH_RXBD_ERR_FT 0x8000 |
||||
#define GRETH_RXBD_ERR_CRC 0x10000 |
||||
#define GRETH_RXBD_ERR_OE 0x20000 |
||||
#define GRETH_RXBD_ERR_LE 0x40000 |
||||
#define GRETH_RXBD_IP_DEC 0x80000 |
||||
#define GRETH_RXBD_IP_CSERR 0x100000 |
||||
#define GRETH_RXBD_UDP_DEC 0x200000 |
||||
#define GRETH_RXBD_UDP_CSERR 0x400000 |
||||
#define GRETH_RXBD_TCP_DEC 0x800000 |
||||
#define GRETH_RXBD_TCP_CSERR 0x1000000 |
||||
|
||||
#define GRETH_RXBD_NUM 128 |
||||
#define GRETH_RXBD_NUM_MASK (GRETH_RXBD_NUM-1) |
||||
#define GRETH_RX_BUF_SIZE 2048 |
||||
|
||||
/* Ethernet configuration registers */ |
||||
typedef struct _greth_regs { |
||||
volatile unsigned int control; |
||||
volatile unsigned int status; |
||||
volatile unsigned int esa_msb; |
||||
volatile unsigned int esa_lsb; |
||||
volatile unsigned int mdio; |
||||
volatile unsigned int tx_desc_p; |
||||
volatile unsigned int rx_desc_p; |
||||
} greth_regs; |
||||
|
||||
/* Ethernet buffer descriptor */ |
||||
typedef struct _greth_bd { |
||||
volatile unsigned int stat; |
||||
unsigned int addr; /* Buffer address not changed by HW */ |
||||
} greth_bd; |
||||
Loading…
Reference in new issue