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4xx_pcie.c: Fix GCC 4.6 build warnings

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Fix:
4xx_pcie.c: In function 'pcie_read_config':
4xx_pcie.c:230:6: warning: variable 'address' set but not used [-Wunused-but-set-variable]
4xx_pcie.c: In function 'pcie_write_config':
4xx_pcie.c:290:6: warning: variable 'address' set but not used [-Wunused-but-set-variable]
4xx_pcie.c: In function 'ppc4xx_setup_pcie_rootpoint':
4xx_pcie.c:1066:17: warning: variable 'rmbase' set but not used [-Wunused-but-set-variable]

Signed-off-by: Stefan Roese <sr@denx.de>
master
Stefan Roese 14 years ago committed by Wolfgang Denk
parent f0813ab128
commit fe91a65707
1 changed files with 2 additions and 9 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
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  1. 11
      arch/powerpc/cpu/ppc4xx/4xx_pcie.c

11
arch/powerpc/cpu/ppc4xx/4xx_pcie.c
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@ -227,7 +227,6 @@ static void pcie_dmer_enable(void)
static int pcie_read_config(struct pci_controller *hose, unsigned int devfn, static int pcie_read_config(struct pci_controller *hose, unsigned int devfn,
int offset, int len, u32 *val) { int offset, int len, u32 *val) {
u8 *address;
*val = 0; *val = 0;
if (validate_endpoint(hose)) if (validate_endpoint(hose))
@ -255,7 +254,7 @@ static int pcie_read_config(struct pci_controller *hose, unsigned int devfn,
((PCI_BUS(devfn) == 0) || (PCI_BUS(devfn) == 1))) ((PCI_BUS(devfn) == 0) || (PCI_BUS(devfn) == 1)))
return 0; return 0;
address = pcie_get_base(hose, devfn); pcie_get_base(hose, devfn);
offset += devfn << 4; offset += devfn << 4;
/* /*
@ -287,8 +286,6 @@ static int pcie_read_config(struct pci_controller *hose, unsigned int devfn,
static int pcie_write_config(struct pci_controller *hose, unsigned int devfn, static int pcie_write_config(struct pci_controller *hose, unsigned int devfn,
int offset, int len, u32 val) { int offset, int len, u32 val) {
u8 *address;
if (validate_endpoint(hose)) if (validate_endpoint(hose))
return 0; /* No upstream config access */ return 0; /* No upstream config access */
@ -307,7 +304,7 @@ static int pcie_write_config(struct pci_controller *hose, unsigned int devfn,
((PCI_BUS(devfn) == 0) || (PCI_BUS(devfn) == 1))) ((PCI_BUS(devfn) == 0) || (PCI_BUS(devfn) == 1)))
return 0; return 0;
address = pcie_get_base(hose, devfn); pcie_get_base(hose, devfn);
offset += devfn << 4; offset += devfn << 4;
/* /*
@ -1063,7 +1060,6 @@ int ppc4xx_init_pcie_endport(int port)
void ppc4xx_setup_pcie_rootpoint(struct pci_controller *hose, int port) void ppc4xx_setup_pcie_rootpoint(struct pci_controller *hose, int port)
{ {
volatile void *mbase = NULL; volatile void *mbase = NULL;
volatile void *rmbase = NULL;
pci_set_ops(hose, pci_set_ops(hose,
pcie_read_config_byte, pcie_read_config_byte,
@ -1076,18 +1072,15 @@ void ppc4xx_setup_pcie_rootpoint(struct pci_controller *hose, int port)
switch (port) { switch (port) {
case 0: case 0:
mbase = (u32 *)CONFIG_SYS_PCIE0_XCFGBASE; mbase = (u32 *)CONFIG_SYS_PCIE0_XCFGBASE;
rmbase = (u32 *)CONFIG_SYS_PCIE0_CFGBASE;
hose->cfg_data = (u8 *)CONFIG_SYS_PCIE0_CFGBASE; hose->cfg_data = (u8 *)CONFIG_SYS_PCIE0_CFGBASE;
break; break;
case 1: case 1:
mbase = (u32 *)CONFIG_SYS_PCIE1_XCFGBASE; mbase = (u32 *)CONFIG_SYS_PCIE1_XCFGBASE;
rmbase = (u32 *)CONFIG_SYS_PCIE1_CFGBASE;
hose->cfg_data = (u8 *)CONFIG_SYS_PCIE1_CFGBASE; hose->cfg_data = (u8 *)CONFIG_SYS_PCIE1_CFGBASE;
break; break;
#if CONFIG_SYS_PCIE_NR_PORTS > 2 #if CONFIG_SYS_PCIE_NR_PORTS > 2
case 2: case 2:
mbase = (u32 *)CONFIG_SYS_PCIE2_XCFGBASE; mbase = (u32 *)CONFIG_SYS_PCIE2_XCFGBASE;
rmbase = (u32 *)CONFIG_SYS_PCIE2_CFGBASE;
hose->cfg_data = (u8 *)CONFIG_SYS_PCIE2_CFGBASE; hose->cfg_data = (u8 *)CONFIG_SYS_PCIE2_CFGBASE;
break; break;
#endif #endif

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