If we let descriptors equal 0, we can end up closing STDIN. Make sure
they start out as -1.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With driver model, we were not checking if the state of the device was
marked as active before calling the halt function. Check that the device
is probed and also marked as active. This avoids the case where we were
calling halt on the first device in net_init() and the driver would
operate on bogus data structures causing problems. In this case, the
priv was all 0, so halt() would close STDIN.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
test.dts specified the fake MAC address as a u32 array. Instead it
should be a u8 array.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In open, the socket is correctly checked to be -1 in the error case.
In send and recv, we checked for 0, but that is a valid socket number.
Correct this by checking for -1 as a bad socket everywhere.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In raw mode, handle ctrl-c as normal. This allows normal ctrl-c behavior
such as aborting a command that is timing out without completely
terminating the sandbox executable.
In [1], Simon disabled this. His reason for it was that it interferes
with piping test scripts. Piping should be done in cooked mode, so this
change should still not interfere.
[1] commit 8969ea3e9f ("sandbox: Disable Ctrl-C")
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
We don't necessarily want to re-enable ctrl-c if it was already disabled
when calling tstc().
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pass an empty buffer instead of NULL if the hwconfig environment
variable isn't set.
Signed-off-by: Jeremy Gebben <jgebben@sweptlaser.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: York Sun <york.sun@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
A new defconfig is introduced to support SPL boot from QSPI NOR
flash. This is to support falcon mode for faster booting into
Linux.
Signed-off-by: York Sun <york.sun@nxp.com>
Some legacy boards use RAW image for SPL boot. Add Kconfig option
SPL_PAYLOAD to set alternative image.
Signed-off-by: York Sun <york.sun@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
For SoCs with PBL, u-boot-with-spl-pbl.bin is the final image for
SPL boot. Drop unused u-boot-with-spl.bin.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Ashish Kumar <ashish.kumar@nxp.com>
CC: Ruchika Gupta <ruchika.gupta@nxp.com>
CC: Priyanka Jain <priyanka.jain@nxp.com>
CC: Shengzhou Liu <Shengzhou.Liu@nxp.com>
For SPL boot with PBL, u-boot-with-spl-pbl.bin is the final image.
Drop unused u-boot-with-spl.bin.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Mingkai Hu <mingkai.hu@nxp.com>
CC: Ruchika Gupta <ruchika.gupta@nxp.com>
CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
CC: Udit Agarwal <udit.agarwal@nxp.com>
CC: Sumit Garg <sumit.garg@nxp.com>
CC: Priyanka Jain <priyanka.jain@nxp.com>
Commit a52ff334c5 ("armv8: ls1046ardb: SPL size reduction") reduced
image size for SPL. IFC was disabled. If PPA is loaded in SPL, MMU is
enabled as a result. Removing IFC skips IFC region in the MMU table,
causing later failure in RAM version U-boot when accessing CPLD
through IFC. Only disable IFC if PPA is not enabled for SPL.
Signed-off-by: York Sun <york.sun@nxp.com>
Make the code structure more general so that more socs can be
added easily and also remove speed limitation restriction.
Add the ls1012a sata support as well.
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
(with and without CONFIG_OF_LIVE on zynqmp zcu102)
Reviewed-by: York Sun <york.sun@nxp.com>
One ls1012a, there is one SATA 3.0 advanced host controller interface
which is a high-performance SATA solution that delivers comprehensive
and fully-compliant generation 3 (1.5 Gb/s - 6.0 Gb/s) serial ATA
capabilities, in accordance with the serial ATA revision 3.0 of Serial
ATA International Organization.
Add sata node to support this feature.
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
Remove the old implementation in order to enable DM for sata.
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
Enable I-cache for SPL boot to boost performance. Earlier MMU was
enabled only for LS2080A and has since been dropped by commit
f539c8a4a7 ("armv8: ls2080a: Drop early MMU for SPL build").
Signed-off-by: York Sun <york.sun@nxp.com>
Move CONFIG_SPI_FLASH_SPANSION, CONFIG_SPI_FLASH, to defconfig.
Also disable disable 4K erase size option.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
4K erase size is used only in case of hydrid mode which is not
supported on any NXP platform with flash "s25fs512s".
Supported mode is uniform sector, with erase size 256kiB.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This patch updates the copyright claim for the issues reported by
legal review.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
CONFIG_SPL_FSL_LS_PPA is needed only in case of falcon boot
Support for this is not present in PPA currently, so
removing the default option from defconfig
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
use "fsl_mc lazyapply dpl addr" instead of "fsl_mc apply dpl addr"
change dpl load addr to 0x80001000 from 0x80200000 because dpl gets
corrupted at 0x80200000 during bootm command excecution.
Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
On 64bit platforms we would otherwise see:
../cmd/ubi.c: In function 'ubi_volume_read':
../cmd/ubi.c:359:16: warning: format '%u' expects argument of type 'unsigned int', but argument 2 has type 'size_t {aka long unsigned int}' [-Wformat=]
Fixes: 68c7025d99 ("cmd: ubi: print load size after establishing volume size")
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that we have removed the DocBook files we need to not try and clean
that directory.
Reported-by: ericywl <midnight2903@gmail.com>
Reported-by: Jagan Teki <jagan@amarulasolutions.com>
Fixes: 78a88f7930 ("doc: Replace DocBook with sphinx-based docs")
Signed-off-by: Tom Rini <trini@konsulko.com>
Switch to the distro boot for UniPhier platform.
- Remove the environment vairalbes used to load images from raw
block devices.
- Keep the command to download images via tftp. This will be
useful to boot the kernel when no valid kernel image is ready
yet in the file system.
- Use root.cpio.gz instead of root.cpio.uboot because we always know
the file size of the init ramdisk; it is loaded via either a file
system or network.
- Rename fit_addr_r to kernel_addr_r, which the distro command
checks to get the load address of FIT image.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Enable "mtdparts" and "ubi" commands for uniphier_v8_defconfig to
use UBI on NAND devices.
Enable only "mtdparts" for uniphier_{v7,ld4_sld8}_defconfig because
enabling UBI would increase 170KB, which would be memory footprint
problem.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The 'bd' is passed in ft_board_setup() as the second argument.
Replace 'gd->bd' with 'bd'.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Add 'const' (also 'static' in some places) to struct node_info
arrays to save memory footprint.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The second argument of fdt_fixup_mtdparts() is an opaque pointer,
'void *node_info', hence callers can pass any pointer.
Obviously, fdt_fixup_mtdparts() expects 'struct node_info *'
otherwise, it crashes run-time.
Change the prototype so that it is compile-time checked.
Also, add 'const' qualifier to it so that callers can constify
the struct node_info arrays.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The NAND framework makes sure to pass in the buffer with at least
chip->buf_align alignment. Currently, the Denali NAND driver only
requests 16 byte alignment. This causes unaligned cache operations
for the DMA transfer.
[Error Example]
=> nand read 81000010 0 1000
NAND read: device 0 offset 0x0, size 0x1000
CACHE: Misaligned operation at range [81000010, 81001010]
CACHE: Misaligned operation at range [81000010, 81001010]
CACHE: Misaligned operation at range [81000010, 81001010]
CACHE: Misaligned operation at range [81000010, 81001010]
4096 bytes read: OK
Reported-by: Marek Vasut <marex@denx.de>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
cherry-pick kernel commit 2ae89c7 (2018-06-05)
to avoid warnings when compiling with GCC 8.1
In file included from scripts/kconfig/zconf.tab.c:2486:
scripts/kconfig/confdata.c: In function ‘conf_write’:
scripts/kconfig/confdata.c:771:22: warning: ‘%s’ directive writing likely 7 or more bytes into a region of size between 1 and 4097 [-Wformat-overflow=]
sprintf(newname, "%s%s", dirname, basename);
^~
scripts/kconfig/confdata.c:771:19: note: assuming directive output of 7 bytes
sprintf(newname, "%s%s", dirname, basename);
^~~~~~
scripts/kconfig/confdata.c:771:2: note: ‘sprintf’ output 1 or more bytes (assuming 4104) into a destination of size 4097
sprintf(newname, "%s%s", dirname, basename);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
scripts/kconfig/confdata.c:774:23: warning: ‘.tmpconfig.’ directive writing 11 bytes into a region of size between 1 and 4097 [-Wformat-overflow=]
sprintf(tmpname, "%s.tmpconfig.%d", dirname, (int)getpid());
^~~~~~~~~~~
scripts/kconfig/confdata.c:774:3: note: ‘sprintf’ output between 13 and 4119 bytes into a destination of size 4097
sprintf(tmpname, "%s.tmpconfig.%d", dirname, (int)getpid());
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Enable CVE_2017_5715 mitigation on CPU0 on R-Car H2, M2W, M2N, V2H,
which all contain Cortex-A15 cores. R-Car E2 contains only Cortex-A7
cores and is not affected. Without this enabled, Linux kernel reports:
CPU0: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable
With this enabled, Linux kernel reports:
CPU0: Spectre v2: using ICIALLU workaround
NOTE: This by itself does not enable the workaround for other CPUs
than CPU0 and may require additional kernel patches for the
other CPUs in SMP configurations.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nishanth Menon <nm@ti.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Adjust the NAND register size on Arria10 to reflect reality.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
The Arria10 requires proper configuration of the NOC firewall, otherwise
the access to certain areas of the LWHPS bridge fails in Linux. Add the
missing setup.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Make sure the ARM CPACR register is zeroed out, this is mandatory
on Arria10.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Commit bfc6bae8fa
This commit rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET. Update
with new CONFIG name and enable CONFIG_SPL_DM_RESET when CONFIG_DM_RESET is enabled.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Marek Vasut <marex@denx.de>
The patch
"tools/mkimage: Fix DTC run command to handle file names with space"
(sha1: a6e9810495) contains comma in name
which is confusing patman. Fix it by defining Mirza's email in mailmap.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The NAND offsets for the kernel and U-Boot were missing.
This patch sets up the offsets so the AM3517-EVM can boot from NAND
when DIP switches S7:1 and S7:4 are to the OFF position
Signed-off-by: Adam Ford <aford173@gmail.com>
The previous e-mail pointing to Vaibhav Hiremath <hvaibhav@ti.com>
is bouncing and has for some time. This updates it to myself and I
work for Logic PD the manufacturer of the AM3517-SOM and EVM
Signed-off-by: Adam Ford <aford173@gmail.com>
Joe Hershberger
Jeremy Gebben
York Sun
Yuantian Tang
Ashish Kumar
Vinitha V Pillai
Alison Wang
Jagdish Gediya
Tom Rini
Masahiro Yamada
Luis Araneda
Marek Vasut
Marek Vasut
Ley Foon Tan
Michal Simek
Adam Ford
Heinrich Schuchardt