Convert cache flush to use dm cpu data.
The original cache flush functions are written in assembly
and use CONFIG_SYS_{I,D}CACHE_SIZE... macros. It is difficult
to convert to use cache configuration in dm cpu data which is
extracted from device tree.
The cacheflush.c of Linux nios2 arch uses cpuinfo structure,
which is very close to our dm cpu data. So we copy and modify
it to arch/nios2/lib/cache.c to replace the old cache.S.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
This helps to clean up the include/ directory so that it only contains
non-architecture-specific headers and also matches Linux's directory
layout which many U-Boot developers are already familiar with.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
- Added Motorola CPU 8540/8560 support (cpu/85xx)
- Added Motorola MPC8540ADS board support (board/mpc8540ads)
- Added Motorola MPC8560ADS board support (board/mpc8560ads)
* Minor code cleanup
- add support for Altera Nios-32 CPU
- add support for Nios Cyclone Development Kit (DK-1C20)
* Patch by Steven Scholz, 29 Sep 2003:
- A second parameter for bootm overwrites the load address for
"Standalone Application" images.
- bootm sets environment variable "filesize" to the resulting
(uncompressed) data length for "Standalone Application" images
when autostart is set to "no". Now you can do something like
if bootm $fpgadata $some_free_ram ; then
fpga load 0 $some_free_ram $filesize
fi
* Patch by Denis Peter, 25 Sept 2003:
add support for the MIP405 Rev. C board
Thomas Chou
Wolfgang Denk
Anton Staaf
Peter Tyser
wdenk