After booting mx6qsabrelite from POR the following is reported:
CPU: Freescale i.MX61 family rev1.0 at 792 MHz
Reset cause: unknown reset
This is because both the POR and WDOG bits are set after reset.
Fix this by also checking both bits in the POR case.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
This is needed to support Freescale-supplied userspaces.
At the moment, both the IPU and VPU libraries provided by Freescale
in the "imx-lib" package contain routines which scrape the system
revision from /proc/cpuinfo. In the VPU library, this information is
used to load the proper firmware, allowing a single binary to be used
across various i.MX processors.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Enables all fourteen address lines for DRAM
Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Tested-by: Marek Vasut <marek.vasut@gmail.com>
CONFIG_SYS_MEMTEST_END should be higher than CONFIG_SYS_MEMTEST_START.
Cc: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Tested-by: Marek Vasut <marek.vasut@gmail.com>
CONFIG_SYS_MEMTEST_END should be higher than CONFIG_SYS_MEMTEST_START.
Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
The flash header supports different flash offsets for different
boot devices. E.g. parallel NOR or OneNAND use a different offset
than FLASH_OFFSET_STANDARD (== 0x400).
The flash offset is correctly read from the configuration in
parse_cfg_cmd(). But is then overwritten wrongly in set_imx_hdr_v1/2().
Fix this by removing this overwriting. Use the flash offset
correctly read from the configuration, instead.
If there is no flash_offset read from the configuration file, i.e.
the BOOT_FROM tag is missing, exit with an error message.
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
CC: Jason Liu <liu.h.jason@gmail.com>
CC: Stefano Babic <sbabic@denx.de>
Tested-by: Stefano Babic <sbabic@denx.de>
The GPIO_INT_ACT_LOW_SET was incorrectly handling interrupt lines higher than 7.
This is due to the fact that there are two registers for total of 16 lines.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Bryan Hundven <bryanhundven@gmail.com>
Cc: Michael Schwingen <rincewind@discworld.dascon.de>
nand.c: In function ‘pdnb3_nand_read_buf’:
nand.c:107:4: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]
nand.c: In function ‘pdnb3_nand_dev_ready’:
nand.c:124:18: warning: variable ‘val’ set but not used [-Wunused-but-set-variable]
Remove the 4-byte-at-time read mode altogether, the most is bogus and will
likely cause unaligned accesses.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Bryan Hundven <bryanhundven@gmail.com>
Cc: Michael Schwingen <rincewind@discworld.dascon.de>
IxEthAcc.c: In function ‘ixEthAccInit’:
IxEthAcc.c:105:21: warning: comparison between ‘IxEthDBStatus’ and ‘enum <anonymous>’ [-Wenum-compare]
IxEthDBAPISupport.c: In function ‘ixEthDBPortAddressSet’:
IxEthDBAPISupport.c:633:18: warning: variable ‘ackPortAddressLock’ set but not used [-Wunused-but-set-variable]
IxQMgrDispatcher.c: In function ‘ixQMgrLLPShow’:
IxQMgrDispatcher.c:1194:18: warning: variable ‘q’ set but not used [-Wunused-but-set-variable]
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Bryan Hundven <bryanhundven@gmail.com>
Cc: Michael Schwingen <rincewind@discworld.dascon.de>
These symbols are no longer defined in Linux-ARM's mach-types files. Replace
these with CONFIG_MACH_TYPE instead.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Bryan Hundven <bryanhundven@gmail.com>
Cc: Michael Schwingen <rincewind@discworld.dascon.de>
Add -EB flag to LD to switch endianness of the linker. This should make armeb
targets buildable again. Also, make use of U-Boot's internal libgcc instead of
toolchain's one, this works around the use of libraries from GCC, which might be
little endian.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Bryan Hundven <bryanhundven@gmail.com>
Cc: Michael Schwingen <rincewind@discworld.dascon.de>
The LD command in examples/standalone/Makefile ignored platform specific
LDFLAGS setup. Pass these LDFLAGS to the command.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Bryan Hundven <bryanhundven@gmail.com>
Cc: Michael Schwingen <rincewind@discworld.dascon.de>
Adds support for loading U-Boot from UART using YMODEM protocol.
If YMODEM support is enabled in SPL and the romcode indicates
that SPL loaded via UART then SPL will wait for start of a
YMODEM transfer via the console port.
Signed-off-by: Matt Porter <mporter@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
This document describes the SPL process for OMAP3 (and related) boards
as well as a partial memory map and how to verify certain aspects
outside of running on the target.
Signed-off-by: Tom Rini <trini@ti.com>
The '-fstack-usage' option to gcc will generate .su files, ignore them.
Acked-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Tom Rini <trini@ti.com>
This patch fixes erroneous 32-bit access to registers
hw_clkctrl_frac0 and hw_clkctrl_frac1.
Signed-off-by: Robert Delien <robert@delien.nl>
Acked-by: Marek Vasut <marex@denx.de>
Tested-by: Marek Vasut <marex@denx.de>
This patch introduces an 8-bit register, mx28_register_8, in order to
prepare for fixing erroneous 32-bit wide access of registers
hw_clkctrl_frac0 and hw_clkctrl_frac1.
Signed-off-by: Robert Delien <robert@delien.nl>
Acked-by: Marek Vasut <marex@denx.de>
Tested-by: Marek Vasut <marex@denx.de>
This patch renames mx28_register to mx28_register_32 in order to
prepare for the introduction of an 8-bit register, mx28_register_8.
Signed-off-by: Robert Delien <robert@delien.nl>
Acked-by: Marek Vasut <marex@denx.de>
Tested-by: Marek Vasut <marex@denx.de>
This prototype version SoM is unused and not available to public.
Support this only for internal debugging purposes.
Signed-off-by: Marek Vasut <marex@denx.de>
The SD loader binary is now downloadable at
https://wiki.linaro.org/Boards/MX6QSabreLite
under a open-source 3-clause BSD license. Update the README
for this.
The discussion shows that it's hard to change the hardware
regarding the default SPI NOR boot of the SabreLite boards.
I.e. this will stay the default boot. Therefore remove the
'early version of' statement.
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Jason Liu <liu.h.jason@gmail.com>
This patch replaces the use of magice numbers for scratch register
addresses with earlier defined register definitions.
Signed-off-by: Robert Delien <robert@delien.nl>
Configuring for zipitz2 board...
zipitz2.c: In function ‘board_mmc_init’:
zipitz2.c:85:2: warning: implicit declaration of function ‘pxa_mmc_register’ [-Wimplicit-function-declaration]
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
This link script seems old and incompatible with relocation and its
own sa1000 start.S file. It isn't used because the CPU's link script
was picked up in preference to this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Kristoffer Ericson <kristoffer.ericson@gmail.com>
CONFIG_SYS_INIT_SP_ADDR points to RAM, but it's used before
DRAM controller init. Fix it by setting CONFIG_SYS_INIT_SP_ADDR
to SRAM
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
This reverts commit 295d3942b8.
It turns that this really doesn't work very nicely. Instead we should
have a pre-console panic function so that we know that further execution
is impossible and we don't need to worry about trampling on UARTs, etc.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Without the fix, flash_write_cfibuffer will terminate the erased
status check once an all-0xFF word has been found instead of
continuing the erased status check utill the first non-0xFF word.
Signed-off-by: Tao Hou <hotforest@gmail.com>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>